Lines Matching refs:CCI_REG8
40 #define IMX283_REG_CHIP_ID CCI_REG8(0x3000)
43 #define IMX283_REG_STANDBY CCI_REG8(0x3000)
51 #define IMX283_REG_CLAMP CCI_REG8(0x3001)
54 #define IMX283_REG_PLSTMG08 CCI_REG8(0x3003)
57 #define IMX283_REG_MDSEL1 CCI_REG8(0x3004)
58 #define IMX283_REG_MDSEL2 CCI_REG8(0x3005)
59 #define IMX283_REG_MDSEL3 CCI_REG8(0x3006)
61 #define IMX283_REG_MDSEL4 CCI_REG8(0x3007)
66 #define IMX283_REG_HTRIMMING CCI_REG8(0x300b)
76 #define IMX283_REG_TCLKPOST CCI_REG8(0x3018)
77 #define IMX283_REG_THSPREPARE CCI_REG8(0x301a)
78 #define IMX283_REG_THSZERO CCI_REG8(0x301c)
79 #define IMX283_REG_THSTRAIL CCI_REG8(0x301e)
80 #define IMX283_REG_TCLKTRAIL CCI_REG8(0x3020)
81 #define IMX283_REG_TCLKPREPARE CCI_REG8(0x3022)
83 #define IMX283_REG_TLPX CCI_REG8(0x3026)
84 #define IMX283_REG_THSEXIT CCI_REG8(0x3028)
85 #define IMX283_REG_TCLKPRE CCI_REG8(0x302a)
86 #define IMX283_REG_SYSMODE CCI_REG8(0x3104)
90 #define IMX283_REG_OB_SIZE_V CCI_REG8(0x3033)
120 #define IMX283_REG_DIGITAL_GAIN CCI_REG8(0x3044)
132 #define IMX283_REG_XMSTA CCI_REG8(0x3105)
135 #define IMX283_REG_SYNCDRV CCI_REG8(0x3107)
140 #define IMX283_REG_STBPL CCI_REG8(0x320b)
145 #define IMX283_REG_PLRD1 CCI_REG8(0x36c1)
147 #define IMX283_REG_PLRD3 CCI_REG8(0x36f7)
148 #define IMX283_REG_PLRD4 CCI_REG8(0x36f8)
150 #define IMX283_REG_PLSTMG02 CCI_REG8(0x36aa)
156 #define IMX283_REG_TPG_CTRL CCI_REG8(0x3156)
160 #define IMX283_REG_TPG_PAT CCI_REG8(0x3157)
358 { CCI_REG8(0x36c5), 0x00 }, /* Undocumented */
359 { CCI_REG8(0x3ac4), 0x00 }, /* Undocumented */
377 { CCI_REG8(0x36c5), 0x01 }, /* Undocumented */
378 { CCI_REG8(0x3ac4), 0x01 }, /* Undocumented */