Lines Matching +full:0 +full:x2184
22 #define HI846_REG_FLL 0x0006
23 #define HI846_FLL_MAX 0xffff
26 #define HI846_REG_LLP 0x0008
29 #define HI846_REG_BINNING_MODE 0x000c
31 #define HI846_REG_IMAGE_ORIENTATION 0x000e
33 #define HI846_REG_UNKNOWN_0022 0x0022
35 #define HI846_REG_Y_ADDR_START_VACT_H 0x0026
36 #define HI846_REG_Y_ADDR_START_VACT_L 0x0027
37 #define HI846_REG_UNKNOWN_0028 0x0028
39 #define HI846_REG_Y_ADDR_END_VACT_H 0x002c
40 #define HI846_REG_Y_ADDR_END_VACT_L 0x002d
42 #define HI846_REG_Y_ODD_INC_FOBP 0x002e
43 #define HI846_REG_Y_EVEN_INC_FOBP 0x002f
45 #define HI846_REG_Y_ODD_INC_VACT 0x0032
46 #define HI846_REG_Y_EVEN_INC_VACT 0x0033
48 #define HI846_REG_GROUPED_PARA_HOLD 0x0046
50 #define HI846_REG_TG_ENABLE 0x004c
52 #define HI846_REG_UNKNOWN_005C 0x005c
54 #define HI846_REG_UNKNOWN_006A 0x006a
58 * includes the lower 4 bits of 0x0073 too. Only 16 bits are used
61 #define HI846_REG_EXPOSURE 0x0074
67 #define HI846_REG_ANALOG_GAIN 0x0077
68 #define HI846_ANAL_GAIN_MIN 0
73 #define HI846_REG_MWB_GR_GAIN_H 0x0078
74 #define HI846_REG_MWB_GR_GAIN_L 0x0079
75 #define HI846_REG_MWB_GB_GAIN_H 0x007a
76 #define HI846_REG_MWB_GB_GAIN_L 0x007b
77 #define HI846_REG_MWB_R_GAIN_H 0x007c
78 #define HI846_REG_MWB_R_GAIN_L 0x007d
79 #define HI846_REG_MWB_B_GAIN_H 0x007e
80 #define HI846_REG_MWB_B_GAIN_L 0x007f
86 #define HI846_REG_X_ADDR_START_HACT_H 0x0120
87 #define HI846_REG_X_ADDR_END_HACT_H 0x0122
89 #define HI846_REG_UNKNOWN_012A 0x012a
91 #define HI846_REG_UNKNOWN_0200 0x0200
93 #define HI846_REG_UNKNOWN_021C 0x021c
94 #define HI846_REG_UNKNOWN_021E 0x021e
96 #define HI846_REG_UNKNOWN_0402 0x0402
97 #define HI846_REG_UNKNOWN_0404 0x0404
98 #define HI846_REG_UNKNOWN_0408 0x0408
99 #define HI846_REG_UNKNOWN_0410 0x0410
100 #define HI846_REG_UNKNOWN_0412 0x0412
101 #define HI846_REG_UNKNOWN_0414 0x0414
103 #define HI846_REG_UNKNOWN_0418 0x0418
105 #define HI846_REG_UNKNOWN_051E 0x051e
108 #define HI846_REG_X_START_H 0x0804
109 #define HI846_REG_X_START_L 0x0805
112 #define HI846_REG_UNKNOWN_0900 0x0900
113 #define HI846_REG_MIPI_TX_OP_EN 0x0901
114 #define HI846_REG_MIPI_TX_OP_MODE 0x0902
117 #define HI846_REG_UNKNOWN_090C 0x090c
118 #define HI846_REG_UNKNOWN_090E 0x090e
120 #define HI846_REG_UNKNOWN_0914 0x0914
121 #define HI846_REG_TLPX 0x0915
122 #define HI846_REG_TCLK_PREPARE 0x0916
123 #define HI846_REG_TCLK_ZERO 0x0917
124 #define HI846_REG_UNKNOWN_0918 0x0918
125 #define HI846_REG_THS_PREPARE 0x0919
126 #define HI846_REG_THS_ZERO 0x091a
127 #define HI846_REG_THS_TRAIL 0x091b
128 #define HI846_REG_TCLK_POST 0x091c
129 #define HI846_REG_TCLK_TRAIL_MIN 0x091d
130 #define HI846_REG_UNKNOWN_091E 0x091e
132 #define HI846_REG_UNKNOWN_0954 0x0954
133 #define HI846_REG_UNKNOWN_0956 0x0956
134 #define HI846_REG_UNKNOWN_0958 0x0958
135 #define HI846_REG_UNKNOWN_095A 0x095a
138 #define HI846_REG_MODE_SELECT 0x0a00
139 #define HI846_MODE_STANDBY 0x00
140 #define HI846_MODE_STREAMING 0x01
141 #define HI846_REG_FAST_STANDBY_MODE 0x0a02
142 #define HI846_REG_ISP_EN_H 0x0a04
145 #define HI846_REG_ISP 0x0a05
146 #define HI846_REG_ISP_TPG_EN 0x01
147 #define HI846_REG_TEST_PATTERN 0x020a /* 1-9 */
149 #define HI846_REG_UNKNOWN_0A0C 0x0a0c
152 #define HI846_REG_X_OUTPUT_SIZE_H 0x0a12
153 #define HI846_REG_X_OUTPUT_SIZE_L 0x0a13
154 #define HI846_REG_Y_OUTPUT_SIZE_H 0x0a14
155 #define HI846_REG_Y_OUTPUT_SIZE_L 0x0a15
158 #define HI846_REG_PEDESTAL_EN 0x0a1a
160 #define HI846_REG_UNKNOWN_0A1E 0x0a1e
163 #define HI846_REG_HBIN_MODE 0x0a22
165 #define HI846_REG_UNKNOWN_0A24 0x0a24
166 #define HI846_REG_UNKNOWN_0B02 0x0b02
167 #define HI846_REG_UNKNOWN_0B10 0x0b10
168 #define HI846_REG_UNKNOWN_0B12 0x0b12
169 #define HI846_REG_UNKNOWN_0B14 0x0b14
172 #define HI846_REG_BLC_CTL0 0x0c00
174 #define HI846_REG_UNKNOWN_0C06 0x0c06
175 #define HI846_REG_UNKNOWN_0C10 0x0c10
176 #define HI846_REG_UNKNOWN_0C12 0x0c12
177 #define HI846_REG_UNKNOWN_0C14 0x0c14
178 #define HI846_REG_UNKNOWN_0C16 0x0c16
180 #define HI846_REG_UNKNOWN_0E04 0x0e04
182 #define HI846_REG_CHIP_ID_L 0x0f16
183 #define HI846_REG_CHIP_ID_H 0x0f17
184 #define HI846_CHIP_ID_L 0x46
185 #define HI846_CHIP_ID_H 0x08
187 #define HI846_REG_UNKNOWN_0F04 0x0f04
188 #define HI846_REG_UNKNOWN_0F08 0x0f08
191 #define HI846_REG_PLL_CFG_MIPI2_H 0x0f2a
192 #define HI846_REG_PLL_CFG_MIPI2_L 0x0f2b
194 #define HI846_REG_UNKNOWN_0F30 0x0f30
195 #define HI846_REG_PLL_CFG_RAMP1_H 0x0f32
196 #define HI846_REG_UNKNOWN_0F36 0x0f36
197 #define HI846_REG_PLL_CFG_MIPI1_H 0x0f38
199 #define HI846_REG_UNKNOWN_2008 0x2008
200 #define HI846_REG_UNKNOWN_326E 0x326e
239 {HI846_REG_MODE_SELECT, 0x0000},
241 {0x2000, 0x100a},
242 {0x2002, 0x00ff},
243 {0x2004, 0x0007},
244 {0x2006, 0x3fff},
245 {0x2008, 0x3fff},
246 {0x200a, 0xc216},
247 {0x200c, 0x1292},
248 {0x200e, 0xc01a},
249 {0x2010, 0x403d},
250 {0x2012, 0x000e},
251 {0x2014, 0x403e},
252 {0x2016, 0x0b80},
253 {0x2018, 0x403f},
254 {0x201a, 0x82ae},
255 {0x201c, 0x1292},
256 {0x201e, 0xc00c},
257 {0x2020, 0x4130},
258 {0x2022, 0x43e2},
259 {0x2024, 0x0180},
260 {0x2026, 0x4130},
261 {0x2028, 0x7400},
262 {0x202a, 0x5000},
263 {0x202c, 0x0253},
264 {0x202e, 0x0ad1},
265 {0x2030, 0x2360},
266 {0x2032, 0x0009},
267 {0x2034, 0x5020},
268 {0x2036, 0x000b},
269 {0x2038, 0x0002},
270 {0x203a, 0x0044},
271 {0x203c, 0x0016},
272 {0x203e, 0x1792},
273 {0x2040, 0x7002},
274 {0x2042, 0x154f},
275 {0x2044, 0x00d5},
276 {0x2046, 0x000b},
277 {0x2048, 0x0019},
278 {0x204a, 0x1698},
279 {0x204c, 0x000e},
280 {0x204e, 0x099a},
281 {0x2050, 0x0058},
282 {0x2052, 0x7000},
283 {0x2054, 0x1799},
284 {0x2056, 0x0310},
285 {0x2058, 0x03c3},
286 {0x205a, 0x004c},
287 {0x205c, 0x064a},
288 {0x205e, 0x0001},
289 {0x2060, 0x0007},
290 {0x2062, 0x0bc7},
291 {0x2064, 0x0055},
292 {0x2066, 0x7000},
293 {0x2068, 0x1550},
294 {0x206a, 0x158a},
295 {0x206c, 0x0004},
296 {0x206e, 0x1488},
297 {0x2070, 0x7010},
298 {0x2072, 0x1508},
299 {0x2074, 0x0004},
300 {0x2076, 0x0016},
301 {0x2078, 0x03d5},
302 {0x207a, 0x0055},
303 {0x207c, 0x08ca},
304 {0x207e, 0x2019},
305 {0x2080, 0x0007},
306 {0x2082, 0x7057},
307 {0x2084, 0x0fc7},
308 {0x2086, 0x5041},
309 {0x2088, 0x12c8},
310 {0x208a, 0x5060},
311 {0x208c, 0x5080},
312 {0x208e, 0x2084},
313 {0x2090, 0x12c8},
314 {0x2092, 0x7800},
315 {0x2094, 0x0802},
316 {0x2096, 0x040f},
317 {0x2098, 0x1007},
318 {0x209a, 0x0803},
319 {0x209c, 0x080b},
320 {0x209e, 0x3803},
321 {0x20a0, 0x0807},
322 {0x20a2, 0x0404},
323 {0x20a4, 0x0400},
324 {0x20a6, 0xffff},
325 {0x20a8, 0xf0b2},
326 {0x20aa, 0xffef},
327 {0x20ac, 0x0a84},
328 {0x20ae, 0x1292},
329 {0x20b0, 0xc02e},
330 {0x20b2, 0x4130},
331 {0x23fe, 0xc056},
332 {0x3232, 0xfc0c},
333 {0x3236, 0xfc22},
334 {0x3248, 0xfca8},
335 {0x326a, 0x8302},
336 {0x326c, 0x830a},
337 {0x326e, 0x0000},
338 {0x32ca, 0xfc28},
339 {0x32cc, 0xc3bc},
340 {0x32ce, 0xc34c},
341 {0x32d0, 0xc35a},
342 {0x32d2, 0xc368},
343 {0x32d4, 0xc376},
344 {0x32d6, 0xc3c2},
345 {0x32d8, 0xc3e6},
346 {0x32da, 0x0003},
347 {0x32dc, 0x0003},
348 {0x32de, 0x00c7},
349 {0x32e0, 0x0031},
350 {0x32e2, 0x0031},
351 {0x32e4, 0x0031},
352 {0x32e6, 0xfc28},
353 {0x32e8, 0xc3bc},
354 {0x32ea, 0xc384},
355 {0x32ec, 0xc392},
356 {0x32ee, 0xc3a0},
357 {0x32f0, 0xc3ae},
358 {0x32f2, 0xc3c4},
359 {0x32f4, 0xc3e6},
360 {0x32f6, 0x0003},
361 {0x32f8, 0x0003},
362 {0x32fa, 0x00c7},
363 {0x32fc, 0x0031},
364 {0x32fe, 0x0031},
365 {0x3300, 0x0031},
366 {0x3302, 0x82ca},
367 {0x3304, 0xc164},
368 {0x3306, 0x82e6},
369 {0x3308, 0xc19c},
370 {0x330a, 0x001f},
371 {0x330c, 0x001a},
372 {0x330e, 0x0034},
373 {0x3310, 0x0000},
374 {0x3312, 0x0000},
375 {0x3314, 0xfc94},
376 {0x3316, 0xc3d8},
378 {HI846_REG_MODE_SELECT, 0x0000},
379 {HI846_REG_UNKNOWN_0E04, 0x0012},
380 {HI846_REG_Y_ODD_INC_FOBP, 0x1111},
381 {HI846_REG_Y_ODD_INC_VACT, 0x1111},
382 {HI846_REG_UNKNOWN_0022, 0x0008},
383 {HI846_REG_Y_ADDR_START_VACT_H, 0x0040},
384 {HI846_REG_UNKNOWN_0028, 0x0017},
385 {HI846_REG_Y_ADDR_END_VACT_H, 0x09cf},
386 {HI846_REG_UNKNOWN_005C, 0x2101},
387 {HI846_REG_FLL, 0x09de},
388 {HI846_REG_LLP, 0x0ed8},
389 {HI846_REG_IMAGE_ORIENTATION, 0x0100},
390 {HI846_REG_BINNING_MODE, 0x0022},
391 {HI846_REG_HBIN_MODE, 0x0000},
392 {HI846_REG_UNKNOWN_0A24, 0x0000},
393 {HI846_REG_X_START_H, 0x0000},
394 {HI846_REG_X_OUTPUT_SIZE_H, 0x0cc0},
395 {HI846_REG_Y_OUTPUT_SIZE_H, 0x0990},
396 {HI846_REG_EXPOSURE, 0x09d8},
397 {HI846_REG_ANALOG_GAIN, 0x0000},
398 {HI846_REG_GROUPED_PARA_HOLD, 0x0000},
399 {HI846_REG_UNKNOWN_051E, 0x0000},
400 {HI846_REG_UNKNOWN_0200, 0x0400},
401 {HI846_REG_PEDESTAL_EN, 0x0c00},
402 {HI846_REG_UNKNOWN_0A0C, 0x0010},
403 {HI846_REG_UNKNOWN_0A1E, 0x0ccf},
404 {HI846_REG_UNKNOWN_0402, 0x0110},
405 {HI846_REG_UNKNOWN_0404, 0x00f4},
406 {HI846_REG_UNKNOWN_0408, 0x0000},
407 {HI846_REG_UNKNOWN_0410, 0x008d},
408 {HI846_REG_UNKNOWN_0412, 0x011a},
409 {HI846_REG_UNKNOWN_0414, 0x864c},
410 {HI846_REG_UNKNOWN_021C, 0x0003},
411 {HI846_REG_UNKNOWN_021E, 0x0235},
412 {HI846_REG_BLC_CTL0, 0x9150},
413 {HI846_REG_UNKNOWN_0C06, 0x0021},
414 {HI846_REG_UNKNOWN_0C10, 0x0040},
415 {HI846_REG_UNKNOWN_0C12, 0x0040},
416 {HI846_REG_UNKNOWN_0C14, 0x0040},
417 {HI846_REG_UNKNOWN_0C16, 0x0040},
418 {HI846_REG_FAST_STANDBY_MODE, 0x0100},
419 {HI846_REG_ISP_EN_H, 0x014a},
420 {HI846_REG_UNKNOWN_0418, 0x0000},
421 {HI846_REG_UNKNOWN_012A, 0x03b4},
422 {HI846_REG_X_ADDR_START_HACT_H, 0x0046},
423 {HI846_REG_X_ADDR_END_HACT_H, 0x0376},
424 {HI846_REG_UNKNOWN_0B02, 0xe04d},
425 {HI846_REG_UNKNOWN_0B10, 0x6821},
426 {HI846_REG_UNKNOWN_0B12, 0x0120},
427 {HI846_REG_UNKNOWN_0B14, 0x0001},
428 {HI846_REG_UNKNOWN_2008, 0x38fd},
429 {HI846_REG_UNKNOWN_326E, 0x0000},
430 {HI846_REG_UNKNOWN_0900, 0x0320},
431 {HI846_REG_MIPI_TX_OP_MODE, 0xc31a},
432 {HI846_REG_UNKNOWN_0914, 0xc109},
433 {HI846_REG_TCLK_PREPARE, 0x061a},
434 {HI846_REG_UNKNOWN_0918, 0x0306},
435 {HI846_REG_THS_ZERO, 0x0b09},
436 {HI846_REG_TCLK_POST, 0x0c07},
437 {HI846_REG_UNKNOWN_091E, 0x0a00},
438 {HI846_REG_UNKNOWN_090C, 0x042a},
439 {HI846_REG_UNKNOWN_090E, 0x006b},
440 {HI846_REG_UNKNOWN_0954, 0x0089},
441 {HI846_REG_UNKNOWN_0956, 0x0000},
442 {HI846_REG_UNKNOWN_0958, 0xca00},
443 {HI846_REG_UNKNOWN_095A, 0x9240},
444 {HI846_REG_UNKNOWN_0F08, 0x2f04},
445 {HI846_REG_UNKNOWN_0F30, 0x001f},
446 {HI846_REG_UNKNOWN_0F36, 0x001f},
447 {HI846_REG_UNKNOWN_0F04, 0x3a00},
448 {HI846_REG_PLL_CFG_RAMP1_H, 0x025a},
449 {HI846_REG_PLL_CFG_MIPI1_H, 0x025a},
450 {HI846_REG_PLL_CFG_MIPI2_H, 0x0024},
451 {HI846_REG_UNKNOWN_006A, 0x0100},
452 {HI846_REG_TG_ENABLE, 0x0100},
456 {0x2000, 0x987a},
457 {0x2002, 0x00ff},
458 {0x2004, 0x0047},
459 {0x2006, 0x3fff},
460 {0x2008, 0x3fff},
461 {0x200a, 0xc216},
462 {0x200c, 0x1292},
463 {0x200e, 0xc01a},
464 {0x2010, 0x403d},
465 {0x2012, 0x000e},
466 {0x2014, 0x403e},
467 {0x2016, 0x0b80},
468 {0x2018, 0x403f},
469 {0x201a, 0x82ae},
470 {0x201c, 0x1292},
471 {0x201e, 0xc00c},
472 {0x2020, 0x4130},
473 {0x2022, 0x43e2},
474 {0x2024, 0x0180},
475 {0x2026, 0x4130},
476 {0x2028, 0x7400},
477 {0x202a, 0x5000},
478 {0x202c, 0x0253},
479 {0x202e, 0x0ad1},
480 {0x2030, 0x2360},
481 {0x2032, 0x0009},
482 {0x2034, 0x5020},
483 {0x2036, 0x000b},
484 {0x2038, 0x0002},
485 {0x203a, 0x0044},
486 {0x203c, 0x0016},
487 {0x203e, 0x1792},
488 {0x2040, 0x7002},
489 {0x2042, 0x154f},
490 {0x2044, 0x00d5},
491 {0x2046, 0x000b},
492 {0x2048, 0x0019},
493 {0x204a, 0x1698},
494 {0x204c, 0x000e},
495 {0x204e, 0x099a},
496 {0x2050, 0x0058},
497 {0x2052, 0x7000},
498 {0x2054, 0x1799},
499 {0x2056, 0x0310},
500 {0x2058, 0x03c3},
501 {0x205a, 0x004c},
502 {0x205c, 0x064a},
503 {0x205e, 0x0001},
504 {0x2060, 0x0007},
505 {0x2062, 0x0bc7},
506 {0x2064, 0x0055},
507 {0x2066, 0x7000},
508 {0x2068, 0x1550},
509 {0x206a, 0x158a},
510 {0x206c, 0x0004},
511 {0x206e, 0x1488},
512 {0x2070, 0x7010},
513 {0x2072, 0x1508},
514 {0x2074, 0x0004},
515 {0x2076, 0x0016},
516 {0x2078, 0x03d5},
517 {0x207a, 0x0055},
518 {0x207c, 0x08ca},
519 {0x207e, 0x2019},
520 {0x2080, 0x0007},
521 {0x2082, 0x7057},
522 {0x2084, 0x0fc7},
523 {0x2086, 0x5041},
524 {0x2088, 0x12c8},
525 {0x208a, 0x5060},
526 {0x208c, 0x5080},
527 {0x208e, 0x2084},
528 {0x2090, 0x12c8},
529 {0x2092, 0x7800},
530 {0x2094, 0x0802},
531 {0x2096, 0x040f},
532 {0x2098, 0x1007},
533 {0x209a, 0x0803},
534 {0x209c, 0x080b},
535 {0x209e, 0x3803},
536 {0x20a0, 0x0807},
537 {0x20a2, 0x0404},
538 {0x20a4, 0x0400},
539 {0x20a6, 0xffff},
540 {0x20a8, 0xf0b2},
541 {0x20aa, 0xffef},
542 {0x20ac, 0x0a84},
543 {0x20ae, 0x1292},
544 {0x20b0, 0xc02e},
545 {0x20b2, 0x4130},
546 {0x20b4, 0xf0b2},
547 {0x20b6, 0xffbf},
548 {0x20b8, 0x2004},
549 {0x20ba, 0x403f},
550 {0x20bc, 0x00c3},
551 {0x20be, 0x4fe2},
552 {0x20c0, 0x8318},
553 {0x20c2, 0x43cf},
554 {0x20c4, 0x0000},
555 {0x20c6, 0x9382},
556 {0x20c8, 0xc314},
557 {0x20ca, 0x2003},
558 {0x20cc, 0x12b0},
559 {0x20ce, 0xcab0},
560 {0x20d0, 0x4130},
561 {0x20d2, 0x12b0},
562 {0x20d4, 0xc90a},
563 {0x20d6, 0x4130},
564 {0x20d8, 0x42d2},
565 {0x20da, 0x8318},
566 {0x20dc, 0x00c3},
567 {0x20de, 0x9382},
568 {0x20e0, 0xc314},
569 {0x20e2, 0x2009},
570 {0x20e4, 0x120b},
571 {0x20e6, 0x120a},
572 {0x20e8, 0x1209},
573 {0x20ea, 0x1208},
574 {0x20ec, 0x1207},
575 {0x20ee, 0x1206},
576 {0x20f0, 0x4030},
577 {0x20f2, 0xc15e},
578 {0x20f4, 0x4130},
579 {0x20f6, 0x1292},
580 {0x20f8, 0xc008},
581 {0x20fa, 0x4130},
582 {0x20fc, 0x42d2},
583 {0x20fe, 0x82a1},
584 {0x2100, 0x00c2},
585 {0x2102, 0x1292},
586 {0x2104, 0xc040},
587 {0x2106, 0x4130},
588 {0x2108, 0x1292},
589 {0x210a, 0xc006},
590 {0x210c, 0x42a2},
591 {0x210e, 0x7324},
592 {0x2110, 0x9382},
593 {0x2112, 0xc314},
594 {0x2114, 0x2011},
595 {0x2116, 0x425f},
596 {0x2118, 0x82a1},
597 {0x211a, 0xf25f},
598 {0x211c, 0x00c1},
599 {0x211e, 0xf35f},
600 {0x2120, 0x2406},
601 {0x2122, 0x425f},
602 {0x2124, 0x00c0},
603 {0x2126, 0xf37f},
604 {0x2128, 0x522f},
605 {0x212a, 0x4f82},
606 {0x212c, 0x7324},
607 {0x212e, 0x425f},
608 {0x2130, 0x82d4},
609 {0x2132, 0xf35f},
610 {0x2134, 0x4fc2},
611 {0x2136, 0x01b3},
612 {0x2138, 0x93c2},
613 {0x213a, 0x829f},
614 {0x213c, 0x2421},
615 {0x213e, 0x403e},
616 {0x2140, 0xfffe},
617 {0x2142, 0x40b2},
618 {0x2144, 0xec78},
619 {0x2146, 0x831c},
620 {0x2148, 0x40b2},
621 {0x214a, 0xec78},
622 {0x214c, 0x831e},
623 {0x214e, 0x40b2},
624 {0x2150, 0xec78},
625 {0x2152, 0x8320},
626 {0x2154, 0xb3d2},
627 {0x2156, 0x008c},
628 {0x2158, 0x2405},
629 {0x215a, 0x4e0f},
630 {0x215c, 0x503f},
631 {0x215e, 0xffd8},
632 {0x2160, 0x4f82},
633 {0x2162, 0x831c},
634 {0x2164, 0x90f2},
635 {0x2166, 0x0003},
636 {0x2168, 0x008c},
637 {0x216a, 0x2401},
638 {0x216c, 0x4130},
639 {0x216e, 0x421f},
640 {0x2170, 0x831c},
641 {0x2172, 0x5e0f},
642 {0x2174, 0x4f82},
643 {0x2176, 0x831e},
644 {0x2178, 0x5e0f},
645 {0x217a, 0x4f82},
646 {0x217c, 0x8320},
647 {0x217e, 0x3ff6},
648 {0x2180, 0x432e},
649 {0x2182, 0x3fdf},
650 {0x2184, 0x421f},
651 {0x2186, 0x7100},
652 {0x2188, 0x4f0e},
653 {0x218a, 0x503e},
654 {0x218c, 0xffd8},
655 {0x218e, 0x4e82},
656 {0x2190, 0x7a04},
657 {0x2192, 0x421e},
658 {0x2194, 0x831c},
659 {0x2196, 0x5f0e},
660 {0x2198, 0x4e82},
661 {0x219a, 0x7a06},
662 {0x219c, 0x0b00},
663 {0x219e, 0x7304},
664 {0x21a0, 0x0050},
665 {0x21a2, 0x40b2},
666 {0x21a4, 0xd081},
667 {0x21a6, 0x0b88},
668 {0x21a8, 0x421e},
669 {0x21aa, 0x831e},
670 {0x21ac, 0x5f0e},
671 {0x21ae, 0x4e82},
672 {0x21b0, 0x7a0e},
673 {0x21b2, 0x521f},
674 {0x21b4, 0x8320},
675 {0x21b6, 0x4f82},
676 {0x21b8, 0x7a10},
677 {0x21ba, 0x0b00},
678 {0x21bc, 0x7304},
679 {0x21be, 0x007a},
680 {0x21c0, 0x40b2},
681 {0x21c2, 0x0081},
682 {0x21c4, 0x0b88},
683 {0x21c6, 0x4392},
684 {0x21c8, 0x7a0a},
685 {0x21ca, 0x0800},
686 {0x21cc, 0x7a0c},
687 {0x21ce, 0x0b00},
688 {0x21d0, 0x7304},
689 {0x21d2, 0x022b},
690 {0x21d4, 0x40b2},
691 {0x21d6, 0xd081},
692 {0x21d8, 0x0b88},
693 {0x21da, 0x0b00},
694 {0x21dc, 0x7304},
695 {0x21de, 0x0255},
696 {0x21e0, 0x40b2},
697 {0x21e2, 0x0081},
698 {0x21e4, 0x0b88},
699 {0x21e6, 0x4130},
700 {0x23fe, 0xc056},
701 {0x3232, 0xfc0c},
702 {0x3236, 0xfc22},
703 {0x3238, 0xfcfc},
704 {0x323a, 0xfd84},
705 {0x323c, 0xfd08},
706 {0x3246, 0xfcd8},
707 {0x3248, 0xfca8},
708 {0x324e, 0xfcb4},
709 {0x326a, 0x8302},
710 {0x326c, 0x830a},
711 {0x326e, 0x0000},
712 {0x32ca, 0xfc28},
713 {0x32cc, 0xc3bc},
714 {0x32ce, 0xc34c},
715 {0x32d0, 0xc35a},
716 {0x32d2, 0xc368},
717 {0x32d4, 0xc376},
718 {0x32d6, 0xc3c2},
719 {0x32d8, 0xc3e6},
720 {0x32da, 0x0003},
721 {0x32dc, 0x0003},
722 {0x32de, 0x00c7},
723 {0x32e0, 0x0031},
724 {0x32e2, 0x0031},
725 {0x32e4, 0x0031},
726 {0x32e6, 0xfc28},
727 {0x32e8, 0xc3bc},
728 {0x32ea, 0xc384},
729 {0x32ec, 0xc392},
730 {0x32ee, 0xc3a0},
731 {0x32f0, 0xc3ae},
732 {0x32f2, 0xc3c4},
733 {0x32f4, 0xc3e6},
734 {0x32f6, 0x0003},
735 {0x32f8, 0x0003},
736 {0x32fa, 0x00c7},
737 {0x32fc, 0x0031},
738 {0x32fe, 0x0031},
739 {0x3300, 0x0031},
740 {0x3302, 0x82ca},
741 {0x3304, 0xc164},
742 {0x3306, 0x82e6},
743 {0x3308, 0xc19c},
744 {0x330a, 0x001f},
745 {0x330c, 0x001a},
746 {0x330e, 0x0034},
747 {0x3310, 0x0000},
748 {0x3312, 0x0000},
749 {0x3314, 0xfc94},
750 {0x3316, 0xc3d8},
752 {0x0a00, 0x0000},
753 {0x0e04, 0x0012},
754 {0x002e, 0x1111},
755 {0x0032, 0x1111},
756 {0x0022, 0x0008},
757 {0x0026, 0x0040},
758 {0x0028, 0x0017},
759 {0x002c, 0x09cf},
760 {0x005c, 0x2101},
761 {0x0006, 0x09de},
762 {0x0008, 0x0ed8},
763 {0x000e, 0x0100},
764 {0x000c, 0x0022},
765 {0x0a22, 0x0000},
766 {0x0a24, 0x0000},
767 {0x0804, 0x0000},
768 {0x0a12, 0x0cc0},
769 {0x0a14, 0x0990},
770 {0x0074, 0x09d8},
771 {0x0076, 0x0000},
772 {0x051e, 0x0000},
773 {0x0200, 0x0400},
774 {0x0a1a, 0x0c00},
775 {0x0a0c, 0x0010},
776 {0x0a1e, 0x0ccf},
777 {0x0402, 0x0110},
778 {0x0404, 0x00f4},
779 {0x0408, 0x0000},
780 {0x0410, 0x008d},
781 {0x0412, 0x011a},
782 {0x0414, 0x864c},
784 {0x021c, 0x0003},
785 {0x021e, 0x0235},
787 {0x0c00, 0x9950},
788 {0x0c06, 0x0021},
789 {0x0c10, 0x0040},
790 {0x0c12, 0x0040},
791 {0x0c14, 0x0040},
792 {0x0c16, 0x0040},
793 {0x0a02, 0x0100},
794 {0x0a04, 0x015a},
795 {0x0418, 0x0000},
796 {0x0128, 0x0028},
797 {0x012a, 0xffff},
798 {0x0120, 0x0046},
799 {0x0122, 0x0376},
800 {0x012c, 0x0020},
801 {0x012e, 0xffff},
802 {0x0124, 0x0040},
803 {0x0126, 0x0378},
804 {0x0746, 0x0050},
805 {0x0748, 0x01d5},
806 {0x074a, 0x022b},
807 {0x074c, 0x03b0},
808 {0x0756, 0x043f},
809 {0x0758, 0x3f1d},
810 {0x0b02, 0xe04d},
811 {0x0b10, 0x6821},
812 {0x0b12, 0x0120},
813 {0x0b14, 0x0001},
814 {0x2008, 0x38fd},
815 {0x326e, 0x0000},
816 {0x0900, 0x0300},
817 {0x0902, 0xc319},
818 {0x0914, 0xc109},
819 {0x0916, 0x061a},
820 {0x0918, 0x0407},
821 {0x091a, 0x0a0b},
822 {0x091c, 0x0e08},
823 {0x091e, 0x0a00},
824 {0x090c, 0x0427},
825 {0x090e, 0x0059},
826 {0x0954, 0x0089},
827 {0x0956, 0x0000},
828 {0x0958, 0xca80},
829 {0x095a, 0x9240},
830 {0x0f08, 0x2f04},
831 {0x0f30, 0x001f},
832 {0x0f36, 0x001f},
833 {0x0f04, 0x3a00},
834 {0x0f32, 0x025a},
835 {0x0f38, 0x025a},
836 {0x0f2a, 0x4124},
837 {0x006a, 0x0100},
838 {0x004c, 0x0100},
839 {0x0044, 0x0001},
843 {HI846_REG_MODE_SELECT, 0x0000},
844 {HI846_REG_Y_ODD_INC_FOBP, 0x7711},
845 {HI846_REG_Y_ODD_INC_VACT, 0x7711},
846 {HI846_REG_Y_ADDR_START_VACT_H, 0x0148},
847 {HI846_REG_Y_ADDR_END_VACT_H, 0x08c7},
848 {HI846_REG_UNKNOWN_005C, 0x4404},
849 {HI846_REG_FLL, 0x0277},
850 {HI846_REG_LLP, 0x0ed8},
851 {HI846_REG_BINNING_MODE, 0x0322},
852 {HI846_REG_HBIN_MODE, 0x0200},
853 {HI846_REG_UNKNOWN_0A24, 0x0000},
854 {HI846_REG_X_START_H, 0x0058},
855 {HI846_REG_X_OUTPUT_SIZE_H, 0x0280},
856 {HI846_REG_Y_OUTPUT_SIZE_H, 0x01e0},
859 {HI846_REG_UNKNOWN_021C, 0x0003},
860 {HI846_REG_UNKNOWN_021E, 0x0235},
862 {HI846_REG_ISP_EN_H, 0x016a},
863 {HI846_REG_UNKNOWN_0418, 0x0210},
864 {HI846_REG_UNKNOWN_0B02, 0xe04d},
865 {HI846_REG_UNKNOWN_0B10, 0x7021},
866 {HI846_REG_UNKNOWN_0B12, 0x0120},
867 {HI846_REG_UNKNOWN_0B14, 0x0001},
868 {HI846_REG_UNKNOWN_2008, 0x38fd},
869 {HI846_REG_UNKNOWN_326E, 0x0000},
873 {HI846_REG_UNKNOWN_0900, 0x0300},
874 {HI846_REG_MIPI_TX_OP_MODE, 0x4319},
875 {HI846_REG_UNKNOWN_0914, 0xc105},
876 {HI846_REG_TCLK_PREPARE, 0x030c},
877 {HI846_REG_UNKNOWN_0918, 0x0304},
878 {HI846_REG_THS_ZERO, 0x0708},
879 {HI846_REG_TCLK_POST, 0x0b04},
880 {HI846_REG_UNKNOWN_091E, 0x0500},
881 {HI846_REG_UNKNOWN_090C, 0x0208},
882 {HI846_REG_UNKNOWN_090E, 0x009a},
883 {HI846_REG_UNKNOWN_0954, 0x0089},
884 {HI846_REG_UNKNOWN_0956, 0x0000},
885 {HI846_REG_UNKNOWN_0958, 0xca80},
886 {HI846_REG_UNKNOWN_095A, 0x9240},
887 {HI846_REG_PLL_CFG_MIPI2_H, 0x4924},
888 {HI846_REG_TG_ENABLE, 0x0100},
892 {HI846_REG_MODE_SELECT, 0x0000},
893 {HI846_REG_Y_ODD_INC_FOBP, 0x3311},
894 {HI846_REG_Y_ODD_INC_VACT, 0x3311},
895 {HI846_REG_Y_ADDR_START_VACT_H, 0x0238},
896 {HI846_REG_Y_ADDR_END_VACT_H, 0x07d7},
897 {HI846_REG_UNKNOWN_005C, 0x4202},
898 {HI846_REG_FLL, 0x034a},
899 {HI846_REG_LLP, 0x0ed8},
900 {HI846_REG_BINNING_MODE, 0x0122},
901 {HI846_REG_HBIN_MODE, 0x0100},
902 {HI846_REG_UNKNOWN_0A24, 0x0000},
903 {HI846_REG_X_START_H, 0x00b0},
904 {HI846_REG_X_OUTPUT_SIZE_H, 0x0500},
905 {HI846_REG_Y_OUTPUT_SIZE_H, 0x02d0},
906 {HI846_REG_EXPOSURE, 0x0344},
909 {HI846_REG_UNKNOWN_021C, 0x0003},
910 {HI846_REG_UNKNOWN_021E, 0x0235},
912 {HI846_REG_ISP_EN_H, 0x016a},
913 {HI846_REG_UNKNOWN_0418, 0x0410},
914 {HI846_REG_UNKNOWN_0B02, 0xe04d},
915 {HI846_REG_UNKNOWN_0B10, 0x6c21},
916 {HI846_REG_UNKNOWN_0B12, 0x0120},
917 {HI846_REG_UNKNOWN_0B14, 0x0005},
918 {HI846_REG_UNKNOWN_2008, 0x38fd},
919 {HI846_REG_UNKNOWN_326E, 0x0000},
923 {HI846_REG_UNKNOWN_0900, 0x0300},
924 {HI846_REG_MIPI_TX_OP_MODE, 0x4319},
925 {HI846_REG_UNKNOWN_0914, 0xc109},
926 {HI846_REG_TCLK_PREPARE, 0x061a},
927 {HI846_REG_UNKNOWN_0918, 0x0407},
928 {HI846_REG_THS_ZERO, 0x0a0b},
929 {HI846_REG_TCLK_POST, 0x0e08},
930 {HI846_REG_UNKNOWN_091E, 0x0a00},
931 {HI846_REG_UNKNOWN_090C, 0x0427},
932 {HI846_REG_UNKNOWN_090E, 0x0145},
933 {HI846_REG_UNKNOWN_0954, 0x0089},
934 {HI846_REG_UNKNOWN_0956, 0x0000},
935 {HI846_REG_UNKNOWN_0958, 0xca80},
936 {HI846_REG_UNKNOWN_095A, 0x9240},
937 {HI846_REG_PLL_CFG_MIPI2_H, 0x4124},
938 {HI846_REG_TG_ENABLE, 0x0100},
943 {HI846_REG_UNKNOWN_0900, 0x0300},
944 {HI846_REG_MIPI_TX_OP_MODE, 0xc319},
945 {HI846_REG_UNKNOWN_0914, 0xc105},
946 {HI846_REG_TCLK_PREPARE, 0x030c},
947 {HI846_REG_UNKNOWN_0918, 0x0304},
948 {HI846_REG_THS_ZERO, 0x0708},
949 {HI846_REG_TCLK_POST, 0x0b04},
950 {HI846_REG_UNKNOWN_091E, 0x0500},
951 {HI846_REG_UNKNOWN_090C, 0x0208},
952 {HI846_REG_UNKNOWN_090E, 0x008a},
953 {HI846_REG_UNKNOWN_0954, 0x0089},
954 {HI846_REG_UNKNOWN_0956, 0x0000},
955 {HI846_REG_UNKNOWN_0958, 0xca80},
956 {HI846_REG_UNKNOWN_095A, 0x9240},
957 {HI846_REG_PLL_CFG_MIPI2_H, 0x4924},
958 {HI846_REG_TG_ENABLE, 0x0100},
962 {HI846_REG_MODE_SELECT, 0x0000},
963 {HI846_REG_Y_ODD_INC_FOBP, 0x3311},
964 {HI846_REG_Y_ODD_INC_VACT, 0x3311},
965 {HI846_REG_Y_ADDR_START_VACT_H, 0x0040},
966 {HI846_REG_Y_ADDR_END_VACT_H, 0x09cf},
967 {HI846_REG_UNKNOWN_005C, 0x4202},
968 {HI846_REG_FLL, 0x09de},
969 {HI846_REG_LLP, 0x0ed8},
970 {HI846_REG_BINNING_MODE, 0x0122},
971 {HI846_REG_HBIN_MODE, 0x0100},
972 {HI846_REG_UNKNOWN_0A24, 0x0000},
973 {HI846_REG_X_START_H, 0x0000},
974 {HI846_REG_X_OUTPUT_SIZE_H, 0x0660},
975 {HI846_REG_Y_OUTPUT_SIZE_H, 0x04c8},
976 {HI846_REG_EXPOSURE, 0x09d8},
979 {HI846_REG_UNKNOWN_021C, 0x0003},
980 {HI846_REG_UNKNOWN_021E, 0x0235},
982 {HI846_REG_ISP_EN_H, 0x016a},
983 {HI846_REG_UNKNOWN_0418, 0x0000},
984 {HI846_REG_UNKNOWN_0B02, 0xe04d},
985 {HI846_REG_UNKNOWN_0B10, 0x6c21},
986 {HI846_REG_UNKNOWN_0B12, 0x0120},
987 {HI846_REG_UNKNOWN_0B14, 0x0005},
988 {HI846_REG_UNKNOWN_2008, 0x38fd},
989 {HI846_REG_UNKNOWN_326E, 0x0000},
993 {HI846_REG_UNKNOWN_0900, 0x0300},
994 {HI846_REG_MIPI_TX_OP_MODE, 0x4319},
995 {HI846_REG_UNKNOWN_0914, 0xc109},
996 {HI846_REG_TCLK_PREPARE, 0x061a},
997 {HI846_REG_UNKNOWN_0918, 0x0407},
998 {HI846_REG_THS_ZERO, 0x0a0b},
999 {HI846_REG_TCLK_POST, 0x0e08},
1000 {HI846_REG_UNKNOWN_091E, 0x0a00},
1001 {HI846_REG_UNKNOWN_090C, 0x0427},
1002 {HI846_REG_UNKNOWN_090E, 0x0069},
1003 {HI846_REG_UNKNOWN_0954, 0x0089},
1004 {HI846_REG_UNKNOWN_0956, 0x0000},
1005 {HI846_REG_UNKNOWN_0958, 0xca80},
1006 {HI846_REG_UNKNOWN_095A, 0x9240},
1007 {HI846_REG_PLL_CFG_MIPI2_H, 0x4124},
1008 {HI846_REG_TG_ENABLE, 0x0100},
1012 {HI846_REG_UNKNOWN_0900, 0x0300},
1013 {HI846_REG_MIPI_TX_OP_MODE, 0xc319},
1014 {HI846_REG_UNKNOWN_0914, 0xc105},
1015 {HI846_REG_TCLK_PREPARE, 0x030c},
1016 {HI846_REG_UNKNOWN_0918, 0x0304},
1017 {HI846_REG_THS_ZERO, 0x0708},
1018 {HI846_REG_TCLK_POST, 0x0b04},
1019 {HI846_REG_UNKNOWN_091E, 0x0500},
1020 {HI846_REG_UNKNOWN_090C, 0x0208},
1021 {HI846_REG_UNKNOWN_090E, 0x001c},
1022 {HI846_REG_UNKNOWN_0954, 0x0089},
1023 {HI846_REG_UNKNOWN_0956, 0x0000},
1024 {HI846_REG_UNKNOWN_0958, 0xca80},
1025 {HI846_REG_UNKNOWN_095A, 0x9240},
1026 {HI846_REG_PLL_CFG_MIPI2_H, 0x4924},
1027 {HI846_REG_TG_ENABLE, 0x0100},
1043 #define FREQ_INDEX_640 0
1077 .num_of_regs = 0,
1080 .left = 0x58,
1081 .top = 0x148,
1106 .left = 0xb0,
1107 .top = 0x238,
1132 .left = 0x0,
1133 .top = 0x0,
1188 for (i = 0; i < ARRAY_SIZE(hi846_colour_fmts); i++) in hi846_find_datafmt()
1222 u8 data_buf[1] = {0}; in hi846_read_reg()
1226 msgs[0].addr = client->addr; in hi846_read_reg()
1227 msgs[0].flags = 0; in hi846_read_reg()
1228 msgs[0].len = sizeof(addr_buf); in hi846_read_reg()
1229 msgs[0].buf = addr_buf; in hi846_read_reg()
1241 *val = data_buf[0]; in hi846_read_reg()
1243 return 0; in hi846_read_reg()
1249 u8 buf[3] = { reg >> 8, reg & 0xff, val }; in hi846_write_reg()
1251 { .addr = client->addr, .flags = 0, in hi846_write_reg()
1262 return 0; in hi846_write_reg()
1271 if (*err < 0) in hi846_write_reg_16()
1289 int ret = 0; in hi846_write_reg_list()
1291 for (i = 0; i < r_list->num_of_regs; i++) { in hi846_write_reg_list()
1296 "failed to write reg 0x%4.4x: %d", in hi846_write_reg_list()
1302 return 0; in hi846_write_reg_list()
1307 int ret = 0; in hi846_update_digital_gain()
1342 int ret = 0; in hi846_set_ctrl()
1358 return 0; in hi846_set_ctrl()
1375 if (frame_len > 0xffff) { /* max frame len */ in hi846_set_ctrl()
1376 frame_len = 0xffff; in hi846_set_ctrl()
1382 if (shutter > (0xffff - 6)) in hi846_set_ctrl()
1383 shutter = 0xffff - 6; in hi846_set_ctrl()
1431 0, hi846_link_freqs); in hi846_init_controls()
1437 V4L2_CID_PIXEL_RATE, 0, in hi846_init_controls()
1472 0, 0, hi846_test_pattern_menu); in hi846_init_controls()
1491 return 0; in hi846_init_controls()
1502 int ret = 0; in hi846_set_video_mode()
1514 (frame_length - hi846->cur_mode->frame_len) : 0; in hi846_set_video_mode()
1521 hi846_write_reg_16(hi846, HI846_REG_FLL, frame_length & 0xFFFF, &ret); in hi846_set_video_mode()
1523 HI846_LINE_LENGTH & 0xFFFF, &ret); in hi846_set_video_mode()
1531 int ret = 0; in hi846_start_streaming()
1567 * Reading 0x0034 is purely done for debugging reasons: It is not in hi846_start_streaming()
1569 * "If 0x0034[2] bit is disabled , Visible pixel width and height is 0." in hi846_start_streaming()
1574 ret = hi846_read_reg(hi846, 0x0034, &val); in hi846_start_streaming()
1578 dev_info(&client->dev, "visible pixel width and height is 0\n"); in hi846_start_streaming()
1601 hi846->streaming = 0; in hi846_stop_streaming()
1608 int ret = 0; in hi846_set_stream()
1636 if (ret < 0) in hi846_power_on()
1640 if (ret < 0) in hi846_power_on()
1644 gpiod_set_value_cansleep(hi846->shutdown_gpio, 0); in hi846_power_on()
1649 gpiod_set_value_cansleep(hi846->rst_gpio, 0); in hi846_power_on()
1652 return 0; in hi846_power_on()
1702 mf->code = hi846_colour_fmts[0].code; in hi846_set_format()
1703 mf->colorspace = hi846_colour_fmts[0].colorspace; in hi846_set_format()
1704 fmt = &hi846_colour_fmts[0]; in hi846_set_format()
1709 return 0; in hi846_set_format()
1768 dev_dbg(&client->dev, "Set fmt w=%d h=%d code=0x%x colorspace=0x%x\n", in hi846_set_format()
1774 return 0; in hi846_set_format()
1788 return 0; in hi846_get_format()
1799 "Get format w=%d h=%d code=0x%x colorspace=0x%x\n", in hi846_get_format()
1802 return 0; in hi846_get_format()
1809 if (code->pad || code->index > 0) in hi846_enum_mbus_code()
1814 return 0; in hi846_enum_mbus_code()
1839 return 0; in hi846_enum_frame_size()
1861 return 0; in hi846_get_selection()
1864 sel->r.top = 0; in hi846_get_selection()
1865 sel->r.left = 0; in hi846_get_selection()
1868 return 0; in hi846_get_selection()
1880 mf = v4l2_subdev_state_get_format(sd_state, 0); in hi846_init_state()
1890 return 0; in hi846_init_state()
1945 return 0; in hi846_identify_module()
1955 for (i = 0; i < freqs_count; i++) { in hi846_check_link_freqs()
1956 for (j = 0; j < ep->nr_of_link_frequencies; j++) in hi846_check_link_freqs()
1963 return 0; in hi846_check_link_freqs()
2030 return 0; in hi846_parse_dt()
2068 for (i = 0; i < HI846_NUM_SUPPLIES; i++) in hi846_probe()
2073 if (ret < 0) in hi846_probe()
2089 hi846->cur_mode = &supported_modes[0]; in hi846_probe()
2108 if (ret < 0) { in hi846_probe()
2118 return 0; in hi846_probe()