Lines Matching refs:cec_write_clr_set
396 static inline int cec_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val) in cec_write_clr_set() function
2256 cec_write_clr_set(sd, 0x2a, 0x01, 0x01); /* power up cec */ in adv7842_cec_adap_enable()
2258 cec_write_clr_set(sd, 0x11, 0x01, 0); /* initially disable tx */ in adv7842_cec_adap_enable()
2270 cec_write_clr_set(sd, 0x27, 0x70, 0x00); in adv7842_cec_adap_enable()
2272 cec_write_clr_set(sd, 0x2a, 0x01, 0x00); in adv7842_cec_adap_enable()
2289 cec_write_clr_set(sd, 0x27, 0x70, 0); in adv7842_cec_adap_log_addr()
2313 cec_write_clr_set(sd, 0x27, 0x10, 0x10); in adv7842_cec_adap_log_addr()
2315 cec_write_clr_set(sd, 0x28, 0x0f, addr); in adv7842_cec_adap_log_addr()
2319 cec_write_clr_set(sd, 0x27, 0x20, 0x20); in adv7842_cec_adap_log_addr()
2321 cec_write_clr_set(sd, 0x28, 0xf0, addr << 4); in adv7842_cec_adap_log_addr()
2325 cec_write_clr_set(sd, 0x27, 0x40, 0x40); in adv7842_cec_adap_log_addr()
2327 cec_write_clr_set(sd, 0x29, 0x0f, addr); in adv7842_cec_adap_log_addr()
2346 cec_write_clr_set(sd, 0x12, 0x70, max(1, attempts - 1) << 4); in adv7842_cec_adap_transmit()