Lines Matching +full:1 +full:- +full:sd
1 // SPDX-License-Identifier: GPL-2.0-only
3 * adv7604 - Analog Devices ADV7604 video decoder driver
11 * REF_01 - Analog devices, ADV7604, Register Settings Recommendations,
13 * REF_02 - Analog devices, Register map documentation, Documentation of
15 * REF_03 - Analog devices, ADV7604, Hardware Manual, Rev. F, August 2010
26 #include <linux/v4l2-dv-timings.h>
34 #include <media/v4l2-ctrls.h>
35 #include <media/v4l2-device.h>
36 #include <media/v4l2-event.h>
37 #include <media/v4l2-dv-timings.h>
38 #include <media/v4l2-fwnode.h>
42 MODULE_PARM_DESC(debug, "debug level (0-2)");
52 #define ADV76XX_RGB_OUT (1 << 1)
55 #define ADV7604_OP_FORMAT_SEL_10BIT (1 << 0)
59 #define ADV7604_OP_MODE_SEL_DDR_422 (1 << 5)
66 #define ADV76XX_OP_CH_SEL_GRB (1 << 5)
72 #define ADV76XX_OP_SWAP_CB_CR (1 << 0)
133 void (*set_termination)(struct v4l2_subdev *sd, bool enable);
134 void (*setup_irqs)(struct v4l2_subdev *sd);
135 unsigned int (*read_hdmi_pixelclock)(struct v4l2_subdev *sd);
136 unsigned int (*read_cable_det)(struct v4l2_subdev *sd);
138 /* 0 = AFE, 1 = HDMI */
174 struct v4l2_subdev sd; member
218 return state->info->has_afe; in adv76xx_has_afe()
325 /* ----------------------------------------------------------------------- */
327 static inline struct adv76xx_state *to_state(struct v4l2_subdev *sd) in to_state() argument
329 return container_of(sd, struct adv76xx_state, sd); in to_state()
342 /* ----------------------------------------------------------------------- */
347 struct i2c_client *client = state->i2c_clients[client_page]; in adv76xx_read_check()
351 err = regmap_read(state->regmap[client_page], reg, &val); in adv76xx_read_check()
355 client->addr, reg); in adv76xx_read_check()
371 struct regmap *regmap = state->regmap[client_page]; in adv76xx_write_block()
379 /* ----------------------------------------------------------------------- */
381 static inline int io_read(struct v4l2_subdev *sd, u8 reg) in io_read() argument
383 struct adv76xx_state *state = to_state(sd); in io_read()
388 static inline int io_write(struct v4l2_subdev *sd, u8 reg, u8 val) in io_write() argument
390 struct adv76xx_state *state = to_state(sd); in io_write()
392 return regmap_write(state->regmap[ADV76XX_PAGE_IO], reg, val); in io_write()
395 static inline int io_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, in io_write_clr_set() argument
398 return io_write(sd, reg, (io_read(sd, reg) & ~mask) | val); in io_write_clr_set()
401 static inline int __always_unused avlink_read(struct v4l2_subdev *sd, u8 reg) in avlink_read() argument
403 struct adv76xx_state *state = to_state(sd); in avlink_read()
408 static inline int __always_unused avlink_write(struct v4l2_subdev *sd, u8 reg, u8 val) in avlink_write() argument
410 struct adv76xx_state *state = to_state(sd); in avlink_write()
412 return regmap_write(state->regmap[ADV7604_PAGE_AVLINK], reg, val); in avlink_write()
415 static inline int cec_read(struct v4l2_subdev *sd, u8 reg) in cec_read() argument
417 struct adv76xx_state *state = to_state(sd); in cec_read()
422 static inline int cec_write(struct v4l2_subdev *sd, u8 reg, u8 val) in cec_write() argument
424 struct adv76xx_state *state = to_state(sd); in cec_write()
426 return regmap_write(state->regmap[ADV76XX_PAGE_CEC], reg, val); in cec_write()
429 static inline int cec_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, in cec_write_clr_set() argument
432 return cec_write(sd, reg, (cec_read(sd, reg) & ~mask) | val); in cec_write_clr_set()
435 static inline int infoframe_read(struct v4l2_subdev *sd, u8 reg) in infoframe_read() argument
437 struct adv76xx_state *state = to_state(sd); in infoframe_read()
442 static inline int __always_unused infoframe_write(struct v4l2_subdev *sd, u8 reg, u8 val) in infoframe_write() argument
444 struct adv76xx_state *state = to_state(sd); in infoframe_write()
446 return regmap_write(state->regmap[ADV76XX_PAGE_INFOFRAME], reg, val); in infoframe_write()
449 static inline int __always_unused afe_read(struct v4l2_subdev *sd, u8 reg) in afe_read() argument
451 struct adv76xx_state *state = to_state(sd); in afe_read()
456 static inline int afe_write(struct v4l2_subdev *sd, u8 reg, u8 val) in afe_write() argument
458 struct adv76xx_state *state = to_state(sd); in afe_write()
460 return regmap_write(state->regmap[ADV76XX_PAGE_AFE], reg, val); in afe_write()
463 static inline int rep_read(struct v4l2_subdev *sd, u8 reg) in rep_read() argument
465 struct adv76xx_state *state = to_state(sd); in rep_read()
470 static inline int rep_write(struct v4l2_subdev *sd, u8 reg, u8 val) in rep_write() argument
472 struct adv76xx_state *state = to_state(sd); in rep_write()
474 return regmap_write(state->regmap[ADV76XX_PAGE_REP], reg, val); in rep_write()
477 static inline int rep_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val) in rep_write_clr_set() argument
479 return rep_write(sd, reg, (rep_read(sd, reg) & ~mask) | val); in rep_write_clr_set()
482 static inline int __always_unused edid_read(struct v4l2_subdev *sd, u8 reg) in edid_read() argument
484 struct adv76xx_state *state = to_state(sd); in edid_read()
489 static inline int __always_unused edid_write(struct v4l2_subdev *sd, u8 reg, u8 val) in edid_write() argument
491 struct adv76xx_state *state = to_state(sd); in edid_write()
493 return regmap_write(state->regmap[ADV76XX_PAGE_EDID], reg, val); in edid_write()
496 static inline int edid_write_block(struct v4l2_subdev *sd, in edid_write_block() argument
499 struct adv76xx_state *state = to_state(sd); in edid_write_block()
504 v4l2_dbg(2, debug, sd, "%s: write EDID block (%d byte)\n", in edid_write_block()
508 len = (total_len - i) > I2C_SMBUS_BLOCK_MAX ? in edid_write_block()
510 (total_len - i); in edid_write_block()
522 const struct adv76xx_chip_info *info = state->info; in adv76xx_set_hpd()
525 if (info->type == ADV7604) { in adv76xx_set_hpd()
526 for (i = 0; i < state->info->num_dv_ports; ++i) in adv76xx_set_hpd()
527 gpiod_set_value_cansleep(state->hpd_gpio[i], hpd & BIT(i)); in adv76xx_set_hpd()
529 for (i = 0; i < state->info->num_dv_ports; ++i) in adv76xx_set_hpd()
530 io_write_clr_set(&state->sd, 0x20, 0x80 >> i, in adv76xx_set_hpd()
531 (!!(hpd & BIT(i))) << (7 - i)); in adv76xx_set_hpd()
534 v4l2_subdev_notify(&state->sd, ADV76XX_HOTPLUG, &hpd); in adv76xx_set_hpd()
542 struct v4l2_subdev *sd = &state->sd; in adv76xx_delayed_work_enable_hotplug() local
544 v4l2_dbg(2, debug, sd, "%s: enable hotplug\n", __func__); in adv76xx_delayed_work_enable_hotplug()
546 adv76xx_set_hpd(state, state->edid.present); in adv76xx_delayed_work_enable_hotplug()
549 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg) in hdmi_read() argument
551 struct adv76xx_state *state = to_state(sd); in hdmi_read()
556 static u16 hdmi_read16(struct v4l2_subdev *sd, u8 reg, u16 mask) in hdmi_read16() argument
558 return ((hdmi_read(sd, reg) << 8) | hdmi_read(sd, reg + 1)) & mask; in hdmi_read16()
561 static inline int hdmi_write(struct v4l2_subdev *sd, u8 reg, u8 val) in hdmi_write() argument
563 struct adv76xx_state *state = to_state(sd); in hdmi_write()
565 return regmap_write(state->regmap[ADV76XX_PAGE_HDMI], reg, val); in hdmi_write()
568 static inline int hdmi_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val) in hdmi_write_clr_set() argument
570 return hdmi_write(sd, reg, (hdmi_read(sd, reg) & ~mask) | val); in hdmi_write_clr_set()
573 static inline int __always_unused test_write(struct v4l2_subdev *sd, u8 reg, u8 val) in test_write() argument
575 struct adv76xx_state *state = to_state(sd); in test_write()
577 return regmap_write(state->regmap[ADV76XX_PAGE_TEST], reg, val); in test_write()
580 static inline int cp_read(struct v4l2_subdev *sd, u8 reg) in cp_read() argument
582 struct adv76xx_state *state = to_state(sd); in cp_read()
587 static u16 cp_read16(struct v4l2_subdev *sd, u8 reg, u16 mask) in cp_read16() argument
589 return ((cp_read(sd, reg) << 8) | cp_read(sd, reg + 1)) & mask; in cp_read16()
592 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val) in cp_write() argument
594 struct adv76xx_state *state = to_state(sd); in cp_write()
596 return regmap_write(state->regmap[ADV76XX_PAGE_CP], reg, val); in cp_write()
599 static inline int cp_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val) in cp_write_clr_set() argument
601 return cp_write(sd, reg, (cp_read(sd, reg) & ~mask) | val); in cp_write_clr_set()
604 static inline int __always_unused vdp_read(struct v4l2_subdev *sd, u8 reg) in vdp_read() argument
606 struct adv76xx_state *state = to_state(sd); in vdp_read()
611 static inline int __always_unused vdp_write(struct v4l2_subdev *sd, u8 reg, u8 val) in vdp_write() argument
613 struct adv76xx_state *state = to_state(sd); in vdp_write()
615 return regmap_write(state->regmap[ADV7604_PAGE_VDP], reg, val); in vdp_write()
622 static int adv76xx_read_reg(struct v4l2_subdev *sd, unsigned int reg) in adv76xx_read_reg() argument
624 struct adv76xx_state *state = to_state(sd); in adv76xx_read_reg()
629 if (page >= ADV76XX_PAGE_MAX || !(BIT(page) & state->info->page_mask)) in adv76xx_read_reg()
630 return -EINVAL; in adv76xx_read_reg()
633 err = regmap_read(state->regmap[page], reg, &val); in adv76xx_read_reg()
639 static int adv76xx_write_reg(struct v4l2_subdev *sd, unsigned int reg, u8 val) in adv76xx_write_reg() argument
641 struct adv76xx_state *state = to_state(sd); in adv76xx_write_reg()
644 if (page >= ADV76XX_PAGE_MAX || !(BIT(page) & state->info->page_mask)) in adv76xx_write_reg()
645 return -EINVAL; in adv76xx_write_reg()
649 return regmap_write(state->regmap[page], reg, val); in adv76xx_write_reg()
652 static void adv76xx_write_reg_seq(struct v4l2_subdev *sd, in adv76xx_write_reg_seq() argument
658 adv76xx_write_reg(sd, reg_seq[i].reg, reg_seq[i].val); in adv76xx_write_reg_seq()
661 /* -----------------------------------------------------------------------------
757 for (i = 0; i < state->info->nformats; ++i) { in adv76xx_format_info()
758 if (state->info->formats[i].code == code) in adv76xx_format_info()
759 return &state->info->formats[i]; in adv76xx_format_info()
765 /* ----------------------------------------------------------------------- */
767 static inline bool is_analog_input(struct v4l2_subdev *sd) in is_analog_input() argument
769 struct adv76xx_state *state = to_state(sd); in is_analog_input()
771 return state->selected_input == ADV7604_PAD_VGA_RGB || in is_analog_input()
772 state->selected_input == ADV7604_PAD_VGA_COMP; in is_analog_input()
775 static inline bool is_digital_input(struct v4l2_subdev *sd) in is_digital_input() argument
777 struct adv76xx_state *state = to_state(sd); in is_digital_input()
779 return state->selected_input == ADV76XX_PAD_HDMI_PORT_A || in is_digital_input()
780 state->selected_input == ADV7604_PAD_HDMI_PORT_B || in is_digital_input()
781 state->selected_input == ADV7604_PAD_HDMI_PORT_C || in is_digital_input()
782 state->selected_input == ADV7604_PAD_HDMI_PORT_D; in is_digital_input()
809 * case, pad value -1 returns the capabilities for the currently selected input.
812 adv76xx_get_dv_timings_cap(struct v4l2_subdev *sd, int pad) in adv76xx_get_dv_timings_cap() argument
814 if (pad == -1) { in adv76xx_get_dv_timings_cap()
815 struct adv76xx_state *state = to_state(sd); in adv76xx_get_dv_timings_cap()
817 pad = state->selected_input; in adv76xx_get_dv_timings_cap()
835 /* ----------------------------------------------------------------------- */
838 static void adv76xx_inv_register(struct v4l2_subdev *sd) in adv76xx_inv_register() argument
840 v4l2_info(sd, "0x000-0x0ff: IO Map\n"); in adv76xx_inv_register()
841 v4l2_info(sd, "0x100-0x1ff: AVLink Map\n"); in adv76xx_inv_register()
842 v4l2_info(sd, "0x200-0x2ff: CEC Map\n"); in adv76xx_inv_register()
843 v4l2_info(sd, "0x300-0x3ff: InfoFrame Map\n"); in adv76xx_inv_register()
844 v4l2_info(sd, "0x400-0x4ff: ESDP Map\n"); in adv76xx_inv_register()
845 v4l2_info(sd, "0x500-0x5ff: DPP Map\n"); in adv76xx_inv_register()
846 v4l2_info(sd, "0x600-0x6ff: AFE Map\n"); in adv76xx_inv_register()
847 v4l2_info(sd, "0x700-0x7ff: Repeater Map\n"); in adv76xx_inv_register()
848 v4l2_info(sd, "0x800-0x8ff: EDID Map\n"); in adv76xx_inv_register()
849 v4l2_info(sd, "0x900-0x9ff: HDMI Map\n"); in adv76xx_inv_register()
850 v4l2_info(sd, "0xa00-0xaff: Test Map\n"); in adv76xx_inv_register()
851 v4l2_info(sd, "0xb00-0xbff: CP Map\n"); in adv76xx_inv_register()
852 v4l2_info(sd, "0xc00-0xcff: VDP Map\n"); in adv76xx_inv_register()
855 static int adv76xx_g_register(struct v4l2_subdev *sd, in adv76xx_g_register() argument
860 ret = adv76xx_read_reg(sd, reg->reg); in adv76xx_g_register()
862 v4l2_info(sd, "Register %03llx not supported\n", reg->reg); in adv76xx_g_register()
863 adv76xx_inv_register(sd); in adv76xx_g_register()
867 reg->size = 1; in adv76xx_g_register()
868 reg->val = ret; in adv76xx_g_register()
873 static int adv76xx_s_register(struct v4l2_subdev *sd, in adv76xx_s_register() argument
878 ret = adv76xx_write_reg(sd, reg->reg, reg->val); in adv76xx_s_register()
880 v4l2_info(sd, "Register %03llx not supported\n", reg->reg); in adv76xx_s_register()
881 adv76xx_inv_register(sd); in adv76xx_s_register()
889 static unsigned int adv7604_read_cable_det(struct v4l2_subdev *sd) in adv7604_read_cable_det() argument
891 u8 value = io_read(sd, 0x6f); in adv7604_read_cable_det()
899 static unsigned int adv7611_read_cable_det(struct v4l2_subdev *sd) in adv7611_read_cable_det() argument
901 u8 value = io_read(sd, 0x6f); in adv7611_read_cable_det()
903 return value & 1; in adv7611_read_cable_det()
906 static unsigned int adv7612_read_cable_det(struct v4l2_subdev *sd) in adv7612_read_cable_det() argument
911 u8 value = io_read(sd, 0x6f); in adv7612_read_cable_det()
913 return value & 1; in adv7612_read_cable_det()
916 static int adv76xx_s_detect_tx_5v_ctrl(struct v4l2_subdev *sd) in adv76xx_s_detect_tx_5v_ctrl() argument
918 struct adv76xx_state *state = to_state(sd); in adv76xx_s_detect_tx_5v_ctrl()
919 const struct adv76xx_chip_info *info = state->info; in adv76xx_s_detect_tx_5v_ctrl()
920 u16 cable_det = info->read_cable_det(sd); in adv76xx_s_detect_tx_5v_ctrl()
922 return v4l2_ctrl_s_ctrl(state->detect_tx_5v_ctrl, cable_det); in adv76xx_s_detect_tx_5v_ctrl()
925 static int find_and_set_predefined_video_timings(struct v4l2_subdev *sd, in find_and_set_predefined_video_timings() argument
934 is_digital_input(sd) ? 250000 : 1000000, false)) in find_and_set_predefined_video_timings()
936 io_write(sd, 0x00, predef_vid_timings[i].vid_std); /* video std */ in find_and_set_predefined_video_timings()
937 io_write(sd, 0x01, (predef_vid_timings[i].v_freq << 4) + in find_and_set_predefined_video_timings()
942 return -1; in find_and_set_predefined_video_timings()
945 static int configure_predefined_video_timings(struct v4l2_subdev *sd, in configure_predefined_video_timings() argument
948 struct adv76xx_state *state = to_state(sd); in configure_predefined_video_timings()
951 v4l2_dbg(1, debug, sd, "%s", __func__); in configure_predefined_video_timings()
955 io_write(sd, 0x16, 0x43); in configure_predefined_video_timings()
956 io_write(sd, 0x17, 0x5a); in configure_predefined_video_timings()
959 cp_write_clr_set(sd, 0x81, 0x10, 0x00); in configure_predefined_video_timings()
960 cp_write(sd, 0x8f, 0x00); in configure_predefined_video_timings()
961 cp_write(sd, 0x90, 0x00); in configure_predefined_video_timings()
962 cp_write(sd, 0xa2, 0x00); in configure_predefined_video_timings()
963 cp_write(sd, 0xa3, 0x00); in configure_predefined_video_timings()
964 cp_write(sd, 0xa4, 0x00); in configure_predefined_video_timings()
965 cp_write(sd, 0xa5, 0x00); in configure_predefined_video_timings()
966 cp_write(sd, 0xa6, 0x00); in configure_predefined_video_timings()
967 cp_write(sd, 0xa7, 0x00); in configure_predefined_video_timings()
968 cp_write(sd, 0xab, 0x00); in configure_predefined_video_timings()
969 cp_write(sd, 0xac, 0x00); in configure_predefined_video_timings()
971 if (is_analog_input(sd)) { in configure_predefined_video_timings()
972 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
975 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
977 } else if (is_digital_input(sd)) { in configure_predefined_video_timings()
978 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
981 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
984 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in configure_predefined_video_timings()
985 __func__, state->selected_input); in configure_predefined_video_timings()
986 err = -1; in configure_predefined_video_timings()
993 static void configure_custom_video_timings(struct v4l2_subdev *sd, in configure_custom_video_timings() argument
996 struct adv76xx_state *state = to_state(sd); in configure_custom_video_timings()
999 u16 cp_start_sav = bt->hsync + bt->hbackporch - 4; in configure_custom_video_timings()
1000 u16 cp_start_eav = width - bt->hfrontporch; in configure_custom_video_timings()
1001 u16 cp_start_vbi = height - bt->vfrontporch; in configure_custom_video_timings()
1002 u16 cp_end_vbi = bt->vsync + bt->vbackporch; in configure_custom_video_timings()
1003 u16 ch1_fr_ll = (((u32)bt->pixelclock / 100) > 0) ? in configure_custom_video_timings()
1004 ((width * (ADV76XX_FSC / 100)) / ((u32)bt->pixelclock / 100)) : 0; in configure_custom_video_timings()
1010 v4l2_dbg(2, debug, sd, "%s\n", __func__); in configure_custom_video_timings()
1012 if (is_analog_input(sd)) { in configure_custom_video_timings()
1014 io_write(sd, 0x00, 0x07); /* video std */ in configure_custom_video_timings()
1015 io_write(sd, 0x01, 0x02); /* prim mode */ in configure_custom_video_timings()
1017 cp_write_clr_set(sd, 0x81, 0x10, 0x10); in configure_custom_video_timings()
1019 /* Should only be set in auto-graphics mode [REF_02, p. 91-92] */ in configure_custom_video_timings()
1021 /* IO-map reg. 0x16 and 0x17 should be written in sequence */ in configure_custom_video_timings()
1022 if (regmap_raw_write(state->regmap[ADV76XX_PAGE_IO], in configure_custom_video_timings()
1024 v4l2_err(sd, "writing to reg 0x16 and 0x17 failed\n"); in configure_custom_video_timings()
1026 /* active video - horizontal timing */ in configure_custom_video_timings()
1027 cp_write(sd, 0xa2, (cp_start_sav >> 4) & 0xff); in configure_custom_video_timings()
1028 cp_write(sd, 0xa3, ((cp_start_sav & 0x0f) << 4) | in configure_custom_video_timings()
1030 cp_write(sd, 0xa4, cp_start_eav & 0xff); in configure_custom_video_timings()
1032 /* active video - vertical timing */ in configure_custom_video_timings()
1033 cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff); in configure_custom_video_timings()
1034 cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) | in configure_custom_video_timings()
1036 cp_write(sd, 0xa7, cp_end_vbi & 0xff); in configure_custom_video_timings()
1037 } else if (is_digital_input(sd)) { in configure_custom_video_timings()
1040 io_write(sd, 0x00, 0x02); /* video std */ in configure_custom_video_timings()
1041 io_write(sd, 0x01, 0x06); /* prim mode */ in configure_custom_video_timings()
1043 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in configure_custom_video_timings()
1044 __func__, state->selected_input); in configure_custom_video_timings()
1047 cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7); in configure_custom_video_timings()
1048 cp_write(sd, 0x90, ch1_fr_ll & 0xff); in configure_custom_video_timings()
1049 cp_write(sd, 0xab, (height >> 4) & 0xff); in configure_custom_video_timings()
1050 cp_write(sd, 0xac, (height & 0x0f) << 4); in configure_custom_video_timings()
1053 static void adv76xx_set_offset(struct v4l2_subdev *sd, bool auto_offset, u16 offset_a, u16 offset_b… in adv76xx_set_offset() argument
1055 struct adv76xx_state *state = to_state(sd); in adv76xx_set_offset()
1064 v4l2_dbg(2, debug, sd, "%s: %s offset: a = 0x%x, b = 0x%x, c = 0x%x\n", in adv76xx_set_offset()
1068 offset_buf[0] = (cp_read(sd, 0x77) & 0xc0) | ((offset_a & 0x3f0) >> 4); in adv76xx_set_offset()
1069 offset_buf[1] = ((offset_a & 0x00f) << 4) | ((offset_b & 0x3c0) >> 6); in adv76xx_set_offset()
1074 if (regmap_raw_write(state->regmap[ADV76XX_PAGE_CP], in adv76xx_set_offset()
1076 v4l2_err(sd, "%s: i2c error writing to CP reg 0x77, 0x78, 0x79, 0x7a\n", __func__); in adv76xx_set_offset()
1079 static void adv76xx_set_gain(struct v4l2_subdev *sd, bool auto_gain, u16 gain_a, u16 gain_b, u16 ga… in adv76xx_set_gain() argument
1081 struct adv76xx_state *state = to_state(sd); in adv76xx_set_gain()
1083 u8 gain_man = 1; in adv76xx_set_gain()
1084 u8 agc_mode_man = 1; in adv76xx_set_gain()
1094 v4l2_dbg(2, debug, sd, "%s: %s gain: a = 0x%x, b = 0x%x, c = 0x%x\n", in adv76xx_set_gain()
1099 gain_buf[1] = (((gain_a & 0x00f) << 4) | ((gain_b & 0x3c0) >> 6)); in adv76xx_set_gain()
1104 if (regmap_raw_write(state->regmap[ADV76XX_PAGE_CP], in adv76xx_set_gain()
1106 v4l2_err(sd, "%s: i2c error writing to CP reg 0x73, 0x74, 0x75, 0x76\n", __func__); in adv76xx_set_gain()
1109 static void set_rgb_quantization_range(struct v4l2_subdev *sd) in set_rgb_quantization_range() argument
1111 struct adv76xx_state *state = to_state(sd); in set_rgb_quantization_range()
1112 bool rgb_output = io_read(sd, 0x02) & 0x02; in set_rgb_quantization_range()
1113 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80; in set_rgb_quantization_range()
1116 if (hdmi_signal && (io_read(sd, 0x60) & 1)) in set_rgb_quantization_range()
1117 y = infoframe_read(sd, 0x01) >> 5; in set_rgb_quantization_range()
1119 v4l2_dbg(2, debug, sd, "%s: RGB quantization range: %d, RGB out: %d, HDMI: %d\n", in set_rgb_quantization_range()
1120 __func__, state->rgb_quantization_range, in set_rgb_quantization_range()
1123 adv76xx_set_gain(sd, true, 0x0, 0x0, 0x0); in set_rgb_quantization_range()
1124 adv76xx_set_offset(sd, true, 0x0, 0x0, 0x0); in set_rgb_quantization_range()
1125 io_write_clr_set(sd, 0x02, 0x04, rgb_output ? 0 : 4); in set_rgb_quantization_range()
1127 switch (state->rgb_quantization_range) { in set_rgb_quantization_range()
1129 if (state->selected_input == ADV7604_PAD_VGA_RGB) { in set_rgb_quantization_range()
1131 * Set RGB full range (0-255) */ in set_rgb_quantization_range()
1132 io_write_clr_set(sd, 0x02, 0xf0, 0x10); in set_rgb_quantization_range()
1136 if (state->selected_input == ADV7604_PAD_VGA_COMP) { in set_rgb_quantization_range()
1139 io_write_clr_set(sd, 0x02, 0xf0, 0xf0); in set_rgb_quantization_range()
1146 io_write_clr_set(sd, 0x02, 0xf0, 0xf0); in set_rgb_quantization_range()
1150 /* Receiving DVI-D signal in set_rgb_quantization_range()
1153 if (state->timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) { in set_rgb_quantization_range()
1154 /* RGB limited range (16-235) */ in set_rgb_quantization_range()
1155 io_write_clr_set(sd, 0x02, 0xf0, 0x00); in set_rgb_quantization_range()
1157 /* RGB full range (0-255) */ in set_rgb_quantization_range()
1158 io_write_clr_set(sd, 0x02, 0xf0, 0x10); in set_rgb_quantization_range()
1160 if (is_digital_input(sd) && rgb_output) { in set_rgb_quantization_range()
1161 adv76xx_set_offset(sd, false, 0x40, 0x40, 0x40); in set_rgb_quantization_range()
1163 adv76xx_set_gain(sd, false, 0xe0, 0xe0, 0xe0); in set_rgb_quantization_range()
1164 adv76xx_set_offset(sd, false, 0x70, 0x70, 0x70); in set_rgb_quantization_range()
1169 if (state->selected_input == ADV7604_PAD_VGA_COMP) { in set_rgb_quantization_range()
1170 /* YCrCb limited range (16-235) */ in set_rgb_quantization_range()
1171 io_write_clr_set(sd, 0x02, 0xf0, 0x20); in set_rgb_quantization_range()
1178 /* RGB limited range (16-235) */ in set_rgb_quantization_range()
1179 io_write_clr_set(sd, 0x02, 0xf0, 0x00); in set_rgb_quantization_range()
1183 if (state->selected_input == ADV7604_PAD_VGA_COMP) { in set_rgb_quantization_range()
1184 /* YCrCb full range (0-255) */ in set_rgb_quantization_range()
1185 io_write_clr_set(sd, 0x02, 0xf0, 0x60); in set_rgb_quantization_range()
1192 /* RGB full range (0-255) */ in set_rgb_quantization_range()
1193 io_write_clr_set(sd, 0x02, 0xf0, 0x10); in set_rgb_quantization_range()
1195 if (is_analog_input(sd) || hdmi_signal) in set_rgb_quantization_range()
1198 /* Adjust gain/offset for DVI-D signals only */ in set_rgb_quantization_range()
1200 adv76xx_set_offset(sd, false, 0x40, 0x40, 0x40); in set_rgb_quantization_range()
1202 adv76xx_set_gain(sd, false, 0xe0, 0xe0, 0xe0); in set_rgb_quantization_range()
1203 adv76xx_set_offset(sd, false, 0x70, 0x70, 0x70); in set_rgb_quantization_range()
1211 struct v4l2_subdev *sd = in adv76xx_s_ctrl() local
1212 &container_of(ctrl->handler, struct adv76xx_state, hdl)->sd; in adv76xx_s_ctrl()
1214 struct adv76xx_state *state = to_state(sd); in adv76xx_s_ctrl()
1216 switch (ctrl->id) { in adv76xx_s_ctrl()
1218 cp_write(sd, 0x3c, ctrl->val); in adv76xx_s_ctrl()
1221 cp_write(sd, 0x3a, ctrl->val); in adv76xx_s_ctrl()
1224 cp_write(sd, 0x3b, ctrl->val); in adv76xx_s_ctrl()
1227 cp_write(sd, 0x3d, ctrl->val); in adv76xx_s_ctrl()
1230 state->rgb_quantization_range = ctrl->val; in adv76xx_s_ctrl()
1231 set_rgb_quantization_range(sd); in adv76xx_s_ctrl()
1235 return -EINVAL; in adv76xx_s_ctrl()
1240 afe_write(sd, 0xc8, ctrl->val); in adv76xx_s_ctrl()
1245 cp_write_clr_set(sd, 0xbf, 0x04, ctrl->val << 2); in adv76xx_s_ctrl()
1248 cp_write(sd, 0xc0, (ctrl->val & 0xff0000) >> 16); in adv76xx_s_ctrl()
1249 cp_write(sd, 0xc1, (ctrl->val & 0x00ff00) >> 8); in adv76xx_s_ctrl()
1250 cp_write(sd, 0xc2, (u8)(ctrl->val & 0x0000ff)); in adv76xx_s_ctrl()
1253 return -EINVAL; in adv76xx_s_ctrl()
1258 struct v4l2_subdev *sd = in adv76xx_g_volatile_ctrl() local
1259 &container_of(ctrl->handler, struct adv76xx_state, hdl)->sd; in adv76xx_g_volatile_ctrl()
1261 if (ctrl->id == V4L2_CID_DV_RX_IT_CONTENT_TYPE) { in adv76xx_g_volatile_ctrl()
1262 ctrl->val = V4L2_DV_IT_CONTENT_TYPE_NO_ITC; in adv76xx_g_volatile_ctrl()
1263 if ((io_read(sd, 0x60) & 1) && (infoframe_read(sd, 0x03) & 0x80)) in adv76xx_g_volatile_ctrl()
1264 ctrl->val = (infoframe_read(sd, 0x05) >> 4) & 3; in adv76xx_g_volatile_ctrl()
1267 return -EINVAL; in adv76xx_g_volatile_ctrl()
1270 /* ----------------------------------------------------------------------- */
1272 static inline bool no_power(struct v4l2_subdev *sd) in no_power() argument
1275 return io_read(sd, 0x0c) & 0x24; in no_power()
1278 static inline bool no_signal_tmds(struct v4l2_subdev *sd) in no_signal_tmds() argument
1280 struct adv76xx_state *state = to_state(sd); in no_signal_tmds()
1282 return !(io_read(sd, 0x6a) & (0x10 >> state->selected_input)); in no_signal_tmds()
1285 static inline bool no_lock_tmds(struct v4l2_subdev *sd) in no_lock_tmds() argument
1287 struct adv76xx_state *state = to_state(sd); in no_lock_tmds()
1288 const struct adv76xx_chip_info *info = state->info; in no_lock_tmds()
1290 return (io_read(sd, 0x6a) & info->tdms_lock_mask) != info->tdms_lock_mask; in no_lock_tmds()
1293 static inline bool is_hdmi(struct v4l2_subdev *sd) in is_hdmi() argument
1295 return hdmi_read(sd, 0x05) & 0x80; in is_hdmi()
1298 static inline bool no_lock_sspd(struct v4l2_subdev *sd) in no_lock_sspd() argument
1300 struct adv76xx_state *state = to_state(sd); in no_lock_sspd()
1310 return ((cp_read(sd, 0xb5) & 0xd0) != 0xd0); in no_lock_sspd()
1313 static inline bool no_lock_stdi(struct v4l2_subdev *sd) in no_lock_stdi() argument
1316 return !(cp_read(sd, 0xb1) & 0x80); in no_lock_stdi()
1319 static inline bool no_signal(struct v4l2_subdev *sd) in no_signal() argument
1323 ret = no_power(sd); in no_signal()
1325 ret |= no_lock_stdi(sd); in no_signal()
1326 ret |= no_lock_sspd(sd); in no_signal()
1328 if (is_digital_input(sd)) { in no_signal()
1329 ret |= no_lock_tmds(sd); in no_signal()
1330 ret |= no_signal_tmds(sd); in no_signal()
1336 static inline bool no_lock_cp(struct v4l2_subdev *sd) in no_lock_cp() argument
1338 struct adv76xx_state *state = to_state(sd); in no_lock_cp()
1345 return io_read(sd, 0x12) & 0x01; in no_lock_cp()
1348 static inline bool in_free_run(struct v4l2_subdev *sd) in in_free_run() argument
1350 return cp_read(sd, 0xff) & 0x10; in in_free_run()
1353 static int adv76xx_g_input_status(struct v4l2_subdev *sd, u32 *status) in adv76xx_g_input_status() argument
1356 *status |= no_power(sd) ? V4L2_IN_ST_NO_POWER : 0; in adv76xx_g_input_status()
1357 *status |= no_signal(sd) ? V4L2_IN_ST_NO_SIGNAL : 0; in adv76xx_g_input_status()
1358 if (!in_free_run(sd) && no_lock_cp(sd)) in adv76xx_g_input_status()
1359 *status |= is_digital_input(sd) ? in adv76xx_g_input_status()
1362 v4l2_dbg(1, debug, sd, "%s: status = 0x%x\n", __func__, *status); in adv76xx_g_input_status()
1367 /* ----------------------------------------------------------------------- */
1375 static int stdi2dv_timings(struct v4l2_subdev *sd, in stdi2dv_timings() argument
1379 struct adv76xx_state *state = to_state(sd); in stdi2dv_timings()
1380 u32 hfreq = (ADV76XX_FSC * 8) / stdi->bl; in stdi2dv_timings()
1388 adv76xx_get_dv_timings_cap(sd, -1), in stdi2dv_timings()
1391 if (vtotal(bt) != stdi->lcf + 1) in stdi2dv_timings()
1393 if (bt->vsync != stdi->lcvs) in stdi2dv_timings()
1398 if ((pix_clk < bt->pixelclock + 1000000) && in stdi2dv_timings()
1399 (pix_clk > bt->pixelclock - 1000000)) { in stdi2dv_timings()
1405 if (v4l2_detect_cvt(stdi->lcf + 1, hfreq, stdi->lcvs, 0, in stdi2dv_timings()
1406 (stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) | in stdi2dv_timings()
1407 (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0), in stdi2dv_timings()
1410 if (v4l2_detect_gtf(stdi->lcf + 1, hfreq, stdi->lcvs, in stdi2dv_timings()
1411 (stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) | in stdi2dv_timings()
1412 (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0), in stdi2dv_timings()
1413 false, state->aspect_ratio, timings)) in stdi2dv_timings()
1416 v4l2_dbg(2, debug, sd, in stdi2dv_timings()
1418 __func__, stdi->lcvs, stdi->lcf, stdi->bl, in stdi2dv_timings()
1419 stdi->hs_pol, stdi->vs_pol); in stdi2dv_timings()
1420 return -1; in stdi2dv_timings()
1424 static int read_stdi(struct v4l2_subdev *sd, struct stdi_readback *stdi) in read_stdi() argument
1426 struct adv76xx_state *state = to_state(sd); in read_stdi()
1427 const struct adv76xx_chip_info *info = state->info; in read_stdi()
1430 if (no_lock_stdi(sd) || no_lock_sspd(sd)) { in read_stdi()
1431 v4l2_dbg(2, debug, sd, "%s: STDI and/or SSPD not locked\n", __func__); in read_stdi()
1432 return -1; in read_stdi()
1436 stdi->bl = cp_read16(sd, 0xb1, 0x3fff); in read_stdi()
1437 stdi->lcf = cp_read16(sd, info->lcf_reg, 0x7ff); in read_stdi()
1438 stdi->lcvs = cp_read(sd, 0xb3) >> 3; in read_stdi()
1439 stdi->interlaced = io_read(sd, 0x12) & 0x10; in read_stdi()
1443 polarity = cp_read(sd, 0xb5); in read_stdi()
1445 stdi->hs_pol = polarity & 0x10 in read_stdi()
1446 ? (polarity & 0x08 ? '+' : '-') : 'x'; in read_stdi()
1447 stdi->vs_pol = polarity & 0x40 in read_stdi()
1448 ? (polarity & 0x20 ? '+' : '-') : 'x'; in read_stdi()
1450 stdi->hs_pol = 'x'; in read_stdi()
1451 stdi->vs_pol = 'x'; in read_stdi()
1454 polarity = hdmi_read(sd, 0x05); in read_stdi()
1455 stdi->hs_pol = polarity & 0x20 ? '+' : '-'; in read_stdi()
1456 stdi->vs_pol = polarity & 0x10 ? '+' : '-'; in read_stdi()
1459 if (no_lock_stdi(sd) || no_lock_sspd(sd)) { in read_stdi()
1460 v4l2_dbg(2, debug, sd, in read_stdi()
1462 return -1; in read_stdi()
1465 if (stdi->lcf < 239 || stdi->bl < 8 || stdi->bl == 0x3fff) { in read_stdi()
1466 v4l2_dbg(2, debug, sd, "%s: invalid signal\n", __func__); in read_stdi()
1468 return -1; in read_stdi()
1471 v4l2_dbg(2, debug, sd, in read_stdi()
1472 "%s: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %chsync, %cvsync, %s\n", in read_stdi()
1473 __func__, stdi->lcf, stdi->bl, stdi->lcvs, in read_stdi()
1474 stdi->hs_pol, stdi->vs_pol, in read_stdi()
1475 stdi->interlaced ? "interlaced" : "progressive"); in read_stdi()
1480 static int adv76xx_enum_dv_timings(struct v4l2_subdev *sd, in adv76xx_enum_dv_timings() argument
1483 struct adv76xx_state *state = to_state(sd); in adv76xx_enum_dv_timings()
1485 if (timings->pad >= state->source_pad) in adv76xx_enum_dv_timings()
1486 return -EINVAL; in adv76xx_enum_dv_timings()
1489 adv76xx_get_dv_timings_cap(sd, timings->pad), in adv76xx_enum_dv_timings()
1493 static int adv76xx_dv_timings_cap(struct v4l2_subdev *sd, in adv76xx_dv_timings_cap() argument
1496 struct adv76xx_state *state = to_state(sd); in adv76xx_dv_timings_cap()
1497 unsigned int pad = cap->pad; in adv76xx_dv_timings_cap()
1499 if (cap->pad >= state->source_pad) in adv76xx_dv_timings_cap()
1500 return -EINVAL; in adv76xx_dv_timings_cap()
1502 *cap = *adv76xx_get_dv_timings_cap(sd, pad); in adv76xx_dv_timings_cap()
1503 cap->pad = pad; in adv76xx_dv_timings_cap()
1510 static void adv76xx_fill_optional_dv_timings_fields(struct v4l2_subdev *sd, in adv76xx_fill_optional_dv_timings_fields() argument
1513 v4l2_find_dv_timings_cap(timings, adv76xx_get_dv_timings_cap(sd, -1), in adv76xx_fill_optional_dv_timings_fields()
1514 is_digital_input(sd) ? 250000 : 1000000, in adv76xx_fill_optional_dv_timings_fields()
1518 static unsigned int adv7604_read_hdmi_pixelclock(struct v4l2_subdev *sd) in adv7604_read_hdmi_pixelclock() argument
1522 a = hdmi_read(sd, 0x06); in adv7604_read_hdmi_pixelclock()
1523 b = hdmi_read(sd, 0x3b); in adv7604_read_hdmi_pixelclock()
1530 static unsigned int adv7611_read_hdmi_pixelclock(struct v4l2_subdev *sd) in adv7611_read_hdmi_pixelclock() argument
1534 a = hdmi_read(sd, 0x51); in adv7611_read_hdmi_pixelclock()
1535 b = hdmi_read(sd, 0x52); in adv7611_read_hdmi_pixelclock()
1539 return ((a << 1) | (b >> 7)) * 1000000 + (b & 0x7f) * 1000000 / 128; in adv7611_read_hdmi_pixelclock()
1542 static unsigned int adv76xx_read_hdmi_pixelclock(struct v4l2_subdev *sd) in adv76xx_read_hdmi_pixelclock() argument
1544 struct adv76xx_state *state = to_state(sd); in adv76xx_read_hdmi_pixelclock()
1545 const struct adv76xx_chip_info *info = state->info; in adv76xx_read_hdmi_pixelclock()
1548 freq = info->read_hdmi_pixelclock(sd); in adv76xx_read_hdmi_pixelclock()
1549 if (is_hdmi(sd)) { in adv76xx_read_hdmi_pixelclock()
1551 bits_per_channel = ((hdmi_read(sd, 0x0b) & 0x60) >> 4) + 8; in adv76xx_read_hdmi_pixelclock()
1552 pixelrepetition = (hdmi_read(sd, 0x05) & 0x0f) + 1; in adv76xx_read_hdmi_pixelclock()
1560 static int adv76xx_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, in adv76xx_query_dv_timings() argument
1563 struct adv76xx_state *state = to_state(sd); in adv76xx_query_dv_timings()
1564 const struct adv76xx_chip_info *info = state->info; in adv76xx_query_dv_timings()
1565 struct v4l2_bt_timings *bt = &timings->bt; in adv76xx_query_dv_timings()
1569 return -EINVAL; in adv76xx_query_dv_timings()
1573 if (no_signal(sd)) { in adv76xx_query_dv_timings()
1574 state->restart_stdi_once = true; in adv76xx_query_dv_timings()
1575 v4l2_dbg(1, debug, sd, "%s: no valid signal\n", __func__); in adv76xx_query_dv_timings()
1576 return -ENOLINK; in adv76xx_query_dv_timings()
1580 if (read_stdi(sd, &stdi)) { in adv76xx_query_dv_timings()
1581 v4l2_dbg(1, debug, sd, "%s: STDI/SSPD not locked\n", __func__); in adv76xx_query_dv_timings()
1582 return -ENOLINK; in adv76xx_query_dv_timings()
1584 bt->interlaced = stdi.interlaced ? in adv76xx_query_dv_timings()
1587 if (is_digital_input(sd)) { in adv76xx_query_dv_timings()
1588 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80; in adv76xx_query_dv_timings()
1592 w = hdmi_read16(sd, 0x07, info->linewidth_mask); in adv76xx_query_dv_timings()
1593 h = hdmi_read16(sd, 0x09, info->field0_height_mask); in adv76xx_query_dv_timings()
1595 if (hdmi_signal && (io_read(sd, 0x60) & 1)) in adv76xx_query_dv_timings()
1596 vic = infoframe_read(sd, 0x04); in adv76xx_query_dv_timings()
1599 bt->width == w && bt->height == h) in adv76xx_query_dv_timings()
1602 timings->type = V4L2_DV_BT_656_1120; in adv76xx_query_dv_timings()
1604 bt->width = w; in adv76xx_query_dv_timings()
1605 bt->height = h; in adv76xx_query_dv_timings()
1606 bt->pixelclock = adv76xx_read_hdmi_pixelclock(sd); in adv76xx_query_dv_timings()
1607 bt->hfrontporch = hdmi_read16(sd, 0x20, info->hfrontporch_mask); in adv76xx_query_dv_timings()
1608 bt->hsync = hdmi_read16(sd, 0x22, info->hsync_mask); in adv76xx_query_dv_timings()
1609 bt->hbackporch = hdmi_read16(sd, 0x24, info->hbackporch_mask); in adv76xx_query_dv_timings()
1610 bt->vfrontporch = hdmi_read16(sd, 0x2a, in adv76xx_query_dv_timings()
1611 info->field0_vfrontporch_mask) / 2; in adv76xx_query_dv_timings()
1612 bt->vsync = hdmi_read16(sd, 0x2e, info->field0_vsync_mask) / 2; in adv76xx_query_dv_timings()
1613 bt->vbackporch = hdmi_read16(sd, 0x32, in adv76xx_query_dv_timings()
1614 info->field0_vbackporch_mask) / 2; in adv76xx_query_dv_timings()
1615 bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) | in adv76xx_query_dv_timings()
1616 ((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0); in adv76xx_query_dv_timings()
1617 if (bt->interlaced == V4L2_DV_INTERLACED) { in adv76xx_query_dv_timings()
1618 bt->height += hdmi_read16(sd, 0x0b, in adv76xx_query_dv_timings()
1619 info->field1_height_mask); in adv76xx_query_dv_timings()
1620 bt->il_vfrontporch = hdmi_read16(sd, 0x2c, in adv76xx_query_dv_timings()
1621 info->field1_vfrontporch_mask) / 2; in adv76xx_query_dv_timings()
1622 bt->il_vsync = hdmi_read16(sd, 0x30, in adv76xx_query_dv_timings()
1623 info->field1_vsync_mask) / 2; in adv76xx_query_dv_timings()
1624 bt->il_vbackporch = hdmi_read16(sd, 0x34, in adv76xx_query_dv_timings()
1625 info->field1_vbackporch_mask) / 2; in adv76xx_query_dv_timings()
1627 adv76xx_fill_optional_dv_timings_fields(sd, timings); in adv76xx_query_dv_timings()
1630 * Since LCVS values are inaccurate [REF_03, p. 275-276], in adv76xx_query_dv_timings()
1631 * stdi2dv_timings() is called with lcvs +-1 if the first attempt fails. in adv76xx_query_dv_timings()
1633 if (!stdi2dv_timings(sd, &stdi, timings)) in adv76xx_query_dv_timings()
1635 stdi.lcvs += 1; in adv76xx_query_dv_timings()
1636 v4l2_dbg(1, debug, sd, "%s: lcvs + 1 = %d\n", __func__, stdi.lcvs); in adv76xx_query_dv_timings()
1637 if (!stdi2dv_timings(sd, &stdi, timings)) in adv76xx_query_dv_timings()
1639 stdi.lcvs -= 2; in adv76xx_query_dv_timings()
1640 v4l2_dbg(1, debug, sd, "%s: lcvs - 1 = %d\n", __func__, stdi.lcvs); in adv76xx_query_dv_timings()
1641 if (stdi2dv_timings(sd, &stdi, timings)) { in adv76xx_query_dv_timings()
1651 if (state->restart_stdi_once) { in adv76xx_query_dv_timings()
1652 v4l2_dbg(1, debug, sd, "%s: restart STDI\n", __func__); in adv76xx_query_dv_timings()
1654 /* enter one-shot mode */ in adv76xx_query_dv_timings()
1655 cp_write_clr_set(sd, 0x86, 0x06, 0x00); in adv76xx_query_dv_timings()
1657 cp_write_clr_set(sd, 0x86, 0x06, 0x04); in adv76xx_query_dv_timings()
1659 cp_write_clr_set(sd, 0x86, 0x06, 0x02); in adv76xx_query_dv_timings()
1660 state->restart_stdi_once = false; in adv76xx_query_dv_timings()
1661 return -ENOLINK; in adv76xx_query_dv_timings()
1663 v4l2_dbg(1, debug, sd, "%s: format not supported\n", __func__); in adv76xx_query_dv_timings()
1664 return -ERANGE; in adv76xx_query_dv_timings()
1666 state->restart_stdi_once = true; in adv76xx_query_dv_timings()
1670 if (no_signal(sd)) { in adv76xx_query_dv_timings()
1671 v4l2_dbg(1, debug, sd, "%s: signal lost during readout\n", __func__); in adv76xx_query_dv_timings()
1673 return -ENOLINK; in adv76xx_query_dv_timings()
1676 if ((is_analog_input(sd) && bt->pixelclock > 170000000) || in adv76xx_query_dv_timings()
1677 (is_digital_input(sd) && bt->pixelclock > 225000000)) { in adv76xx_query_dv_timings()
1678 v4l2_dbg(1, debug, sd, "%s: pixelclock out of range %d\n", in adv76xx_query_dv_timings()
1679 __func__, (u32)bt->pixelclock); in adv76xx_query_dv_timings()
1680 return -ERANGE; in adv76xx_query_dv_timings()
1683 if (debug > 1) in adv76xx_query_dv_timings()
1684 v4l2_print_dv_timings(sd->name, "adv76xx_query_dv_timings: ", in adv76xx_query_dv_timings()
1690 static int adv76xx_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, in adv76xx_s_dv_timings() argument
1693 struct adv76xx_state *state = to_state(sd); in adv76xx_s_dv_timings()
1698 return -EINVAL; in adv76xx_s_dv_timings()
1700 if (v4l2_match_dv_timings(&state->timings, timings, 0, false)) { in adv76xx_s_dv_timings()
1701 v4l2_dbg(1, debug, sd, "%s: no change\n", __func__); in adv76xx_s_dv_timings()
1705 bt = &timings->bt; in adv76xx_s_dv_timings()
1707 if (!v4l2_valid_dv_timings(timings, adv76xx_get_dv_timings_cap(sd, -1), in adv76xx_s_dv_timings()
1709 return -ERANGE; in adv76xx_s_dv_timings()
1711 adv76xx_fill_optional_dv_timings_fields(sd, timings); in adv76xx_s_dv_timings()
1713 state->timings = *timings; in adv76xx_s_dv_timings()
1715 cp_write_clr_set(sd, 0x91, 0x40, bt->interlaced ? 0x40 : 0x00); in adv76xx_s_dv_timings()
1718 err = configure_predefined_video_timings(sd, timings); in adv76xx_s_dv_timings()
1722 configure_custom_video_timings(sd, bt); in adv76xx_s_dv_timings()
1725 set_rgb_quantization_range(sd); in adv76xx_s_dv_timings()
1727 if (debug > 1) in adv76xx_s_dv_timings()
1728 v4l2_print_dv_timings(sd->name, "adv76xx_s_dv_timings: ", in adv76xx_s_dv_timings()
1733 static int adv76xx_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, in adv76xx_g_dv_timings() argument
1736 struct adv76xx_state *state = to_state(sd); in adv76xx_g_dv_timings()
1738 *timings = state->timings; in adv76xx_g_dv_timings()
1742 static void adv7604_set_termination(struct v4l2_subdev *sd, bool enable) in adv7604_set_termination() argument
1744 hdmi_write(sd, 0x01, enable ? 0x00 : 0x78); in adv7604_set_termination()
1747 static void adv7611_set_termination(struct v4l2_subdev *sd, bool enable) in adv7611_set_termination() argument
1749 hdmi_write(sd, 0x83, enable ? 0xfe : 0xff); in adv7611_set_termination()
1752 static void enable_input(struct v4l2_subdev *sd) in enable_input() argument
1754 struct adv76xx_state *state = to_state(sd); in enable_input()
1756 if (is_analog_input(sd)) { in enable_input()
1757 io_write(sd, 0x15, 0xb0); /* Disable Tristate of Pins (no audio) */ in enable_input()
1758 } else if (is_digital_input(sd)) { in enable_input()
1759 hdmi_write_clr_set(sd, 0x00, 0x03, state->selected_input); in enable_input()
1760 state->info->set_termination(sd, true); in enable_input()
1761 io_write(sd, 0x15, 0xa0); /* Disable Tristate of Pins */ in enable_input()
1762 hdmi_write_clr_set(sd, 0x1a, 0x10, 0x00); /* Unmute audio */ in enable_input()
1764 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in enable_input()
1765 __func__, state->selected_input); in enable_input()
1769 static void disable_input(struct v4l2_subdev *sd) in disable_input() argument
1771 struct adv76xx_state *state = to_state(sd); in disable_input()
1773 hdmi_write_clr_set(sd, 0x1a, 0x10, 0x10); /* Mute audio */ in disable_input()
1775 io_write(sd, 0x15, 0xbe); /* Tristate all outputs from video core */ in disable_input()
1776 state->info->set_termination(sd, false); in disable_input()
1779 static void select_input(struct v4l2_subdev *sd) in select_input() argument
1781 struct adv76xx_state *state = to_state(sd); in select_input()
1782 const struct adv76xx_chip_info *info = state->info; in select_input()
1784 if (is_analog_input(sd)) { in select_input()
1785 adv76xx_write_reg_seq(sd, info->recommended_settings[0]); in select_input()
1787 afe_write(sd, 0x00, 0x08); /* power up ADC */ in select_input()
1788 afe_write(sd, 0x01, 0x06); /* power up Analog Front End */ in select_input()
1789 afe_write(sd, 0xc8, 0x00); /* phase control */ in select_input()
1790 } else if (is_digital_input(sd)) { in select_input()
1791 hdmi_write(sd, 0x00, state->selected_input & 0x03); in select_input()
1793 adv76xx_write_reg_seq(sd, info->recommended_settings[1]); in select_input()
1796 afe_write(sd, 0x00, 0xff); /* power down ADC */ in select_input()
1797 afe_write(sd, 0x01, 0xfe); /* power down Analog Front End */ in select_input()
1798 afe_write(sd, 0xc8, 0x40); /* phase control */ in select_input()
1801 cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */ in select_input()
1802 cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */ in select_input()
1803 cp_write(sd, 0x40, 0x80); /* CP core pre-gain control. Graphics mode */ in select_input()
1805 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in select_input()
1806 __func__, state->selected_input); in select_input()
1810 cp_write_clr_set(sd, 0x3e, 0x80, 0x80); in select_input()
1813 static int adv76xx_s_routing(struct v4l2_subdev *sd, in adv76xx_s_routing() argument
1816 struct adv76xx_state *state = to_state(sd); in adv76xx_s_routing()
1818 v4l2_dbg(2, debug, sd, "%s: input %d, selected input %d", in adv76xx_s_routing()
1819 __func__, input, state->selected_input); in adv76xx_s_routing()
1821 if (input == state->selected_input) in adv76xx_s_routing()
1824 if (input > state->info->max_port) in adv76xx_s_routing()
1825 return -EINVAL; in adv76xx_s_routing()
1827 state->selected_input = input; in adv76xx_s_routing()
1829 disable_input(sd); in adv76xx_s_routing()
1830 select_input(sd); in adv76xx_s_routing()
1831 enable_input(sd); in adv76xx_s_routing()
1833 v4l2_subdev_notify_event(sd, &adv76xx_ev_fmt); in adv76xx_s_routing()
1838 static int adv76xx_enum_mbus_code(struct v4l2_subdev *sd, in adv76xx_enum_mbus_code() argument
1842 struct adv76xx_state *state = to_state(sd); in adv76xx_enum_mbus_code()
1844 if (code->index >= state->info->nformats) in adv76xx_enum_mbus_code()
1845 return -EINVAL; in adv76xx_enum_mbus_code()
1847 code->code = state->info->formats[code->index].code; in adv76xx_enum_mbus_code()
1857 format->width = state->timings.bt.width; in adv76xx_fill_format()
1858 format->height = state->timings.bt.height; in adv76xx_fill_format()
1859 format->field = V4L2_FIELD_NONE; in adv76xx_fill_format()
1860 format->colorspace = V4L2_COLORSPACE_SRGB; in adv76xx_fill_format()
1862 if (state->timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) in adv76xx_fill_format()
1863 format->colorspace = (state->timings.bt.height <= 576) ? in adv76xx_fill_format()
1876 * | GBR(0) GRB(1) BGR(2) RGB(3) BRG(4) RBG(5)
1877 * ----------+-------------------------------------------------
1879 * GRB (1-2) | BGR RGB GBR GRB RBG BRG
1880 * RBG (2-3) | GRB GBR BRG RBG BGR RGB
1881 * BGR (1-3) | RBG BRG RGB BGR GRB GBR
1894 _BUS(GRB) /* 1-2 */ = _SEL(BGR, RGB, GBR, GRB, RBG, BRG), in adv76xx_op_ch_sel()
1895 _BUS(RBG) /* 2-3 */ = _SEL(GRB, GBR, BRG, RBG, BGR, RGB), in adv76xx_op_ch_sel()
1896 _BUS(BGR) /* 1-3 */ = _SEL(RBG, BRG, RGB, BGR, GRB, GBR), in adv76xx_op_ch_sel()
1901 return op_ch_sel[state->pdata.bus_order][state->format->op_ch_sel >> 5]; in adv76xx_op_ch_sel()
1906 struct v4l2_subdev *sd = &state->sd; in adv76xx_setup_format() local
1908 io_write_clr_set(sd, 0x02, 0x02, in adv76xx_setup_format()
1909 state->format->rgb_out ? ADV76XX_RGB_OUT : 0); in adv76xx_setup_format()
1910 io_write(sd, 0x03, state->format->op_format_sel | in adv76xx_setup_format()
1911 state->pdata.op_format_mode_sel); in adv76xx_setup_format()
1912 io_write_clr_set(sd, 0x04, 0xe0, adv76xx_op_ch_sel(state)); in adv76xx_setup_format()
1913 io_write_clr_set(sd, 0x05, 0x01, in adv76xx_setup_format()
1914 state->format->swap_cb_cr ? ADV76XX_OP_SWAP_CB_CR : 0); in adv76xx_setup_format()
1915 set_rgb_quantization_range(sd); in adv76xx_setup_format()
1918 static int adv76xx_get_format(struct v4l2_subdev *sd, in adv76xx_get_format() argument
1922 struct adv76xx_state *state = to_state(sd); in adv76xx_get_format()
1924 if (format->pad != state->source_pad) in adv76xx_get_format()
1925 return -EINVAL; in adv76xx_get_format()
1927 adv76xx_fill_format(state, &format->format); in adv76xx_get_format()
1929 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { in adv76xx_get_format()
1932 fmt = v4l2_subdev_state_get_format(sd_state, format->pad); in adv76xx_get_format()
1933 format->format.code = fmt->code; in adv76xx_get_format()
1935 format->format.code = state->format->code; in adv76xx_get_format()
1941 static int adv76xx_get_selection(struct v4l2_subdev *sd, in adv76xx_get_selection() argument
1945 struct adv76xx_state *state = to_state(sd); in adv76xx_get_selection()
1947 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) in adv76xx_get_selection()
1948 return -EINVAL; in adv76xx_get_selection()
1950 if (sel->target > V4L2_SEL_TGT_CROP_BOUNDS) in adv76xx_get_selection()
1951 return -EINVAL; in adv76xx_get_selection()
1953 sel->r.left = 0; in adv76xx_get_selection()
1954 sel->r.top = 0; in adv76xx_get_selection()
1955 sel->r.width = state->timings.bt.width; in adv76xx_get_selection()
1956 sel->r.height = state->timings.bt.height; in adv76xx_get_selection()
1961 static int adv76xx_set_format(struct v4l2_subdev *sd, in adv76xx_set_format() argument
1965 struct adv76xx_state *state = to_state(sd); in adv76xx_set_format()
1968 if (format->pad != state->source_pad) in adv76xx_set_format()
1969 return -EINVAL; in adv76xx_set_format()
1971 info = adv76xx_format_info(state, format->format.code); in adv76xx_set_format()
1975 adv76xx_fill_format(state, &format->format); in adv76xx_set_format()
1976 format->format.code = info->code; in adv76xx_set_format()
1978 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { in adv76xx_set_format()
1981 fmt = v4l2_subdev_state_get_format(sd_state, format->pad); in adv76xx_set_format()
1982 fmt->code = format->format.code; in adv76xx_set_format()
1984 state->format = info; in adv76xx_set_format()
1992 static void adv76xx_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status) in adv76xx_cec_tx_raw_status() argument
1994 struct adv76xx_state *state = to_state(sd); in adv76xx_cec_tx_raw_status()
1996 if ((cec_read(sd, 0x11) & 0x01) == 0) { in adv76xx_cec_tx_raw_status()
1997 v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__); in adv76xx_cec_tx_raw_status()
2002 v4l2_dbg(1, debug, sd, "%s: tx raw: arbitration lost\n", in adv76xx_cec_tx_raw_status()
2004 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_ARB_LOST, in adv76xx_cec_tx_raw_status()
2005 1, 0, 0, 0); in adv76xx_cec_tx_raw_status()
2013 v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__); in adv76xx_cec_tx_raw_status()
2019 nack_cnt = cec_read(sd, 0x14) & 0xf; in adv76xx_cec_tx_raw_status()
2022 low_drive_cnt = cec_read(sd, 0x14) >> 4; in adv76xx_cec_tx_raw_status()
2025 cec_transmit_done(state->cec_adap, status, in adv76xx_cec_tx_raw_status()
2030 v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__); in adv76xx_cec_tx_raw_status()
2031 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_OK, 0, 0, 0, 0); in adv76xx_cec_tx_raw_status()
2036 static void adv76xx_cec_isr(struct v4l2_subdev *sd, bool *handled) in adv76xx_cec_isr() argument
2038 struct adv76xx_state *state = to_state(sd); in adv76xx_cec_isr()
2039 const struct adv76xx_chip_info *info = state->info; in adv76xx_cec_isr()
2043 cec_irq = io_read(sd, info->cec_irq_status) & 0x0f; in adv76xx_cec_isr()
2047 v4l2_dbg(1, debug, sd, "%s: cec: irq 0x%x\n", __func__, cec_irq); in adv76xx_cec_isr()
2048 adv76xx_cec_tx_raw_status(sd, cec_irq); in adv76xx_cec_isr()
2052 msg.len = cec_read(sd, 0x25) & 0x1f; in adv76xx_cec_isr()
2060 msg.msg[i] = cec_read(sd, i + 0x15); in adv76xx_cec_isr()
2061 cec_write(sd, info->cec_rx_enable, in adv76xx_cec_isr()
2062 info->cec_rx_enable_mask); /* re-enable rx */ in adv76xx_cec_isr()
2063 cec_received_msg(state->cec_adap, &msg); in adv76xx_cec_isr()
2067 if (info->cec_irq_swap) { in adv76xx_cec_isr()
2072 cec_irq = ((cec_irq & 0x08) >> 3) | ((cec_irq & 0x04) >> 1) | in adv76xx_cec_isr()
2073 ((cec_irq & 0x02) << 1) | ((cec_irq & 0x01) << 3); in adv76xx_cec_isr()
2075 io_write(sd, info->cec_irq_status + 1, cec_irq); in adv76xx_cec_isr()
2084 const struct adv76xx_chip_info *info = state->info; in adv76xx_cec_adap_enable()
2085 struct v4l2_subdev *sd = &state->sd; in adv76xx_cec_adap_enable() local
2087 if (!state->cec_enabled_adap && enable) { in adv76xx_cec_adap_enable()
2088 cec_write_clr_set(sd, 0x2a, 0x01, 0x01); /* power up cec */ in adv76xx_cec_adap_enable()
2089 cec_write(sd, 0x2c, 0x01); /* cec soft reset */ in adv76xx_cec_adap_enable()
2090 cec_write_clr_set(sd, 0x11, 0x01, 0); /* initially disable tx */ in adv76xx_cec_adap_enable()
2096 io_write_clr_set(sd, info->cec_irq_status + 3, 0x0f, 0x0f); in adv76xx_cec_adap_enable()
2097 cec_write(sd, info->cec_rx_enable, info->cec_rx_enable_mask); in adv76xx_cec_adap_enable()
2098 } else if (state->cec_enabled_adap && !enable) { in adv76xx_cec_adap_enable()
2100 io_write_clr_set(sd, info->cec_irq_status + 3, 0x0f, 0x00); in adv76xx_cec_adap_enable()
2101 /* disable address mask 1-3 */ in adv76xx_cec_adap_enable()
2102 cec_write_clr_set(sd, 0x27, 0x70, 0x00); in adv76xx_cec_adap_enable()
2104 cec_write_clr_set(sd, 0x2a, 0x01, 0x00); in adv76xx_cec_adap_enable()
2105 state->cec_valid_addrs = 0; in adv76xx_cec_adap_enable()
2107 state->cec_enabled_adap = enable; in adv76xx_cec_adap_enable()
2108 adv76xx_s_detect_tx_5v_ctrl(sd); in adv76xx_cec_adap_enable()
2115 struct v4l2_subdev *sd = &state->sd; in adv76xx_cec_adap_log_addr() local
2118 if (!state->cec_enabled_adap) in adv76xx_cec_adap_log_addr()
2119 return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO; in adv76xx_cec_adap_log_addr()
2122 cec_write_clr_set(sd, 0x27, 0x70, 0); in adv76xx_cec_adap_log_addr()
2123 state->cec_valid_addrs = 0; in adv76xx_cec_adap_log_addr()
2128 bool is_valid = state->cec_valid_addrs & (1 << i); in adv76xx_cec_adap_log_addr()
2132 if (is_valid && state->cec_addr[i] == addr) in adv76xx_cec_adap_log_addr()
2138 return -ENXIO; in adv76xx_cec_adap_log_addr()
2140 state->cec_addr[i] = addr; in adv76xx_cec_adap_log_addr()
2141 state->cec_valid_addrs |= 1 << i; in adv76xx_cec_adap_log_addr()
2146 cec_write_clr_set(sd, 0x27, 0x10, 0x10); in adv76xx_cec_adap_log_addr()
2148 cec_write_clr_set(sd, 0x28, 0x0f, addr); in adv76xx_cec_adap_log_addr()
2150 case 1: in adv76xx_cec_adap_log_addr()
2151 /* enable address mask 1 */ in adv76xx_cec_adap_log_addr()
2152 cec_write_clr_set(sd, 0x27, 0x20, 0x20); in adv76xx_cec_adap_log_addr()
2153 /* set address for mask 1 */ in adv76xx_cec_adap_log_addr()
2154 cec_write_clr_set(sd, 0x28, 0xf0, addr << 4); in adv76xx_cec_adap_log_addr()
2158 cec_write_clr_set(sd, 0x27, 0x40, 0x40); in adv76xx_cec_adap_log_addr()
2159 /* set address for mask 1 */ in adv76xx_cec_adap_log_addr()
2160 cec_write_clr_set(sd, 0x29, 0x0f, addr); in adv76xx_cec_adap_log_addr()
2170 struct v4l2_subdev *sd = &state->sd; in adv76xx_cec_adap_transmit() local
2171 u8 len = msg->len; in adv76xx_cec_adap_transmit()
2175 * The number of retries is the number of attempts - 1, but retry in adv76xx_cec_adap_transmit()
2179 cec_write_clr_set(sd, 0x12, 0x70, max(1, attempts - 1) << 4); in adv76xx_cec_adap_transmit()
2182 v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len); in adv76xx_cec_adap_transmit()
2183 return -EINVAL; in adv76xx_cec_adap_transmit()
2188 cec_write(sd, i, msg->msg[i]); in adv76xx_cec_adap_transmit()
2191 cec_write(sd, 0x10, len); in adv76xx_cec_adap_transmit()
2193 cec_write(sd, 0x11, 0x01); in adv76xx_cec_adap_transmit()
2204 static int adv76xx_isr(struct v4l2_subdev *sd, u32 status, bool *handled) in adv76xx_isr() argument
2206 struct adv76xx_state *state = to_state(sd); in adv76xx_isr()
2207 const struct adv76xx_chip_info *info = state->info; in adv76xx_isr()
2208 const u8 irq_reg_0x43 = io_read(sd, 0x43); in adv76xx_isr()
2209 const u8 irq_reg_0x6b = io_read(sd, 0x6b); in adv76xx_isr()
2210 const u8 irq_reg_0x70 = io_read(sd, 0x70); in adv76xx_isr()
2216 io_write(sd, 0x44, irq_reg_0x43); in adv76xx_isr()
2218 io_write(sd, 0x71, irq_reg_0x70); in adv76xx_isr()
2220 io_write(sd, 0x6c, irq_reg_0x6b); in adv76xx_isr()
2222 v4l2_dbg(2, debug, sd, "%s: ", __func__); in adv76xx_isr()
2226 fmt_change_digital = is_digital_input(sd) in adv76xx_isr()
2227 ? irq_reg_0x6b & info->fmt_change_digital_mask in adv76xx_isr()
2231 v4l2_dbg(1, debug, sd, in adv76xx_isr()
2235 v4l2_subdev_notify_event(sd, &adv76xx_ev_fmt); in adv76xx_isr()
2242 v4l2_dbg(1, debug, sd, "%s: irq %s mode\n", __func__, in adv76xx_isr()
2243 (io_read(sd, 0x6a) & 0x01) ? "HDMI" : "DVI"); in adv76xx_isr()
2244 set_rgb_quantization_range(sd); in adv76xx_isr()
2251 adv76xx_cec_isr(sd, handled); in adv76xx_isr()
2255 tx_5v = irq_reg_0x70 & info->cable_det_mask; in adv76xx_isr()
2257 v4l2_dbg(1, debug, sd, "%s: tx_5v: 0x%x\n", __func__, tx_5v); in adv76xx_isr()
2258 adv76xx_s_detect_tx_5v_ctrl(sd); in adv76xx_isr()
2270 adv76xx_isr(&state->sd, 0, &handled); in adv76xx_irq_handler()
2275 static int adv76xx_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid) in adv76xx_get_edid() argument
2277 struct adv76xx_state *state = to_state(sd); in adv76xx_get_edid()
2280 memset(edid->reserved, 0, sizeof(edid->reserved)); in adv76xx_get_edid()
2282 switch (edid->pad) { in adv76xx_get_edid()
2287 if (state->edid.present & (1 << edid->pad)) in adv76xx_get_edid()
2288 data = state->edid.edid; in adv76xx_get_edid()
2291 return -EINVAL; in adv76xx_get_edid()
2294 if (edid->start_block == 0 && edid->blocks == 0) { in adv76xx_get_edid()
2295 edid->blocks = data ? state->edid.blocks : 0; in adv76xx_get_edid()
2300 return -ENODATA; in adv76xx_get_edid()
2302 if (edid->start_block >= state->edid.blocks) in adv76xx_get_edid()
2303 return -EINVAL; in adv76xx_get_edid()
2305 if (edid->start_block + edid->blocks > state->edid.blocks) in adv76xx_get_edid()
2306 edid->blocks = state->edid.blocks - edid->start_block; in adv76xx_get_edid()
2308 memcpy(edid->edid, data + edid->start_block * 128, edid->blocks * 128); in adv76xx_get_edid()
2313 static int adv76xx_set_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid) in adv76xx_set_edid() argument
2315 struct adv76xx_state *state = to_state(sd); in adv76xx_set_edid()
2316 const struct adv76xx_chip_info *info = state->info; in adv76xx_set_edid()
2322 memset(edid->reserved, 0, sizeof(edid->reserved)); in adv76xx_set_edid()
2324 if (edid->pad > ADV7604_PAD_HDMI_PORT_D) in adv76xx_set_edid()
2325 return -EINVAL; in adv76xx_set_edid()
2326 if (edid->start_block != 0) in adv76xx_set_edid()
2327 return -EINVAL; in adv76xx_set_edid()
2328 if (edid->blocks == 0) { in adv76xx_set_edid()
2330 state->edid.present &= ~(1 << edid->pad); in adv76xx_set_edid()
2331 adv76xx_set_hpd(state, state->edid.present); in adv76xx_set_edid()
2332 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present); in adv76xx_set_edid()
2335 state->aspect_ratio.numerator = 16; in adv76xx_set_edid()
2336 state->aspect_ratio.denominator = 9; in adv76xx_set_edid()
2338 if (!state->edid.present) { in adv76xx_set_edid()
2339 state->edid.blocks = 0; in adv76xx_set_edid()
2340 cec_phys_addr_invalidate(state->cec_adap); in adv76xx_set_edid()
2343 v4l2_dbg(2, debug, sd, "%s: clear EDID pad %d, edid.present = 0x%x\n", in adv76xx_set_edid()
2344 __func__, edid->pad, state->edid.present); in adv76xx_set_edid()
2347 if (edid->blocks > ADV76XX_MAX_EDID_BLOCKS) { in adv76xx_set_edid()
2348 edid->blocks = ADV76XX_MAX_EDID_BLOCKS; in adv76xx_set_edid()
2349 return -E2BIG; in adv76xx_set_edid()
2352 pa = v4l2_get_edid_phys_addr(edid->edid, edid->blocks * 128, &spa_loc); in adv76xx_set_edid()
2363 pa = (edid->edid[spa_loc] << 8) | edid->edid[spa_loc + 1]; in adv76xx_set_edid()
2366 v4l2_dbg(2, debug, sd, "%s: write EDID pad %d, edid.present = 0x%x\n", in adv76xx_set_edid()
2367 __func__, edid->pad, state->edid.present); in adv76xx_set_edid()
2370 cancel_delayed_work_sync(&state->delayed_work_enable_hotplug); in adv76xx_set_edid()
2372 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, 0x00); in adv76xx_set_edid()
2374 switch (edid->pad) { in adv76xx_set_edid()
2376 state->spa_port_a[0] = pa >> 8; in adv76xx_set_edid()
2377 state->spa_port_a[1] = pa & 0xff; in adv76xx_set_edid()
2380 rep_write(sd, info->edid_spa_port_b_reg, pa >> 8); in adv76xx_set_edid()
2381 rep_write(sd, info->edid_spa_port_b_reg + 1, pa & 0xff); in adv76xx_set_edid()
2384 rep_write(sd, info->edid_spa_port_b_reg + 2, pa >> 8); in adv76xx_set_edid()
2385 rep_write(sd, info->edid_spa_port_b_reg + 3, pa & 0xff); in adv76xx_set_edid()
2388 rep_write(sd, info->edid_spa_port_b_reg + 4, pa >> 8); in adv76xx_set_edid()
2389 rep_write(sd, info->edid_spa_port_b_reg + 5, pa & 0xff); in adv76xx_set_edid()
2392 return -EINVAL; in adv76xx_set_edid()
2395 if (info->edid_spa_loc_reg) { in adv76xx_set_edid()
2396 u8 mask = info->edid_spa_loc_msb_mask; in adv76xx_set_edid()
2398 rep_write(sd, info->edid_spa_loc_reg, spa_loc & 0xff); in adv76xx_set_edid()
2399 rep_write_clr_set(sd, info->edid_spa_loc_reg + 1, in adv76xx_set_edid()
2403 edid->edid[spa_loc] = state->spa_port_a[0]; in adv76xx_set_edid()
2404 edid->edid[spa_loc + 1] = state->spa_port_a[1]; in adv76xx_set_edid()
2406 memcpy(state->edid.edid, edid->edid, 128 * edid->blocks); in adv76xx_set_edid()
2407 state->edid.blocks = edid->blocks; in adv76xx_set_edid()
2408 state->aspect_ratio = v4l2_calc_aspect_ratio(edid->edid[0x15], in adv76xx_set_edid()
2409 edid->edid[0x16]); in adv76xx_set_edid()
2410 state->edid.present |= 1 << edid->pad; in adv76xx_set_edid()
2412 rep_write_clr_set(sd, info->edid_segment_reg, in adv76xx_set_edid()
2413 info->edid_segment_mask, 0); in adv76xx_set_edid()
2414 err = edid_write_block(sd, 128 * min(edid->blocks, 2U), state->edid.edid); in adv76xx_set_edid()
2416 v4l2_err(sd, "error %d writing edid pad %d\n", err, edid->pad); in adv76xx_set_edid()
2419 if (edid->blocks > 2) { in adv76xx_set_edid()
2420 rep_write_clr_set(sd, info->edid_segment_reg, in adv76xx_set_edid()
2421 info->edid_segment_mask, in adv76xx_set_edid()
2422 info->edid_segment_mask); in adv76xx_set_edid()
2423 err = edid_write_block(sd, 128 * (edid->blocks - 2), in adv76xx_set_edid()
2424 state->edid.edid + 256); in adv76xx_set_edid()
2426 v4l2_err(sd, "error %d writing edid pad %d\n", in adv76xx_set_edid()
2427 err, edid->pad); in adv76xx_set_edid()
2434 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present); in adv76xx_set_edid()
2437 if (rep_read(sd, info->edid_status_reg) & state->edid.present) in adv76xx_set_edid()
2439 mdelay(1); in adv76xx_set_edid()
2442 v4l2_err(sd, "error enabling edid (0x%x)\n", state->edid.present); in adv76xx_set_edid()
2443 return -EIO; in adv76xx_set_edid()
2445 cec_s_phys_addr(state->cec_adap, parent_pa, false); in adv76xx_set_edid()
2448 schedule_delayed_work(&state->delayed_work_enable_hotplug, HZ / 10); in adv76xx_set_edid()
2452 /*********** avi info frame CEA-861-E **************/
2461 static int adv76xx_read_infoframe(struct v4l2_subdev *sd, int index, in adv76xx_read_infoframe() argument
2468 if (!(io_read(sd, 0x60) & adv76xx_cri[index].present_mask)) { in adv76xx_read_infoframe()
2469 v4l2_info(sd, "%s infoframe not received\n", in adv76xx_read_infoframe()
2471 return -ENOENT; in adv76xx_read_infoframe()
2475 buffer[i] = infoframe_read(sd, in adv76xx_read_infoframe()
2478 len = buffer[2] + 1; in adv76xx_read_infoframe()
2481 v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, in adv76xx_read_infoframe()
2483 return -ENOENT; in adv76xx_read_infoframe()
2487 buffer[i + 3] = infoframe_read(sd, in adv76xx_read_infoframe()
2491 v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__, in adv76xx_read_infoframe()
2493 return -ENOENT; in adv76xx_read_infoframe()
2498 static void adv76xx_log_infoframes(struct v4l2_subdev *sd) in adv76xx_log_infoframes() argument
2502 if (!is_hdmi(sd)) { in adv76xx_log_infoframes()
2503 v4l2_info(sd, "receive DVI-D signal, no infoframes\n"); in adv76xx_log_infoframes()
2509 struct i2c_client *client = v4l2_get_subdevdata(sd); in adv76xx_log_infoframes()
2511 if (!adv76xx_read_infoframe(sd, i, &frame)) in adv76xx_log_infoframes()
2512 hdmi_infoframe_log(KERN_INFO, &client->dev, &frame); in adv76xx_log_infoframes()
2516 static int adv76xx_log_status(struct v4l2_subdev *sd) in adv76xx_log_status() argument
2518 struct adv76xx_state *state = to_state(sd); in adv76xx_log_status()
2519 const struct adv76xx_chip_info *info = state->info; in adv76xx_log_status()
2527 "bypassed", "YPbPr601 -> RGB", "reserved", "YPbPr709 -> RGB", in adv76xx_log_status()
2528 "reserved", "RGB -> YPbPr601", "reserved", "RGB -> YPbPr709", in adv76xx_log_status()
2529 "reserved", "YPbPr709 -> YPbPr601", "YPbPr601 -> YPbPr709", in adv76xx_log_status()
2533 "RGB limited range (16-235)", "RGB full range (0-255)", in adv76xx_log_status()
2534 "YCbCr Bt.601 (16-235)", "YCbCr Bt.709 (16-235)", in adv76xx_log_status()
2536 "YCbCr Bt.601 (0-255)", "YCbCr Bt.709 (0-255)", in adv76xx_log_status()
2541 "RGB limited range (16-235)", "RGB full range (0-255)", in adv76xx_log_status()
2542 "YCbCr Bt.601 (16-235)", "YCbCr Bt.709 (16-235)", in adv76xx_log_status()
2544 "YCbCr Bt.601 (0-255)", "YCbCr Bt.709 (0-255)", in adv76xx_log_status()
2550 "RGB limited range (16-235)", in adv76xx_log_status()
2551 "RGB full range (0-255)", in adv76xx_log_status()
2554 "8-bits per channel", in adv76xx_log_status()
2555 "10-bits per channel", in adv76xx_log_status()
2556 "12-bits per channel", in adv76xx_log_status()
2557 "16-bits per channel (not supported)" in adv76xx_log_status()
2560 v4l2_info(sd, "-----Chip status-----\n"); in adv76xx_log_status()
2561 v4l2_info(sd, "Chip power: %s\n", no_power(sd) ? "off" : "on"); in adv76xx_log_status()
2562 edid_enabled = rep_read(sd, info->edid_status_reg); in adv76xx_log_status()
2563 v4l2_info(sd, "EDID enabled port A: %s, B: %s, C: %s, D: %s\n", in adv76xx_log_status()
2568 v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ? in adv76xx_log_status()
2570 if (state->cec_enabled_adap) { in adv76xx_log_status()
2574 bool is_valid = state->cec_valid_addrs & (1 << i); in adv76xx_log_status()
2577 v4l2_info(sd, "CEC Logical Address: 0x%x\n", in adv76xx_log_status()
2578 state->cec_addr[i]); in adv76xx_log_status()
2582 v4l2_info(sd, "-----Signal status-----\n"); in adv76xx_log_status()
2583 cable_det = info->read_cable_det(sd); in adv76xx_log_status()
2584 v4l2_info(sd, "Cable detected (+5V power) port A: %s, B: %s, C: %s, D: %s\n", in adv76xx_log_status()
2589 v4l2_info(sd, "TMDS signal detected: %s\n", in adv76xx_log_status()
2590 no_signal_tmds(sd) ? "false" : "true"); in adv76xx_log_status()
2591 v4l2_info(sd, "TMDS signal locked: %s\n", in adv76xx_log_status()
2592 no_lock_tmds(sd) ? "false" : "true"); in adv76xx_log_status()
2593 v4l2_info(sd, "SSPD locked: %s\n", no_lock_sspd(sd) ? "false" : "true"); in adv76xx_log_status()
2594 v4l2_info(sd, "STDI locked: %s\n", no_lock_stdi(sd) ? "false" : "true"); in adv76xx_log_status()
2595 v4l2_info(sd, "CP locked: %s\n", no_lock_cp(sd) ? "false" : "true"); in adv76xx_log_status()
2596 v4l2_info(sd, "CP free run: %s\n", in adv76xx_log_status()
2597 (in_free_run(sd)) ? "on" : "off"); in adv76xx_log_status()
2598 v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x, v_freq = 0x%x\n", in adv76xx_log_status()
2599 io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f, in adv76xx_log_status()
2600 (io_read(sd, 0x01) & 0x70) >> 4); in adv76xx_log_status()
2602 v4l2_info(sd, "-----Video Timings-----\n"); in adv76xx_log_status()
2603 if (read_stdi(sd, &stdi)) in adv76xx_log_status()
2604 v4l2_info(sd, "STDI: not locked\n"); in adv76xx_log_status()
2606 …v4l2_info(sd, "STDI: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %s, %chsync, %cvsync… in adv76xx_log_status()
2610 if (adv76xx_query_dv_timings(sd, 0, &timings)) in adv76xx_log_status()
2611 v4l2_info(sd, "No video detected\n"); in adv76xx_log_status()
2613 v4l2_print_dv_timings(sd->name, "Detected format: ", in adv76xx_log_status()
2615 v4l2_print_dv_timings(sd->name, "Configured format: ", in adv76xx_log_status()
2616 &state->timings, true); in adv76xx_log_status()
2618 if (no_signal(sd)) in adv76xx_log_status()
2621 v4l2_info(sd, "-----Color space-----\n"); in adv76xx_log_status()
2622 v4l2_info(sd, "RGB quantization range ctrl: %s\n", in adv76xx_log_status()
2623 rgb_quantization_range_txt[state->rgb_quantization_range]); in adv76xx_log_status()
2625 ret = io_read(sd, 0x02); in adv76xx_log_status()
2627 v4l2_info(sd, "Can't read Input/Output color space\n"); in adv76xx_log_status()
2631 v4l2_info(sd, "Input color space: %s\n", in adv76xx_log_status()
2633 v4l2_info(sd, "Output color space: %s %s, alt-gamma %s\n", in adv76xx_log_status()
2636 "(16-235)" : "(0-255)", in adv76xx_log_status()
2639 v4l2_info(sd, "Color space conversion: %s\n", in adv76xx_log_status()
2640 csc_coeff_sel_rb[cp_read(sd, info->cp_csc) >> 4]); in adv76xx_log_status()
2642 if (!is_digital_input(sd)) in adv76xx_log_status()
2645 v4l2_info(sd, "-----%s status-----\n", is_hdmi(sd) ? "HDMI" : "DVI-D"); in adv76xx_log_status()
2646 v4l2_info(sd, "Digital video port selected: %c\n", in adv76xx_log_status()
2647 (hdmi_read(sd, 0x00) & 0x03) + 'A'); in adv76xx_log_status()
2648 v4l2_info(sd, "HDCP encrypted content: %s\n", in adv76xx_log_status()
2649 (hdmi_read(sd, 0x05) & 0x40) ? "true" : "false"); in adv76xx_log_status()
2650 v4l2_info(sd, "HDCP keys read: %s%s\n", in adv76xx_log_status()
2651 (hdmi_read(sd, 0x04) & 0x20) ? "yes" : "no", in adv76xx_log_status()
2652 (hdmi_read(sd, 0x04) & 0x10) ? "ERROR" : ""); in adv76xx_log_status()
2653 if (is_hdmi(sd)) { in adv76xx_log_status()
2654 bool audio_pll_locked = hdmi_read(sd, 0x04) & 0x01; in adv76xx_log_status()
2655 bool audio_sample_packet_detect = hdmi_read(sd, 0x18) & 0x01; in adv76xx_log_status()
2656 bool audio_mute = io_read(sd, 0x65) & 0x40; in adv76xx_log_status()
2658 v4l2_info(sd, "Audio: pll %s, samples %s, %s\n", in adv76xx_log_status()
2663 v4l2_info(sd, "Audio format: %s\n", in adv76xx_log_status()
2664 (hdmi_read(sd, 0x07) & 0x20) ? "multi-channel" : "stereo"); in adv76xx_log_status()
2666 v4l2_info(sd, "Audio CTS: %u\n", (hdmi_read(sd, 0x5b) << 12) + in adv76xx_log_status()
2667 (hdmi_read(sd, 0x5c) << 8) + in adv76xx_log_status()
2668 (hdmi_read(sd, 0x5d) & 0xf0)); in adv76xx_log_status()
2669 v4l2_info(sd, "Audio N: %u\n", ((hdmi_read(sd, 0x5d) & 0x0f) << 16) + in adv76xx_log_status()
2670 (hdmi_read(sd, 0x5e) << 8) + in adv76xx_log_status()
2671 hdmi_read(sd, 0x5f)); in adv76xx_log_status()
2672 v4l2_info(sd, "AV Mute: %s\n", (hdmi_read(sd, 0x04) & 0x40) ? "on" : "off"); in adv76xx_log_status()
2674 v4l2_info(sd, "Deep color mode: %s\n", deep_color_mode_txt[(hdmi_read(sd, 0x0b) & 0x60) >> 5]); in adv76xx_log_status()
2675 v4l2_info(sd, "HDMI colorspace: %s\n", hdmi_color_space_txt[hdmi_read(sd, 0x53) & 0xf]); in adv76xx_log_status()
2677 adv76xx_log_infoframes(sd); in adv76xx_log_status()
2683 static int adv76xx_subscribe_event(struct v4l2_subdev *sd, in adv76xx_subscribe_event() argument
2687 switch (sub->type) { in adv76xx_subscribe_event()
2689 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub); in adv76xx_subscribe_event()
2691 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub); in adv76xx_subscribe_event()
2693 return -EINVAL; in adv76xx_subscribe_event()
2697 static int adv76xx_registered(struct v4l2_subdev *sd) in adv76xx_registered() argument
2699 struct adv76xx_state *state = to_state(sd); in adv76xx_registered()
2700 struct i2c_client *client = v4l2_get_subdevdata(sd); in adv76xx_registered()
2703 err = cec_register_adapter(state->cec_adap, &client->dev); in adv76xx_registered()
2705 cec_delete_adapter(state->cec_adap); in adv76xx_registered()
2709 static void adv76xx_unregistered(struct v4l2_subdev *sd) in adv76xx_unregistered() argument
2711 struct adv76xx_state *state = to_state(sd); in adv76xx_unregistered()
2713 cec_unregister_adapter(state->cec_adap); in adv76xx_unregistered()
2716 /* ----------------------------------------------------------------------- */
2764 /* -------------------------- custom ctrls ---------------------------------- */
2773 .step = 1,
2784 .step = 1,
2799 /* ----------------------------------------------------------------------- */
2822 static int adv76xx_core_init(struct v4l2_subdev *sd) in adv76xx_core_init() argument
2824 struct adv76xx_state *state = to_state(sd); in adv76xx_core_init()
2825 const struct adv76xx_chip_info *info = state->info; in adv76xx_core_init()
2826 struct adv76xx_platform_data *pdata = &state->pdata; in adv76xx_core_init()
2828 hdmi_write(sd, 0x48, in adv76xx_core_init()
2829 (pdata->disable_pwrdnb ? 0x80 : 0) | in adv76xx_core_init()
2830 (pdata->disable_cable_det_rst ? 0x40 : 0)); in adv76xx_core_init()
2832 disable_input(sd); in adv76xx_core_init()
2834 if (pdata->default_input >= 0 && in adv76xx_core_init()
2835 pdata->default_input < state->source_pad) { in adv76xx_core_init()
2836 state->selected_input = pdata->default_input; in adv76xx_core_init()
2837 select_input(sd); in adv76xx_core_init()
2838 enable_input(sd); in adv76xx_core_init()
2842 io_write(sd, 0x0c, 0x42); /* Power up part and power down VDP */ in adv76xx_core_init()
2843 io_write(sd, 0x0b, 0x44); /* Power down ESDP block */ in adv76xx_core_init()
2844 cp_write(sd, 0xcf, 0x01); /* Power down macrovision */ in adv76xx_core_init()
2847 if (info->type != ADV7604) { in adv76xx_core_init()
2849 io_write_clr_set(sd, 0x20, 0xc0, 0); in adv76xx_core_init()
2853 * AND the manual HPD control is set to 1. in adv76xx_core_init()
2855 hdmi_write_clr_set(sd, 0x6c, 0xf6, 0x26); in adv76xx_core_init()
2859 io_write_clr_set(sd, 0x02, 0x0f, pdata->alt_gamma << 3); in adv76xx_core_init()
2860 io_write_clr_set(sd, 0x05, 0x0e, pdata->blank_data << 3 | in adv76xx_core_init()
2861 pdata->insert_av_codes << 2 | in adv76xx_core_init()
2862 pdata->replicate_av_codes << 1); in adv76xx_core_init()
2865 cp_write(sd, 0x69, 0x30); /* Enable CP CSC */ in adv76xx_core_init()
2868 io_write(sd, 0x06, 0xa0 | pdata->inv_vs_pol << 2 | in adv76xx_core_init()
2869 pdata->inv_hs_pol << 1 | pdata->inv_llc_pol); in adv76xx_core_init()
2872 io_write(sd, 0x14, 0x40 | pdata->dr_str_data << 4 | in adv76xx_core_init()
2873 pdata->dr_str_clk << 2 | in adv76xx_core_init()
2874 pdata->dr_str_sync); in adv76xx_core_init()
2876 cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01); /* HDMI free run */ in adv76xx_core_init()
2877 cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */ in adv76xx_core_init()
2878 cp_write(sd, 0xf9, 0x23); /* STDI ch. 1 - LCVS change threshold - in adv76xx_core_init()
2880 cp_write(sd, 0x45, 0x23); /* STDI ch. 2 - LCVS change threshold - in adv76xx_core_init()
2882 cp_write(sd, 0xc9, 0x2d); /* use prim_mode and vid_std as free run resolution in adv76xx_core_init()
2886 hdmi_write_clr_set(sd, 0x15, 0x03, 0x03); /* Mute on FIFO over-/underflow [REF_01, c. 1.2.18] */ in adv76xx_core_init()
2887 hdmi_write_clr_set(sd, 0x1a, 0x0e, 0x08); /* Wait 1 s before unmute */ in adv76xx_core_init()
2888 hdmi_write_clr_set(sd, 0x68, 0x06, 0x06); /* FIFO reset on over-/underflow [REF_01, c. 1.2.19] */ in adv76xx_core_init()
2891 afe_write(sd, 0xb5, 0x01); /* Setting MCLK to 256Fs */ in adv76xx_core_init()
2894 afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */ in adv76xx_core_init()
2895 io_write_clr_set(sd, 0x30, 1 << 4, pdata->output_bus_lsb_to_msb << 4); in adv76xx_core_init()
2899 io_write(sd, 0x40, 0xc0 | pdata->int1_config); /* Configure INT1 */ in adv76xx_core_init()
2900 io_write(sd, 0x46, 0x98); /* Enable SSPD, STDI and CP unlocked interrupts */ in adv76xx_core_init()
2901 …io_write(sd, 0x6e, info->fmt_change_digital_mask); /* Enable V_LOCKED and DE_REGEN_LCK interrupts … in adv76xx_core_init()
2902 io_write(sd, 0x73, info->cable_det_mask); /* Enable cable detection (+5v) interrupts */ in adv76xx_core_init()
2903 info->setup_irqs(sd); in adv76xx_core_init()
2905 return v4l2_ctrl_handler_setup(sd->ctrl_handler); in adv76xx_core_init()
2908 static void adv7604_setup_irqs(struct v4l2_subdev *sd) in adv7604_setup_irqs() argument
2910 io_write(sd, 0x41, 0xd7); /* STDI irq for any change, disable INT2 */ in adv7604_setup_irqs()
2913 static void adv7611_setup_irqs(struct v4l2_subdev *sd) in adv7611_setup_irqs() argument
2915 io_write(sd, 0x41, 0xd0); /* STDI irq for any change, disable INT2 */ in adv7611_setup_irqs()
2918 static void adv7612_setup_irqs(struct v4l2_subdev *sd) in adv7612_setup_irqs() argument
2920 io_write(sd, 0x41, 0xd0); /* disable INT2 */ in adv7612_setup_irqs()
2927 for (i = 1; i < ARRAY_SIZE(state->i2c_clients); ++i) in adv76xx_unregister_clients()
2928 i2c_unregister_device(state->i2c_clients[i]); in adv76xx_unregister_clients()
2931 static struct i2c_client *adv76xx_dummy_client(struct v4l2_subdev *sd, in adv76xx_dummy_client() argument
2934 struct i2c_client *client = v4l2_get_subdevdata(sd); in adv76xx_dummy_client()
2935 struct adv76xx_state *state = to_state(sd); in adv76xx_dummy_client()
2936 struct adv76xx_platform_data *pdata = &state->pdata; in adv76xx_dummy_client()
2940 if (pdata && pdata->i2c_addresses[page]) in adv76xx_dummy_client()
2941 new_client = i2c_new_dummy_device(client->adapter, in adv76xx_dummy_client()
2942 pdata->i2c_addresses[page]); in adv76xx_dummy_client()
2949 io_write(sd, io_reg, new_client->addr << 1); in adv76xx_dummy_client()
2959 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x00 }, /* DDC bus active pull-up control */
2974 { ADV76XX_REG(ADV76XX_PAGE_CP, 0x3e), 0x04 }, /* CP core pre-gain control */
2976 { ADV76XX_REG(ADV76XX_PAGE_CP, 0x40), 0x5c }, /* CP core pre-gain control. Graphics mode */
2985 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x10 }, /* DDC bus active pull-up control */
3064 [1] = adv7604_recommended_settings_hdmi,
3068 [1] = ARRAY_SIZE(adv7604_recommended_settings_hdmi),
3094 .num_dv_ports = 1,
3114 [1] = adv7611_recommended_settings_hdmi,
3117 [1] = ARRAY_SIZE(adv7611_recommended_settings_hdmi),
3140 .num_dv_ports = 1, /* normally 2 */
3163 [1] = adv7612_recommended_settings_hdmi,
3166 [1] = ARRAY_SIZE(adv7612_recommended_settings_hdmi),
3213 np = state->i2c_clients[ADV76XX_PAGE_IO]->dev.of_node; in adv76xx_parse_dt()
3216 endpoint = of_graph_get_endpoint_by_regs(np, -1, -1); in adv76xx_parse_dt()
3218 return -EINVAL; in adv76xx_parse_dt()
3225 if (!of_property_read_u32(np, "default-input", &v)) in adv76xx_parse_dt()
3226 state->pdata.default_input = v; in adv76xx_parse_dt()
3228 state->pdata.default_input = -1; in adv76xx_parse_dt()
3233 state->pdata.inv_hs_pol = 1; in adv76xx_parse_dt()
3236 state->pdata.inv_vs_pol = 1; in adv76xx_parse_dt()
3239 state->pdata.inv_llc_pol = 1; in adv76xx_parse_dt()
3242 state->pdata.insert_av_codes = 1; in adv76xx_parse_dt()
3244 /* Disable the interrupt for now as no DT-based board uses it. */ in adv76xx_parse_dt()
3245 state->pdata.int1_config = ADV76XX_INT1_CONFIG_ACTIVE_HIGH; in adv76xx_parse_dt()
3248 state->pdata.disable_pwrdnb = 0; in adv76xx_parse_dt()
3249 state->pdata.disable_cable_det_rst = 0; in adv76xx_parse_dt()
3250 state->pdata.blank_data = 1; in adv76xx_parse_dt()
3251 state->pdata.op_format_mode_sel = ADV7604_OP_FORMAT_MODE0; in adv76xx_parse_dt()
3252 state->pdata.bus_order = ADV7604_BUS_ORDER_RGB; in adv76xx_parse_dt()
3253 state->pdata.dr_str_data = ADV76XX_DR_STR_MEDIUM_HIGH; in adv76xx_parse_dt()
3254 state->pdata.dr_str_clk = ADV76XX_DR_STR_MEDIUM_HIGH; in adv76xx_parse_dt()
3255 state->pdata.dr_str_sync = ADV76XX_DR_STR_MEDIUM_HIGH; in adv76xx_parse_dt()
3372 if (!state->i2c_clients[region]) in configure_regmap()
3373 return -ENODEV; in configure_regmap()
3375 state->regmap[region] = in configure_regmap()
3376 devm_regmap_init_i2c(state->i2c_clients[region], in configure_regmap()
3379 if (IS_ERR(state->regmap[region])) { in configure_regmap()
3380 err = PTR_ERR(state->regmap[region]); in configure_regmap()
3381 v4l_err(state->i2c_clients[region], in configure_regmap()
3384 return -EINVAL; in configure_regmap()
3396 if (err && (err != -ENODEV)) in configure_regmaps()
3404 if (state->reset_gpio) { in adv76xx_reset()
3406 gpiod_set_value_cansleep(state->reset_gpio, 0); in adv76xx_reset()
3408 gpiod_set_value_cansleep(state->reset_gpio, 1); in adv76xx_reset()
3423 struct v4l2_subdev *sd; in adv76xx_probe() local
3429 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) in adv76xx_probe()
3430 return -EIO; in adv76xx_probe()
3431 v4l_dbg(1, debug, client, "detecting adv76xx client on address 0x%x\n", in adv76xx_probe()
3432 client->addr << 1); in adv76xx_probe()
3434 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL); in adv76xx_probe()
3436 return -ENOMEM; in adv76xx_probe()
3438 state->i2c_clients[ADV76XX_PAGE_IO] = client; in adv76xx_probe()
3441 state->restart_stdi_once = true; in adv76xx_probe()
3442 state->selected_input = ~0; in adv76xx_probe()
3444 if (IS_ENABLED(CONFIG_OF) && client->dev.of_node) { in adv76xx_probe()
3447 oid = of_match_node(adv76xx_of_id, client->dev.of_node); in adv76xx_probe()
3448 state->info = oid->data; in adv76xx_probe()
3455 } else if (client->dev.platform_data) { in adv76xx_probe()
3456 struct adv76xx_platform_data *pdata = client->dev.platform_data; in adv76xx_probe()
3458 state->info = (const struct adv76xx_chip_info *)id->driver_data; in adv76xx_probe()
3459 state->pdata = *pdata; in adv76xx_probe()
3462 return -ENODEV; in adv76xx_probe()
3466 for (i = 0; i < state->info->num_dv_ports; ++i) { in adv76xx_probe()
3467 state->hpd_gpio[i] = in adv76xx_probe()
3468 devm_gpiod_get_index_optional(&client->dev, "hpd", i, in adv76xx_probe()
3470 if (IS_ERR(state->hpd_gpio[i])) in adv76xx_probe()
3471 return PTR_ERR(state->hpd_gpio[i]); in adv76xx_probe()
3473 if (state->hpd_gpio[i]) in adv76xx_probe()
3476 state->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", in adv76xx_probe()
3478 if (IS_ERR(state->reset_gpio)) in adv76xx_probe()
3479 return PTR_ERR(state->reset_gpio); in adv76xx_probe()
3483 state->timings = cea640x480; in adv76xx_probe()
3484 state->format = adv76xx_format_info(state, MEDIA_BUS_FMT_YUYV8_2X8); in adv76xx_probe()
3486 sd = &state->sd; in adv76xx_probe()
3487 v4l2_i2c_subdev_init(sd, client, &adv76xx_ops); in adv76xx_probe()
3488 snprintf(sd->name, sizeof(sd->name), "%s %d-%04x", in adv76xx_probe()
3489 id->name, i2c_adapter_id(client->adapter), in adv76xx_probe()
3490 client->addr); in adv76xx_probe()
3491 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; in adv76xx_probe()
3492 sd->internal_ops = &adv76xx_int_ops; in adv76xx_probe()
3498 v4l2_err(sd, "Error configuring IO regmap region\n"); in adv76xx_probe()
3499 return -ENODEV; in adv76xx_probe()
3507 switch (state->info->type) { in adv76xx_probe()
3509 err = regmap_read(state->regmap[ADV76XX_PAGE_IO], 0xfb, &val); in adv76xx_probe()
3511 v4l2_err(sd, "Error %d reading IO Regmap\n", err); in adv76xx_probe()
3512 return -ENODEV; in adv76xx_probe()
3515 v4l2_err(sd, "not an ADV7604 on address 0x%x\n", in adv76xx_probe()
3516 client->addr << 1); in adv76xx_probe()
3517 return -ENODEV; in adv76xx_probe()
3522 err = regmap_read(state->regmap[ADV76XX_PAGE_IO], in adv76xx_probe()
3526 v4l2_err(sd, "Error %d reading IO Regmap\n", err); in adv76xx_probe()
3527 return -ENODEV; in adv76xx_probe()
3530 err = regmap_read(state->regmap[ADV76XX_PAGE_IO], in adv76xx_probe()
3534 v4l2_err(sd, "Error %d reading IO Regmap\n", err); in adv76xx_probe()
3535 return -ENODEV; in adv76xx_probe()
3538 if ((state->info->type == ADV7611 && val != 0x2051) || in adv76xx_probe()
3539 (state->info->type == ADV7612 && val != 0x2041)) { in adv76xx_probe()
3540 v4l2_err(sd, "not an %s on address 0x%x\n", in adv76xx_probe()
3541 state->info->type == ADV7611 ? "ADV7610/11" : "ADV7612", in adv76xx_probe()
3542 client->addr << 1); in adv76xx_probe()
3543 return -ENODEV; in adv76xx_probe()
3549 hdl = &state->hdl; in adv76xx_probe()
3553 V4L2_CID_BRIGHTNESS, -128, 127, 1, 0); in adv76xx_probe()
3555 V4L2_CID_CONTRAST, 0, 255, 1, 128); in adv76xx_probe()
3557 V4L2_CID_SATURATION, 0, 255, 1, 128); in adv76xx_probe()
3559 V4L2_CID_HUE, 0, 255, 1, 0); in adv76xx_probe()
3564 ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; in adv76xx_probe()
3566 state->detect_tx_5v_ctrl = v4l2_ctrl_new_std(hdl, NULL, in adv76xx_probe()
3568 (1 << state->info->num_dv_ports) - 1, 0, 0); in adv76xx_probe()
3569 state->rgb_quantization_range_ctrl = in adv76xx_probe()
3576 state->analog_sampling_phase_ctrl = in adv76xx_probe()
3578 state->free_run_color_manual_ctrl = in adv76xx_probe()
3580 state->free_run_color_ctrl = in adv76xx_probe()
3583 sd->ctrl_handler = hdl; in adv76xx_probe()
3584 if (hdl->error) { in adv76xx_probe()
3585 err = hdl->error; in adv76xx_probe()
3588 if (adv76xx_s_detect_tx_5v_ctrl(sd)) { in adv76xx_probe()
3589 err = -ENODEV; in adv76xx_probe()
3593 for (i = 1; i < ADV76XX_PAGE_MAX; ++i) { in adv76xx_probe()
3596 if (!(BIT(i) & state->info->page_mask)) in adv76xx_probe()
3599 dummy_client = adv76xx_dummy_client(sd, i); in adv76xx_probe()
3602 v4l2_err(sd, "failed to create i2c client %u\n", i); in adv76xx_probe()
3606 state->i2c_clients[i] = dummy_client; in adv76xx_probe()
3609 INIT_DELAYED_WORK(&state->delayed_work_enable_hotplug, in adv76xx_probe()
3612 state->source_pad = state->info->num_dv_ports in adv76xx_probe()
3613 + (state->info->has_afe ? 2 : 0); in adv76xx_probe()
3614 for (i = 0; i < state->source_pad; ++i) in adv76xx_probe()
3615 state->pads[i].flags = MEDIA_PAD_FL_SINK; in adv76xx_probe()
3616 state->pads[state->source_pad].flags = MEDIA_PAD_FL_SOURCE; in adv76xx_probe()
3617 sd->entity.function = MEDIA_ENT_F_DV_DECODER; in adv76xx_probe()
3619 err = media_entity_pads_init(&sd->entity, state->source_pad + 1, in adv76xx_probe()
3620 state->pads); in adv76xx_probe()
3629 err = adv76xx_core_init(sd); in adv76xx_probe()
3633 if (client->irq) { in adv76xx_probe()
3634 err = devm_request_threaded_irq(&client->dev, in adv76xx_probe()
3635 client->irq, in adv76xx_probe()
3638 client->name, state); in adv76xx_probe()
3644 state->cec_adap = cec_allocate_adapter(&adv76xx_cec_adap_ops, in adv76xx_probe()
3645 state, dev_name(&client->dev), in adv76xx_probe()
3647 err = PTR_ERR_OR_ZERO(state->cec_adap); in adv76xx_probe()
3652 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name, in adv76xx_probe()
3653 client->addr << 1, client->adapter->name); in adv76xx_probe()
3655 err = v4l2_async_register_subdev(sd); in adv76xx_probe()
3662 media_entity_cleanup(&sd->entity); in adv76xx_probe()
3664 cancel_delayed_work(&state->delayed_work_enable_hotplug); in adv76xx_probe()
3672 /* ----------------------------------------------------------------------- */
3676 struct v4l2_subdev *sd = i2c_get_clientdata(client); in adv76xx_remove() local
3677 struct adv76xx_state *state = to_state(sd); in adv76xx_remove()
3680 io_write(sd, 0x40, 0); in adv76xx_remove()
3681 io_write(sd, 0x41, 0); in adv76xx_remove()
3682 io_write(sd, 0x46, 0); in adv76xx_remove()
3683 io_write(sd, 0x6e, 0); in adv76xx_remove()
3684 io_write(sd, 0x73, 0); in adv76xx_remove()
3686 cancel_delayed_work_sync(&state->delayed_work_enable_hotplug); in adv76xx_remove()
3687 v4l2_async_unregister_subdev(sd); in adv76xx_remove()
3688 media_entity_cleanup(&sd->entity); in adv76xx_remove()
3689 adv76xx_unregister_clients(to_state(sd)); in adv76xx_remove()
3690 v4l2_ctrl_handler_free(sd->ctrl_handler); in adv76xx_remove()
3693 /* ----------------------------------------------------------------------- */