Lines Matching +full:0 +full:x5e

37 	.reserved = { 0 },
55 { V4L2_DV_BT_CEA_720X480P59_94, 0x4a, 0x00 },
56 { V4L2_DV_BT_CEA_720X576P50, 0x4b, 0x00 },
57 { V4L2_DV_BT_CEA_1280X720P60, 0x53, 0x00 },
58 { V4L2_DV_BT_CEA_1280X720P50, 0x53, 0x01 },
59 { V4L2_DV_BT_CEA_1280X720P30, 0x53, 0x02 },
60 { V4L2_DV_BT_CEA_1280X720P25, 0x53, 0x03 },
61 { V4L2_DV_BT_CEA_1280X720P24, 0x53, 0x04 },
62 { V4L2_DV_BT_CEA_1920X1080P60, 0x5e, 0x00 },
63 { V4L2_DV_BT_CEA_1920X1080P50, 0x5e, 0x01 },
64 { V4L2_DV_BT_CEA_1920X1080P30, 0x5e, 0x02 },
65 { V4L2_DV_BT_CEA_1920X1080P25, 0x5e, 0x03 },
66 { V4L2_DV_BT_CEA_1920X1080P24, 0x5e, 0x04 },
68 { V4L2_DV_BT_DMT_800X600P56, 0x80, 0x00 },
69 { V4L2_DV_BT_DMT_800X600P60, 0x81, 0x00 },
70 { V4L2_DV_BT_DMT_800X600P72, 0x82, 0x00 },
71 { V4L2_DV_BT_DMT_800X600P75, 0x83, 0x00 },
72 { V4L2_DV_BT_DMT_800X600P85, 0x84, 0x00 },
74 { V4L2_DV_BT_DMT_1280X1024P60, 0x85, 0x00 },
75 { V4L2_DV_BT_DMT_1280X1024P75, 0x86, 0x00 },
77 { V4L2_DV_BT_DMT_640X480P60, 0x88, 0x00 },
78 { V4L2_DV_BT_DMT_640X480P72, 0x89, 0x00 },
79 { V4L2_DV_BT_DMT_640X480P75, 0x8a, 0x00 },
80 { V4L2_DV_BT_DMT_640X480P85, 0x8b, 0x00 },
82 { V4L2_DV_BT_DMT_1024X768P60, 0x8c, 0x00 },
83 { V4L2_DV_BT_DMT_1024X768P70, 0x8d, 0x00 },
84 { V4L2_DV_BT_DMT_1024X768P75, 0x8e, 0x00 },
85 { V4L2_DV_BT_DMT_1024X768P85, 0x8f, 0x00 },
87 { V4L2_DV_BT_DMT_1600X1200P60, 0x96, 0x00 },
93 memset(fmt, 0, sizeof(*fmt)); in adv748x_hdmi_fill_format()
131 if (a < 0 || b < 0) in adv748x_hdmi_read_pixelclock()
139 return ((a << 1) | (b >> 7)) * 1000000 + (b & 0x7f) * 1000000 / 128; in adv748x_hdmi_read_pixelclock()
158 high |= (shift & 0x300) >> 8; in adv748x_hdmi_set_de_timings()
159 low = shift & 0xff; in adv748x_hdmi_set_de_timings()
165 high |= (shift & 0x300) >> 6; in adv748x_hdmi_set_de_timings()
178 for (i = 0; i < ARRAY_SIZE(adv748x_hdmi_video_standards); i++) { in adv748x_hdmi_set_video_timings()
194 case 0x53: /* 720p */ in adv748x_hdmi_set_video_timings()
197 case 0x54: /* 1080i */ in adv748x_hdmi_set_video_timings()
198 case 0x5e: /* 1080p */ in adv748x_hdmi_set_video_timings()
202 adv748x_hdmi_set_de_timings(state, 0); in adv748x_hdmi_set_video_timings()
210 return 0; in adv748x_hdmi_set_video_timings()
227 if (v4l2_match_dv_timings(&hdmi->timings, timings, 0, false)) in adv748x_hdmi_s_dv_timings()
228 return 0; in adv748x_hdmi_s_dv_timings()
246 ADV748X_CP_VID_ADJ_2_INTERLACED : 0); in adv748x_hdmi_s_dv_timings()
250 return 0; in adv748x_hdmi_s_dv_timings()
269 return 0; in adv748x_hdmi_g_dv_timings()
284 memset(timings, 0, sizeof(struct v4l2_dv_timings)); in adv748x_hdmi_query_dv_timings()
293 return 0; in adv748x_hdmi_query_dv_timings()
300 if (pixelclock < 0) in adv748x_hdmi_query_dv_timings()
326 polarity = hdmi_read(state, 0x05); in adv748x_hdmi_query_dv_timings()
327 bt->polarities = (polarity & BIT(4) ? V4L2_DV_VSYNC_POS_POL : 0) | in adv748x_hdmi_query_dv_timings()
328 (polarity & BIT(5) ? V4L2_DV_HSYNC_POS_POL : 0); in adv748x_hdmi_query_dv_timings()
331 bt->height += hdmi_read16(state, 0x0b, 0x1fff); in adv748x_hdmi_query_dv_timings()
332 bt->il_vfrontporch = hdmi_read16(state, 0x2c, 0x3fff) / 2; in adv748x_hdmi_query_dv_timings()
333 bt->il_vsync = hdmi_read16(state, 0x30, 0x3fff) / 2; in adv748x_hdmi_query_dv_timings()
334 bt->il_vbackporch = hdmi_read16(state, 0x34, 0x3fff) / 2; in adv748x_hdmi_query_dv_timings()
346 return 0; in adv748x_hdmi_query_dv_timings()
356 *status = adv748x_hdmi_has_signal(state) ? 0 : V4L2_IN_ST_NO_SIGNAL; in adv748x_hdmi_g_input_status()
360 return 0; in adv748x_hdmi_g_input_status()
391 return 0; in adv748x_hdmi_g_pixelaspect()
413 adv748x_hdmi_query_dv_timings(&hdmi->sd, 0, &timings); in adv748x_hdmi_propagate_pixelrate()
422 if (code->index != 0) in adv748x_hdmi_enum_mbus_code()
427 return 0; in adv748x_hdmi_enum_mbus_code()
449 return 0; in adv748x_hdmi_get_format()
467 return 0; in adv748x_hdmi_set_format()
474 memset(edid->reserved, 0, sizeof(edid->reserved)); in adv748x_hdmi_get_edid()
479 if (edid->start_block == 0 && edid->blocks == 0) { in adv748x_hdmi_get_edid()
481 return 0; in adv748x_hdmi_get_edid()
493 return 0; in adv748x_hdmi_get_edid()
500 int err = 0; in adv748x_hdmi_edid_write_block()
501 int i = 0; in adv748x_hdmi_edid_write_block()
502 int len = 0; in adv748x_hdmi_edid_write_block()
526 memset(edid->reserved, 0, sizeof(edid->reserved)); in adv748x_hdmi_set_edid()
528 if (edid->start_block != 0) in adv748x_hdmi_set_edid()
531 if (edid->blocks == 0) { in adv748x_hdmi_set_edid()
532 hdmi->edid.blocks = 0; in adv748x_hdmi_set_edid()
533 hdmi->edid.present = 0; in adv748x_hdmi_set_edid()
543 repeater_write(state, ADV748X_REPEATER_EDID_CTL, 0); in adv748x_hdmi_set_edid()
545 return 0; in adv748x_hdmi_set_edid()
557 hdmi->aspect_ratio = v4l2_calc_aspect_ratio(edid->edid[0x15], in adv748x_hdmi_set_edid()
558 edid->edid[0x16]); in adv748x_hdmi_set_edid()
562 if (err < 0) { in adv748x_hdmi_set_edid()
573 return 0; in adv748x_hdmi_set_edid()
583 for (i = 0; stds[i].timings.bt.width; i++) in adv748x_hdmi_check_dv_timings()
584 if (v4l2_match_dv_timings(timings, &stds[i].timings, 0, false)) in adv748x_hdmi_check_dv_timings()
601 return 0; in adv748x_hdmi_dv_timings_cap()
651 if (ret < 0) in adv748x_hdmi_s_ctrl()
670 /* Pattern is 0-indexed. Ctrl Menu is 1-indexed */ in adv748x_hdmi_s_ctrl()
720 0, 0, hdmi_ctrl_patgen_menu); in adv748x_hdmi_init_controls()
737 adv748x_hdmi_s_dv_timings(&hdmi->sd, 0, &cea1280x720); in adv748x_hdmi_init()
758 return 0; in adv748x_hdmi_init()