Lines Matching refs:RSTV0910_P2_VTH12
964 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 0, state->vth[0]); in set_vth_default()
965 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 1, state->vth[1]); in set_vth_default()
966 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 2, state->vth[2]); in set_vth_default()
967 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 3, state->vth[3]); in set_vth_default()
968 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 4, state->vth[4]); in set_vth_default()
969 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 5, state->vth[5]); in set_vth_default()
996 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 0, state->vth[0]); in set_vth()
997 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 1, state->vth[1]); in set_vth()
998 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 2, state->vth[2]); in set_vth()
999 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 3, state->vth[3]); in set_vth()
1000 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 4, state->vth[4]); in set_vth()
1001 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 5, state->vth[5]); in set_vth()