Lines Matching +full:120 +full:- +full:db
1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the ST STV0910 DVB-S/S2 demodulator.
5 * Copyright (C) 2014-2015 Ralph Metzler <rjkm@metzlerbros.de>
129 struct i2c_adapter *adap = state->base->i2c; in write_reg()
131 struct i2c_msg msg = {.addr = state->base->adr, .flags = 0, in write_reg()
135 dev_warn(&adap->dev, "i2c write error ([%02x] %04x: %02x)\n", in write_reg()
136 state->base->adr, reg, val); in write_reg()
137 return -EIO; in write_reg()
152 dev_warn(&adapter->dev, "i2c read error ([%02x] %04x)\n", in i2c_read_regs16()
154 return -EIO; in i2c_read_regs16()
161 return i2c_read_regs16(state->base->i2c, state->base->adr, in read_reg()
167 return i2c_read_regs16(state->base->i2c, state->base->adr, in read_regs()
176 mutex_lock(&state->base->reg_lock); in write_shared_reg()
180 mutex_unlock(&state->base->reg_lock); in write_shared_reg()
201 write_field(state, state->nr ? FSTV0910_P2_##_reg : \
205 write_reg(state, state->nr ? RSTV0910_P2_##_reg : \
209 read_reg(state, state->nr ? RSTV0910_P2_##_reg : \
213 { 0, 9242 }, /* C/N= 0dB */
214 { 5, 9105 }, /* C/N= 0.5dB */
215 { 10, 8950 }, /* C/N= 1.0dB */
216 { 15, 8780 }, /* C/N= 1.5dB */
217 { 20, 8566 }, /* C/N= 2.0dB */
218 { 25, 8366 }, /* C/N= 2.5dB */
219 { 30, 8146 }, /* C/N= 3.0dB */
220 { 35, 7908 }, /* C/N= 3.5dB */
221 { 40, 7666 }, /* C/N= 4.0dB */
222 { 45, 7405 }, /* C/N= 4.5dB */
223 { 50, 7136 }, /* C/N= 5.0dB */
224 { 55, 6861 }, /* C/N= 5.5dB */
225 { 60, 6576 }, /* C/N= 6.0dB */
226 { 65, 6330 }, /* C/N= 6.5dB */
227 { 70, 6048 }, /* C/N= 7.0dB */
228 { 75, 5768 }, /* C/N= 7.5dB */
229 { 80, 5492 }, /* C/N= 8.0dB */
230 { 85, 5224 }, /* C/N= 8.5dB */
231 { 90, 4959 }, /* C/N= 9.0dB */
232 { 95, 4709 }, /* C/N= 9.5dB */
233 { 100, 4467 }, /* C/N=10.0dB */
234 { 105, 4236 }, /* C/N=10.5dB */
235 { 110, 4013 }, /* C/N=11.0dB */
236 { 115, 3800 }, /* C/N=11.5dB */
237 { 120, 3598 }, /* C/N=12.0dB */
238 { 125, 3406 }, /* C/N=12.5dB */
239 { 130, 3225 }, /* C/N=13.0dB */
240 { 135, 3052 }, /* C/N=13.5dB */
241 { 140, 2889 }, /* C/N=14.0dB */
242 { 145, 2733 }, /* C/N=14.5dB */
243 { 150, 2587 }, /* C/N=15.0dB */
244 { 160, 2318 }, /* C/N=16.0dB */
245 { 170, 2077 }, /* C/N=17.0dB */
246 { 180, 1862 }, /* C/N=18.0dB */
247 { 190, 1670 }, /* C/N=19.0dB */
248 { 200, 1499 }, /* C/N=20.0dB */
249 { 210, 1347 }, /* C/N=21.0dB */
250 { 220, 1213 }, /* C/N=22.0dB */
251 { 230, 1095 }, /* C/N=23.0dB */
252 { 240, 992 }, /* C/N=24.0dB */
253 { 250, 900 }, /* C/N=25.0dB */
254 { 260, 826 }, /* C/N=26.0dB */
255 { 270, 758 }, /* C/N=27.0dB */
256 { 280, 702 }, /* C/N=28.0dB */
257 { 290, 653 }, /* C/N=29.0dB */
258 { 300, 613 }, /* C/N=30.0dB */
259 { 310, 579 }, /* C/N=31.0dB */
260 { 320, 550 }, /* C/N=32.0dB */
261 { 330, 526 }, /* C/N=33.0dB */
262 { 350, 490 }, /* C/N=33.0dB */
263 { 400, 445 }, /* C/N=40.0dB */
264 { 450, 430 }, /* C/N=45.0dB */
265 { 500, 426 }, /* C/N=50.0dB */
266 { 510, 425 } /* C/N=51.0dB */
270 { -30, 13950 }, /* C/N=-2.5dB */
271 { -25, 13580 }, /* C/N=-2.5dB */
272 { -20, 13150 }, /* C/N=-2.0dB */
273 { -15, 12760 }, /* C/N=-1.5dB */
274 { -10, 12345 }, /* C/N=-1.0dB */
275 { -5, 11900 }, /* C/N=-0.5dB */
276 { 0, 11520 }, /* C/N= 0dB */
277 { 5, 11080 }, /* C/N= 0.5dB */
278 { 10, 10630 }, /* C/N= 1.0dB */
279 { 15, 10210 }, /* C/N= 1.5dB */
280 { 20, 9790 }, /* C/N= 2.0dB */
281 { 25, 9390 }, /* C/N= 2.5dB */
282 { 30, 8970 }, /* C/N= 3.0dB */
283 { 35, 8575 }, /* C/N= 3.5dB */
284 { 40, 8180 }, /* C/N= 4.0dB */
285 { 45, 7800 }, /* C/N= 4.5dB */
286 { 50, 7430 }, /* C/N= 5.0dB */
287 { 55, 7080 }, /* C/N= 5.5dB */
288 { 60, 6720 }, /* C/N= 6.0dB */
289 { 65, 6320 }, /* C/N= 6.5dB */
290 { 70, 6060 }, /* C/N= 7.0dB */
291 { 75, 5760 }, /* C/N= 7.5dB */
292 { 80, 5480 }, /* C/N= 8.0dB */
293 { 85, 5200 }, /* C/N= 8.5dB */
294 { 90, 4930 }, /* C/N= 9.0dB */
295 { 95, 4680 }, /* C/N= 9.5dB */
296 { 100, 4425 }, /* C/N=10.0dB */
297 { 105, 4210 }, /* C/N=10.5dB */
298 { 110, 3980 }, /* C/N=11.0dB */
299 { 115, 3765 }, /* C/N=11.5dB */
300 { 120, 3570 }, /* C/N=12.0dB */
301 { 125, 3315 }, /* C/N=12.5dB */
302 { 130, 3140 }, /* C/N=13.0dB */
303 { 135, 2980 }, /* C/N=13.5dB */
304 { 140, 2820 }, /* C/N=14.0dB */
305 { 145, 2670 }, /* C/N=14.5dB */
306 { 150, 2535 }, /* C/N=15.0dB */
307 { 160, 2270 }, /* C/N=16.0dB */
308 { 170, 2035 }, /* C/N=17.0dB */
309 { 180, 1825 }, /* C/N=18.0dB */
310 { 190, 1650 }, /* C/N=19.0dB */
311 { 200, 1485 }, /* C/N=20.0dB */
312 { 210, 1340 }, /* C/N=21.0dB */
313 { 220, 1212 }, /* C/N=22.0dB */
314 { 230, 1100 }, /* C/N=23.0dB */
315 { 240, 1000 }, /* C/N=24.0dB */
316 { 250, 910 }, /* C/N=25.0dB */
317 { 260, 836 }, /* C/N=26.0dB */
318 { 270, 772 }, /* C/N=27.0dB */
319 { 280, 718 }, /* C/N=28.0dB */
320 { 290, 671 }, /* C/N=29.0dB */
321 { 300, 635 }, /* C/N=30.0dB */
322 { 310, 602 }, /* C/N=31.0dB */
323 { 320, 575 }, /* C/N=32.0dB */
324 { 330, 550 }, /* C/N=33.0dB */
325 { 350, 517 }, /* C/N=35.0dB */
326 { 400, 480 }, /* C/N=40.0dB */
327 { 450, 466 }, /* C/N=45.0dB */
328 { 500, 464 }, /* C/N=50.0dB */
329 { 510, 463 }, /* C/N=51.0dB */
334 { -100, 93600 }, /* PADC= -1dBm */
335 { -200, 74500 }, /* PADC= -2dBm */
336 { -300, 59100 }, /* PADC= -3dBm */
337 { -400, 47000 }, /* PADC= -4dBm */
338 { -500, 37300 }, /* PADC= -5dBm */
339 { -600, 29650 }, /* PADC= -6dBm */
340 { -700, 23520 }, /* PADC= -7dBm */
341 { -900, 14850 }, /* PADC= -9dBm */
342 { -1100, 9380 }, /* PADC=-11dBm */
343 { -1300, 5910 }, /* PADC=-13dBm */
344 { -1500, 3730 }, /* PADC=-15dBm */
345 { -1700, 2354 }, /* PADC=-17dBm */
346 { -1900, 1485 }, /* PADC=-19dBm */
347 { -2000, 1179 }, /* PADC=-20dBm */
348 { -2100, 1000 }, /* PADC=-21dBm */
434 i = ((int)FE_32APSK_910 - (int)FE_QPSK_14) * 10; in get_optim_cloop()
436 i = ((int)mod_cod - (int)FE_QPSK_14) * 10; in get_optim_cloop()
438 if (state->symbol_rate <= 3000000) in get_optim_cloop()
440 else if (state->symbol_rate <= 7000000) in get_optim_cloop()
442 else if (state->symbol_rate <= 15000000) in get_optim_cloop()
444 else if (state->symbol_rate <= 25000000) in get_optim_cloop()
469 if (!state->started) in get_cur_symbol_rate()
472 read_reg(state, RSTV0910_P2_SFR3 + state->regoff, &symb_freq3); in get_cur_symbol_rate()
473 read_reg(state, RSTV0910_P2_SFR2 + state->regoff, &symb_freq2); in get_cur_symbol_rate()
474 read_reg(state, RSTV0910_P2_SFR1 + state->regoff, &symb_freq1); in get_cur_symbol_rate()
475 read_reg(state, RSTV0910_P2_SFR0 + state->regoff, &symb_freq0); in get_cur_symbol_rate()
476 read_reg(state, RSTV0910_P2_TMGREG2 + state->regoff, &tim_offs2); in get_cur_symbol_rate()
477 read_reg(state, RSTV0910_P2_TMGREG1 + state->regoff, &tim_offs1); in get_cur_symbol_rate()
478 read_reg(state, RSTV0910_P2_TMGREG0 + state->regoff, &tim_offs0); in get_cur_symbol_rate()
488 symbol_rate = (u32)(((u64)symbol_rate * state->base->mclk) >> 32); in get_cur_symbol_rate()
500 if (!state->started) in get_signal_parameters()
501 return -EINVAL; in get_signal_parameters()
503 if (state->receive_mode == RCVMODE_DVBS2) { in get_signal_parameters()
504 read_reg(state, RSTV0910_P2_DMDMODCOD + state->regoff, &tmp); in get_signal_parameters()
505 state->mod_cod = (enum fe_stv0910_mod_cod)((tmp & 0x7c) >> 2); in get_signal_parameters()
506 state->pilots = (tmp & 0x01) != 0; in get_signal_parameters()
507 state->fectype = (enum dvbs2_fectype)((tmp & 0x02) >> 1); in get_signal_parameters()
509 } else if (state->receive_mode == RCVMODE_DVBS) { in get_signal_parameters()
510 read_reg(state, RSTV0910_P2_VITCURPUN + state->regoff, &tmp); in get_signal_parameters()
511 state->puncture_rate = FEC_NONE; in get_signal_parameters()
514 state->puncture_rate = FEC_1_2; in get_signal_parameters()
517 state->puncture_rate = FEC_2_3; in get_signal_parameters()
520 state->puncture_rate = FEC_3_4; in get_signal_parameters()
523 state->puncture_rate = FEC_5_6; in get_signal_parameters()
526 state->puncture_rate = FEC_7_8; in get_signal_parameters()
529 state->is_vcm = 0; in get_signal_parameters()
530 state->is_standard_broadcast = 1; in get_signal_parameters()
531 state->feroll_off = FE_SAT_35; in get_signal_parameters()
540 read_reg(state, RSTV0910_P2_DMDCFGMD + state->regoff, &tmp); in tracking_optimization()
543 switch (state->receive_mode) { in tracking_optimization()
554 write_reg(state, RSTV0910_P2_DMDCFGMD + state->regoff, tmp); in tracking_optimization()
556 if (state->receive_mode == RCVMODE_DVBS2) { in tracking_optimization()
557 /* Disable Reed-Solomon */ in tracking_optimization()
559 RSTV0910_TSTTSRS, state->nr ? 0x02 : 0x01, in tracking_optimization()
562 if (state->fectype == DVBS2_64K) { in tracking_optimization()
563 u8 aclc = get_optim_cloop(state, state->mod_cod, in tracking_optimization()
564 state->pilots); in tracking_optimization()
566 if (state->mod_cod <= FE_QPSK_910) { in tracking_optimization()
568 state->regoff, aclc); in tracking_optimization()
569 } else if (state->mod_cod <= FE_8PSK_910) { in tracking_optimization()
571 state->regoff, 0x2a); in tracking_optimization()
573 state->regoff, aclc); in tracking_optimization()
574 } else if (state->mod_cod <= FE_16APSK_910) { in tracking_optimization()
576 state->regoff, 0x2a); in tracking_optimization()
578 state->regoff, aclc); in tracking_optimization()
579 } else if (state->mod_cod <= FE_32APSK_910) { in tracking_optimization()
581 state->regoff, 0x2a); in tracking_optimization()
583 state->regoff, aclc); in tracking_optimization()
595 int imax = table_size - 1; in table_lookup()
605 while ((imax - imin) > 1) { in table_lookup()
614 reg_diff = table[imax].reg_value - table[imin].reg_value; in table_lookup()
617 value += ((s32)(reg_value - table[imin].reg_value) * in table_lookup()
619 - table[imin].value)) in table_lookup()
636 if (!state->started) in get_signal_to_noise()
637 return -EINVAL; in get_signal_to_noise()
639 if (state->receive_mode == RCVMODE_DVBS2) { in get_signal_to_noise()
640 read_reg(state, RSTV0910_P2_NNOSPLHT1 + state->regoff, in get_signal_to_noise()
642 read_reg(state, RSTV0910_P2_NNOSPLHT0 + state->regoff, in get_signal_to_noise()
647 read_reg(state, RSTV0910_P2_NNOSDATAT1 + state->regoff, in get_signal_to_noise()
649 read_reg(state, RSTV0910_P2_NNOSDATAT0 + state->regoff, in get_signal_to_noise()
665 RSTV0910_P2_ERRCNT12 + state->regoff, in get_bit_error_rate_s()
669 return -EINVAL; in get_bit_error_rate_s()
672 state->last_berdenominator = 1ULL << ((state->berscale * 2) + in get_bit_error_rate_s()
674 state->last_bernumerator = ((u32)(regs[0] & 0x7F) << 16) | in get_bit_error_rate_s()
676 if (state->last_bernumerator < 256 && state->berscale < 6) { in get_bit_error_rate_s()
677 state->berscale += 1; in get_bit_error_rate_s()
679 state->regoff, in get_bit_error_rate_s()
680 0x20 | state->berscale); in get_bit_error_rate_s()
681 } else if (state->last_bernumerator > 1024 && in get_bit_error_rate_s()
682 state->berscale > 2) { in get_bit_error_rate_s()
683 state->berscale -= 1; in get_bit_error_rate_s()
685 state->regoff, 0x20 | in get_bit_error_rate_s()
686 state->berscale); in get_bit_error_rate_s()
689 *bernumerator = state->last_bernumerator; in get_bit_error_rate_s()
690 *berdenominator = state->last_berdenominator; in get_bit_error_rate_s()
739 int status = read_regs(state, RSTV0910_P2_ERRCNT12 + state->regoff, in get_bit_error_rate_s2()
743 return -EINVAL; in get_bit_error_rate_s2()
746 state->last_berdenominator = in get_bit_error_rate_s2()
747 dvbs2_nbch((enum dvbs2_mod_cod)state->mod_cod, in get_bit_error_rate_s2()
748 state->fectype) << in get_bit_error_rate_s2()
749 (state->berscale * 2); in get_bit_error_rate_s2()
750 state->last_bernumerator = (((u32)regs[0] & 0x7F) << 16) | in get_bit_error_rate_s2()
752 if (state->last_bernumerator < 256 && state->berscale < 6) { in get_bit_error_rate_s2()
753 state->berscale += 1; in get_bit_error_rate_s2()
754 write_reg(state, RSTV0910_P2_ERRCTRL1 + state->regoff, in get_bit_error_rate_s2()
755 0x20 | state->berscale); in get_bit_error_rate_s2()
756 } else if (state->last_bernumerator > 1024 && in get_bit_error_rate_s2()
757 state->berscale > 2) { in get_bit_error_rate_s2()
758 state->berscale -= 1; in get_bit_error_rate_s2()
759 write_reg(state, RSTV0910_P2_ERRCTRL1 + state->regoff, in get_bit_error_rate_s2()
760 0x20 | state->berscale); in get_bit_error_rate_s2()
763 *bernumerator = state->last_bernumerator; in get_bit_error_rate_s2()
764 *berdenominator = state->last_berdenominator; in get_bit_error_rate_s2()
774 switch (state->receive_mode) { in get_bit_error_rate()
791 u32 quartz = state->base->extclk / 1000000; in set_mclock()
811 else if (ndiv >= 120 && ndiv <= 127) in set_mclock()
845 state->base->mclk = fvco / (2 * odf) * 1000000; in set_mclock()
852 if (state->started) { in stop()
855 write_reg(state, RSTV0910_P2_TSCFGH + state->regoff, in stop()
856 state->tscfgh | 0x01); in stop()
857 read_reg(state, RSTV0910_P2_PDELCTRL1 + state->regoff, &tmp); in stop()
859 write_reg(state, RSTV0910_P2_PDELCTRL1 + state->regoff, tmp); in stop()
861 write_reg(state, RSTV0910_P2_AGC2O + state->regoff, 0x5B); in stop()
863 write_reg(state, RSTV0910_P2_DMDISTATE + state->regoff, 0x5c); in stop()
864 state->started = 0; in stop()
866 state->receive_mode = RCVMODE_NONE; in stop()
872 if (pls_code == state->cur_scrambling_code) in set_pls()
876 write_reg(state, RSTV0910_P2_PLROOT0 + state->regoff, in set_pls()
878 write_reg(state, RSTV0910_P2_PLROOT1 + state->regoff, in set_pls()
880 write_reg(state, RSTV0910_P2_PLROOT2 + state->regoff, in set_pls()
882 state->cur_scrambling_code = pls_code; in set_pls()
894 write_reg(state, RSTV0910_P2_ISIENTRY + state->regoff, in set_isi()
896 write_reg(state, RSTV0910_P2_ISIBITENA + state->regoff, 0xff); in set_isi()
905 set_isi(state, p->stream_id); in set_stream_modes()
906 set_pls(state, p->scrambling_sequence_index); in set_stream_modes()
953 return write_reg(state, RSTV0910_P2_PRVIT + state->regoff, val); in enable_puncture_rate()
958 state->vth[0] = 0xd7; in set_vth_default()
959 state->vth[1] = 0x85; in set_vth_default()
960 state->vth[2] = 0x58; in set_vth_default()
961 state->vth[3] = 0x3a; in set_vth_default()
962 state->vth[4] = 0x34; in set_vth_default()
963 state->vth[5] = 0x28; in set_vth_default()
964 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 0, state->vth[0]); in set_vth_default()
965 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 1, state->vth[1]); in set_vth_default()
966 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 2, state->vth[2]); in set_vth_default()
967 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 3, state->vth[3]); in set_vth_default()
968 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 4, state->vth[4]); in set_vth_default()
969 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 5, state->vth[5]); in set_vth_default()
976 {250, 8780}, /* C/N= 1.5dB */ in set_vth()
977 {100, 7405}, /* C/N= 4.5dB */ in set_vth()
978 {40, 6330}, /* C/N= 6.5dB */ in set_vth()
979 {12, 5224}, /* C/N= 8.5dB */ in set_vth()
980 {5, 4236} /* C/N=10.5dB */ in set_vth()
986 RSTV0910_P2_NNOSDATAT1 + state->regoff, in set_vth()
993 if (state->vth[i] > vth) in set_vth()
994 state->vth[i] = vth; in set_vth()
996 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 0, state->vth[0]); in set_vth()
997 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 1, state->vth[1]); in set_vth()
998 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 2, state->vth[2]); in set_vth()
999 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 3, state->vth[3]); in set_vth()
1000 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 4, state->vth[4]); in set_vth()
1001 write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 5, state->vth[5]); in set_vth()
1011 if (p->symbol_rate < 100000 || p->symbol_rate > 70000000) in start()
1012 return -EINVAL; in start()
1014 state->receive_mode = RCVMODE_NONE; in start()
1015 state->demod_lock_time = 0; in start()
1018 if (state->started) in start()
1019 write_reg(state, RSTV0910_P2_DMDISTATE + state->regoff, 0x5C); in start()
1023 if (p->symbol_rate <= 1000000) { /* SR <=1Msps */ in start()
1024 state->demod_timeout = 3000; in start()
1025 state->fec_timeout = 2000; in start()
1026 } else if (p->symbol_rate <= 2000000) { /* 1Msps < SR <=2Msps */ in start()
1027 state->demod_timeout = 2500; in start()
1028 state->fec_timeout = 1300; in start()
1029 } else if (p->symbol_rate <= 5000000) { /* 2Msps< SR <=5Msps */ in start()
1030 state->demod_timeout = 1000; in start()
1031 state->fec_timeout = 650; in start()
1032 } else if (p->symbol_rate <= 10000000) { /* 5Msps< SR <=10Msps */ in start()
1033 state->demod_timeout = 700; in start()
1034 state->fec_timeout = 350; in start()
1035 } else if (p->symbol_rate < 20000000) { /* 10Msps< SR <=20Msps */ in start()
1036 state->demod_timeout = 400; in start()
1037 state->fec_timeout = 200; in start()
1039 state->demod_timeout = 300; in start()
1040 state->fec_timeout = 200; in start()
1044 symb = muldiv32(p->symbol_rate, 65536, state->base->mclk); in start()
1045 write_reg(state, RSTV0910_P2_SFRINIT1 + state->regoff, in start()
1047 write_reg(state, RSTV0910_P2_SFRINIT0 + state->regoff, (symb & 0xFF)); in start()
1049 state->demod_bits |= 0x80; in start()
1050 write_reg(state, RSTV0910_P2_DEMOD + state->regoff, state->demod_bits); in start()
1053 read_reg(state, RSTV0910_P2_DMDCFGMD + state->regoff, ®_dmdcfgmd); in start()
1054 write_reg(state, RSTV0910_P2_DMDCFGMD + state->regoff, in start()
1058 RSTV0910_TSTTSRS, state->nr ? 0x02 : 0x01, 0x00); in start()
1061 write_reg(state, RSTV0910_P2_FECM + state->regoff, 0x00); in start()
1062 write_reg(state, RSTV0910_P2_PRVIT + state->regoff, 0x2F); in start()
1067 write_reg(state, RSTV0910_P2_ACLC2S2Q + state->regoff, 0x0B); in start()
1068 write_reg(state, RSTV0910_P2_ACLC2S28 + state->regoff, 0x0A); in start()
1069 write_reg(state, RSTV0910_P2_BCLC2S2Q + state->regoff, 0x84); in start()
1070 write_reg(state, RSTV0910_P2_BCLC2S28 + state->regoff, 0x84); in start()
1071 write_reg(state, RSTV0910_P2_CARHDR + state->regoff, 0x1C); in start()
1072 write_reg(state, RSTV0910_P2_CARFREQ + state->regoff, 0x79); in start()
1074 write_reg(state, RSTV0910_P2_ACLC2S216A + state->regoff, 0x29); in start()
1075 write_reg(state, RSTV0910_P2_ACLC2S232A + state->regoff, 0x09); in start()
1076 write_reg(state, RSTV0910_P2_BCLC2S216A + state->regoff, 0x84); in start()
1077 write_reg(state, RSTV0910_P2_BCLC2S232A + state->regoff, 0x84); in start()
1080 * Reset CAR3, bug DVBS2->DVBS1 lock in start()
1081 * Note: The bit is only pulsed -> no lock on shared register needed in start()
1083 write_reg(state, RSTV0910_TSTRES0, state->nr ? 0x04 : 0x08); in start()
1088 write_reg(state, RSTV0910_P2_DMDISTATE + state->regoff, 0x1F); in start()
1090 write_reg(state, RSTV0910_P2_CARCFG + state->regoff, 0x46); in start()
1092 if (p->symbol_rate <= 5000000) in start()
1093 freq = (state->search_range / 2000) + 80; in start()
1095 freq = (state->search_range / 2000) + 1600; in start()
1096 freq = (freq << 16) / (state->base->mclk / 1000); in start()
1098 write_reg(state, RSTV0910_P2_CFRUP1 + state->regoff, in start()
1100 write_reg(state, RSTV0910_P2_CFRUP0 + state->regoff, (freq & 0xff)); in start()
1102 freq = -freq; in start()
1103 write_reg(state, RSTV0910_P2_CFRLOW1 + state->regoff, in start()
1105 write_reg(state, RSTV0910_P2_CFRLOW0 + state->regoff, (freq & 0xff)); in start()
1108 write_reg(state, RSTV0910_P2_CFRINIT1 + state->regoff, 0); in start()
1109 write_reg(state, RSTV0910_P2_CFRINIT0 + state->regoff, 0); in start()
1111 write_reg(state, RSTV0910_P2_DMDISTATE + state->regoff, 0x1F); in start()
1113 write_reg(state, RSTV0910_P2_DMDISTATE + state->regoff, 0x15); in start()
1115 state->demod_lock_time += TUNING_DELAY; in start()
1116 state->started = 1; in start()
1123 u16 offs = state->nr ? 0x40 : 0; /* Address offset */ in init_diseqc()
1124 u8 freq = ((state->base->mclk + 11000 * 32) / (22000 * 32)); in init_diseqc()
1138 state->receive_mode = RCVMODE_NONE; in probe()
1139 state->started = 0; in probe()
1142 return -ENODEV; in probe()
1145 return -EINVAL; in probe()
1152 write_reg(state, RSTV0910_I2CCFG, 0x88); /* state->i2ccfg */ in probe()
1157 write_reg(state, RSTV0910_TSGENERAL, state->tsgeneral); /* TSGENERAL */ in probe()
1160 if (state->single) in probe()
1185 write_reg(state, RSTV0910_P1_TSCFGH, state->tscfgh | 0x01); in probe()
1186 write_reg(state, RSTV0910_P1_TSCFGH, state->tscfgh); in probe()
1190 write_reg(state, RSTV0910_P1_TSSPEED, state->tsspeed); in probe()
1192 write_reg(state, RSTV0910_P2_TSCFGH, state->tscfgh | 0x01); in probe()
1193 write_reg(state, RSTV0910_P2_TSCFGH, state->tscfgh); in probe()
1197 write_reg(state, RSTV0910_P2_TSSPEED, state->tsspeed); in probe()
1200 write_reg(state, RSTV0910_P1_TSCFGH, state->tscfgh | 0x01); in probe()
1201 write_reg(state, RSTV0910_P2_TSCFGH, state->tscfgh | 0x01); in probe()
1202 write_reg(state, RSTV0910_P1_TSCFGH, state->tscfgh); in probe()
1203 write_reg(state, RSTV0910_P2_TSCFGH, state->tscfgh); in probe()
1205 write_reg(state, RSTV0910_P1_I2CRPT, state->i2crpt); in probe()
1206 write_reg(state, RSTV0910_P2_I2CRPT, state->i2crpt); in probe()
1220 struct stv *state = fe->demodulator_priv; in gate_ctrl()
1221 u8 i2crpt = state->i2crpt & ~0x86; in gate_ctrl()
1234 mutex_lock(&state->base->i2c_lock); in gate_ctrl()
1240 if (write_reg(state, state->nr ? RSTV0910_P2_I2CRPT : in gate_ctrl()
1243 if (!WARN_ON(!mutex_is_locked(&state->base->i2c_lock))) in gate_ctrl()
1244 mutex_unlock(&state->base->i2c_lock); in gate_ctrl()
1245 dev_err(&state->base->i2c->dev, in gate_ctrl()
1248 return -EIO; in gate_ctrl()
1251 state->i2crpt = i2crpt; in gate_ctrl()
1254 if (!WARN_ON(!mutex_is_locked(&state->base->i2c_lock))) in gate_ctrl()
1255 mutex_unlock(&state->base->i2c_lock); in gate_ctrl()
1261 struct stv *state = fe->demodulator_priv; in release()
1263 state->base->count--; in release()
1264 if (state->base->count == 0) { in release()
1265 list_del(&state->base->stvlist); in release()
1266 kfree(state->base); in release()
1274 struct stv *state = fe->demodulator_priv; in set_parameters()
1275 struct dtv_frontend_properties *p = &fe->dtv_property_cache; in set_parameters()
1278 if (fe->ops.tuner_ops.set_params) in set_parameters()
1279 fe->ops.tuner_ops.set_params(fe); in set_parameters()
1280 state->symbol_rate = p->symbol_rate; in set_parameters()
1287 if (!state->started) in manage_matype_info()
1288 return -EINVAL; in manage_matype_info()
1289 if (state->receive_mode == RCVMODE_DVBS2) { in manage_matype_info()
1292 read_regs(state, RSTV0910_P2_MATSTR1 + state->regoff, in manage_matype_info()
1294 state->feroll_off = in manage_matype_info()
1296 state->is_vcm = (bbheader[0] & 0x10) == 0; in manage_matype_info()
1297 state->is_standard_broadcast = (bbheader[0] & 0xFC) == 0xF0; in manage_matype_info()
1298 } else if (state->receive_mode == RCVMODE_DVBS) { in manage_matype_info()
1299 state->is_vcm = 0; in manage_matype_info()
1300 state->is_standard_broadcast = 1; in manage_matype_info()
1301 state->feroll_off = FE_SAT_35; in manage_matype_info()
1308 struct stv *state = fe->demodulator_priv; in read_snr()
1309 struct dtv_frontend_properties *p = &fe->dtv_property_cache; in read_snr()
1313 p->cnr.stat[0].scale = FE_SCALE_DECIBEL; in read_snr()
1314 p->cnr.stat[0].svalue = 100 * snrval; /* fix scale */ in read_snr()
1316 p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in read_snr()
1324 struct stv *state = fe->demodulator_priv; in read_ber()
1325 struct dtv_frontend_properties *p = &fe->dtv_property_cache; in read_ber()
1330 p->pre_bit_error.stat[0].scale = FE_SCALE_COUNTER; in read_ber()
1331 p->pre_bit_error.stat[0].uvalue = n; in read_ber()
1332 p->pre_bit_count.stat[0].scale = FE_SCALE_COUNTER; in read_ber()
1333 p->pre_bit_count.stat[0].uvalue = d; in read_ber()
1340 struct stv *state = fe->demodulator_priv; in read_signal_strength()
1341 struct dtv_frontend_properties *p = &state->fe.dtv_property_cache; in read_signal_strength()
1347 read_regs(state, RSTV0910_P2_AGCIQIN1 + state->regoff, reg, 2); in read_signal_strength()
1352 read_regs(state, RSTV0910_P2_POWERI + state->regoff, reg, 2); in read_signal_strength()
1361 p->strength.stat[0].scale = FE_SCALE_DECIBEL; in read_signal_strength()
1362 p->strength.stat[0].svalue = (padc - agc); in read_signal_strength()
1367 struct stv *state = fe->demodulator_priv; in read_status()
1368 struct dtv_frontend_properties *p = &fe->dtv_property_cache; in read_status()
1376 read_reg(state, RSTV0910_P2_DMDSTATE + state->regoff, &dmd_state); in read_status()
1379 read_reg(state, RSTV0910_P2_DSTATUS + state->regoff, &dstatus); in read_status()
1388 p->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in read_status()
1389 p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in read_status()
1390 p->pre_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in read_status()
1391 p->pre_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in read_status()
1401 if (state->receive_mode == RCVMODE_NONE) { in read_status()
1402 state->receive_mode = cur_receive_mode; in read_status()
1403 state->demod_lock_time = jiffies; in read_status()
1404 state->first_time_lock = 1; in read_status()
1409 write_reg(state, RSTV0910_P2_TSCFGH + state->regoff, in read_status()
1410 state->tscfgh); in read_status()
1412 write_reg(state, RSTV0910_P2_TSCFGH + state->regoff, in read_status()
1413 state->tscfgh | 0x01); in read_status()
1414 write_reg(state, RSTV0910_P2_TSCFGH + state->regoff, in read_status()
1415 state->tscfgh); in read_status()
1418 if (state->receive_mode == RCVMODE_DVBS2) { in read_status()
1422 RSTV0910_P2_PDELSTATUS1 + state->regoff, in read_status()
1429 RSTV0910_P2_VSTATUSVIT + state->regoff, in read_status()
1438 if (state->first_time_lock) { in read_status()
1441 state->first_time_lock = 0; in read_status()
1445 if (state->receive_mode == RCVMODE_DVBS2) { in read_status()
1450 state->demod_bits &= ~0x84; in read_status()
1452 RSTV0910_P2_DEMOD + state->regoff, in read_status()
1453 state->demod_bits); in read_status()
1455 RSTV0910_P2_PDELCTRL2 + state->regoff, in read_status()
1460 RSTV0910_P2_PDELCTRL2 + state->regoff, in read_status()
1465 RSTV0910_P2_PDELCTRL2 + state->regoff, in read_status()
1468 state->berscale = 2; in read_status()
1469 state->last_bernumerator = 0; in read_status()
1470 state->last_berdenominator = 1; in read_status()
1473 RSTV0910_P2_ERRCTRL1 + state->regoff, in read_status()
1474 BER_SRC_S2 | state->berscale); in read_status()
1476 state->berscale = 2; in read_status()
1477 state->last_bernumerator = 0; in read_status()
1478 state->last_berdenominator = 1; in read_status()
1481 RSTV0910_P2_ERRCTRL1 + state->regoff, in read_status()
1482 BER_SRC_S | state->berscale); in read_status()
1486 RSTV0910_P2_FBERCPT4 + state->regoff, 0x00); in read_status()
1492 RSTV0910_P2_ERRCTRL2 + state->regoff, 0xc1); in read_status()
1495 if (state->receive_mode == RCVMODE_DVBS) in read_status()
1497 state->puncture_rate); in read_status()
1501 if (state->is_vcm) { in read_status()
1505 read_reg(state, RSTV0910_P2_DMDMODCOD + state->regoff, in read_status()
1509 if (mod_cod > state->mod_cod) in read_status()
1510 state->mod_cod = mod_cod; in read_status()
1523 p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in read_status()
1529 p->pre_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in read_status()
1530 p->pre_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in read_status()
1539 struct stv *state = fe->demodulator_priv; in get_frontend()
1543 if (state->receive_mode == RCVMODE_DVBS2) { in get_frontend()
1565 read_reg(state, RSTV0910_P2_DMDMODCOD + state->regoff, &tmp); in get_frontend()
1567 p->pilot = (tmp & 0x01) ? PILOT_ON : PILOT_OFF; in get_frontend()
1568 p->modulation = modcod2mod[mc]; in get_frontend()
1569 p->fec_inner = modcod2fec[mc]; in get_frontend()
1570 } else if (state->receive_mode == RCVMODE_DVBS) { in get_frontend()
1571 read_reg(state, RSTV0910_P2_VITCURPUN + state->regoff, &tmp); in get_frontend()
1574 p->fec_inner = FEC_1_2; in get_frontend()
1577 p->fec_inner = FEC_2_3; in get_frontend()
1580 p->fec_inner = FEC_3_4; in get_frontend()
1583 p->fec_inner = FEC_5_6; in get_frontend()
1586 p->fec_inner = FEC_7_8; in get_frontend()
1589 p->fec_inner = FEC_NONE; in get_frontend()
1592 p->rolloff = ROLLOFF_35; in get_frontend()
1595 if (state->receive_mode != RCVMODE_NONE) { in get_frontend()
1597 p->symbol_rate = symbolrate; in get_frontend()
1606 struct stv *state = fe->demodulator_priv; in tune()
1613 state->tune_time = jiffies; in tune()
1634 struct stv *state = fe->demodulator_priv; in set_tone()
1635 u16 offs = state->nr ? 0x40 : 0; in set_tone()
1645 return -EINVAL; in set_tone()
1652 u16 offs = state->nr ? 0x40 : 0; in wait_dis()
1660 return -ETIMEDOUT; in wait_dis()
1666 struct stv *state = fe->demodulator_priv; in send_master_cmd()
1671 for (i = 0; i < cmd->msg_len; i++) { in send_master_cmd()
1673 SET_REG(DISTXFIFO, cmd->msg[i]); in send_master_cmd()
1682 struct stv *state = fe->demodulator_priv; in send_burst()
1704 struct stv *state = fe->demodulator_priv; in sleep()
1743 if (p->i2c == i2c && p->adr == adr) in match_base()
1750 struct dtv_frontend_properties *p = &state->fe.dtv_property_cache; in stv0910_init_stats()
1752 p->strength.len = 1; in stv0910_init_stats()
1753 p->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in stv0910_init_stats()
1754 p->cnr.len = 1; in stv0910_init_stats()
1755 p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in stv0910_init_stats()
1756 p->pre_bit_error.len = 1; in stv0910_init_stats()
1757 p->pre_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in stv0910_init_stats()
1758 p->pre_bit_count.len = 1; in stv0910_init_stats()
1759 p->pre_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; in stv0910_init_stats()
1773 state->tscfgh = 0x20 | (cfg->parallel ? 0 : 0x40); in stv0910_attach()
1774 state->tsgeneral = (cfg->parallel == 2) ? 0x02 : 0x00; in stv0910_attach()
1775 state->i2crpt = 0x0A | ((cfg->rptlvl & 0x07) << 4); in stv0910_attach()
1777 state->tsspeed = (cfg->tsspeed ? cfg->tsspeed : 0x28); in stv0910_attach()
1778 state->nr = nr; in stv0910_attach()
1779 state->regoff = state->nr ? 0 : 0x200; in stv0910_attach()
1780 state->search_range = 16000000; in stv0910_attach()
1781 state->demod_bits = 0x10; /* Inversion : Auto with reset to 0 */ in stv0910_attach()
1782 state->receive_mode = RCVMODE_NONE; in stv0910_attach()
1783 state->cur_scrambling_code = (~0U); in stv0910_attach()
1784 state->single = cfg->single ? 1 : 0; in stv0910_attach()
1786 base = match_base(i2c, cfg->adr); in stv0910_attach()
1788 base->count++; in stv0910_attach()
1789 state->base = base; in stv0910_attach()
1794 base->i2c = i2c; in stv0910_attach()
1795 base->adr = cfg->adr; in stv0910_attach()
1796 base->count = 1; in stv0910_attach()
1797 base->extclk = cfg->clk ? cfg->clk : 30000000; in stv0910_attach()
1799 mutex_init(&base->i2c_lock); in stv0910_attach()
1800 mutex_init(&base->reg_lock); in stv0910_attach()
1801 state->base = base; in stv0910_attach()
1803 dev_info(&i2c->dev, "No demod found at adr %02X on %s\n", in stv0910_attach()
1804 cfg->adr, dev_name(&i2c->dev)); in stv0910_attach()
1808 list_add(&base->stvlist, &stvlist); in stv0910_attach()
1810 state->fe.ops = stv0910_ops; in stv0910_attach()
1811 state->fe.demodulator_priv = state; in stv0910_attach()
1812 state->nr = nr; in stv0910_attach()
1814 dev_info(&i2c->dev, "%s demod found at adr %02X on %s\n", in stv0910_attach()
1815 state->fe.ops.info.name, cfg->adr, dev_name(&i2c->dev)); in stv0910_attach()
1819 return &state->fe; in stv0910_attach()