Lines Matching full:state
44 enum stv0367_cab_signal_type state; member
59 enum stv0367_ter_signal_type state; member
122 int stv0367_writereg(struct stv0367_state *state, u16 reg, u8 data) in stv0367_writereg() argument
126 .addr = state->config->demod_address, in stv0367_writereg()
135 state->config->demod_address, reg, data); in stv0367_writereg()
137 ret = i2c_transfer(state->i2c, &msg, 1); in stv0367_writereg()
140 __func__, state->config->demod_address, reg, data); in stv0367_writereg()
146 u8 stv0367_readreg(struct stv0367_state *state, u16 reg) in stv0367_readreg() argument
152 .addr = state->config->demod_address, in stv0367_readreg()
157 .addr = state->config->demod_address, in stv0367_readreg()
168 ret = i2c_transfer(state->i2c, msg, 2); in stv0367_readreg()
171 __func__, state->config->demod_address, reg, b1[0]); in stv0367_readreg()
175 state->config->demod_address, reg, b1[0]); in stv0367_readreg()
194 static void stv0367_writebits(struct stv0367_state *state, u32 label, u8 val) in stv0367_writebits() argument
198 reg = stv0367_readreg(state, (label >> 16) & 0xffff); in stv0367_writebits()
204 stv0367_writereg(state, (label >> 16) & 0xffff, reg); in stv0367_writebits()
219 static u8 stv0367_readbits(struct stv0367_state *state, u32 label) in stv0367_readbits() argument
226 val = stv0367_readreg(state, label >> 16); in stv0367_readbits()
243 static void stv0367_write_table(struct stv0367_state *state, in stv0367_write_table() argument
251 stv0367_writereg(state, deftab[i].addr, deftab[i].value); in stv0367_write_table()
256 static void stv0367_pll_setup(struct stv0367_state *state, in stv0367_pll_setup() argument
270 stv0367_writereg(state, R367TER_PLLMDIV, 0x1b); in stv0367_pll_setup()
271 stv0367_writereg(state, R367TER_PLLNDIV, 0xe8); in stv0367_pll_setup()
280 stv0367_writereg(state, R367TER_PLLMDIV, 0x2); in stv0367_pll_setup()
281 stv0367_writereg(state, R367TER_PLLNDIV, 0x1b); in stv0367_pll_setup()
284 stv0367_writereg(state, R367TER_PLLMDIV, 0xa); in stv0367_pll_setup()
285 stv0367_writereg(state, R367TER_PLLNDIV, 0x55); in stv0367_pll_setup()
290 stv0367_writereg(state, R367TER_PLLMDIV, 0x1); in stv0367_pll_setup()
291 stv0367_writereg(state, R367TER_PLLNDIV, 0x8); in stv0367_pll_setup()
294 stv0367_writereg(state, R367TER_PLLMDIV, 0xc); in stv0367_pll_setup()
295 stv0367_writereg(state, R367TER_PLLNDIV, 0x55); in stv0367_pll_setup()
300 stv0367_writereg(state, R367TER_PLLSETUP, 0x18); in stv0367_pll_setup()
303 static int stv0367_get_if_khz(struct stv0367_state *state, u32 *ifkhz) in stv0367_get_if_khz() argument
305 if (state->auto_if_khz && state->fe.ops.tuner_ops.get_if_frequency) { in stv0367_get_if_khz()
306 state->fe.ops.tuner_ops.get_if_frequency(&state->fe, ifkhz); in stv0367_get_if_khz()
309 *ifkhz = state->config->if_khz; in stv0367_get_if_khz()
316 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_gate_ctrl() local
317 u8 tmp = stv0367_readreg(state, R367TER_I2CRPT); in stv0367ter_gate_ctrl()
329 stv0367_writereg(state, R367TER_I2CRPT, tmp); in stv0367ter_gate_ctrl()
434 static u32 stv0367ter_get_mclk(struct stv0367_state *state, u32 ExtClk_Hz) in stv0367ter_get_mclk() argument
441 if (stv0367_readbits(state, F367TER_BYPASS_PLLXN) == 0) { in stv0367ter_get_mclk()
442 n = (u32)stv0367_readbits(state, F367TER_PLL_NDIV); in stv0367ter_get_mclk()
446 m = (u32)stv0367_readbits(state, F367TER_PLL_MDIV); in stv0367ter_get_mclk()
450 p = (u32)stv0367_readbits(state, F367TER_PLL_PDIV); in stv0367ter_get_mclk()
466 static int stv0367ter_filt_coeff_init(struct stv0367_state *state, in stv0367ter_filt_coeff_init() argument
473 freq = stv0367ter_get_mclk(state, DemodXtal); in stv0367ter_filt_coeff_init()
485 stv0367_writebits(state, F367TER_IIR_CELL_NB, i - 1); in stv0367ter_filt_coeff_init()
488 stv0367_writereg(state, in stv0367ter_filt_coeff_init()
491 stv0367_writereg(state, in stv0367ter_filt_coeff_init()
501 static void stv0367ter_agc_iir_lock_detect_set(struct stv0367_state *state) in stv0367ter_agc_iir_lock_detect_set() argument
505 stv0367_writebits(state, F367TER_LOCK_DETECT_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
508 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x00); in stv0367ter_agc_iir_lock_detect_set()
509 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x06); in stv0367ter_agc_iir_lock_detect_set()
510 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x04); in stv0367ter_agc_iir_lock_detect_set()
513 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x01); in stv0367ter_agc_iir_lock_detect_set()
514 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x06); in stv0367ter_agc_iir_lock_detect_set()
515 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x04); in stv0367ter_agc_iir_lock_detect_set()
518 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x02); in stv0367ter_agc_iir_lock_detect_set()
519 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x01); in stv0367ter_agc_iir_lock_detect_set()
520 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
523 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x03); in stv0367ter_agc_iir_lock_detect_set()
524 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x01); in stv0367ter_agc_iir_lock_detect_set()
525 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
529 static int stv0367_iir_filt_init(struct stv0367_state *state, u8 Bandwidth, in stv0367_iir_filt_init() argument
534 stv0367_writebits(state, F367TER_NRST_IIR, 0); in stv0367_iir_filt_init()
538 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
544 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
550 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
559 stv0367_writebits(state, F367TER_NRST_IIR, 1); in stv0367_iir_filt_init()
564 static void stv0367ter_agc_iir_rst(struct stv0367_state *state) in stv0367ter_agc_iir_rst() argument
571 com_n = stv0367_readbits(state, F367TER_COM_N); in stv0367ter_agc_iir_rst()
573 stv0367_writebits(state, F367TER_COM_N, 0x07); in stv0367ter_agc_iir_rst()
575 stv0367_writebits(state, F367TER_COM_SOFT_RSTN, 0x00); in stv0367ter_agc_iir_rst()
576 stv0367_writebits(state, F367TER_COM_AGC_ON, 0x00); in stv0367ter_agc_iir_rst()
578 stv0367_writebits(state, F367TER_COM_SOFT_RSTN, 0x01); in stv0367ter_agc_iir_rst()
579 stv0367_writebits(state, F367TER_COM_AGC_ON, 0x01); in stv0367ter_agc_iir_rst()
581 stv0367_writebits(state, F367TER_COM_N, com_n); in stv0367ter_agc_iir_rst()
608 stv0367_ter_signal_type stv0367ter_check_syr(struct stv0367_state *state) in stv0367ter_check_syr() argument
616 SYR_var = stv0367_readbits(state, F367TER_SYR_LOCK); in stv0367ter_check_syr()
621 SYR_var = stv0367_readbits(state, F367TER_SYR_LOCK); in stv0367ter_check_syr()
636 stv0367_ter_signal_type stv0367ter_check_cpamp(struct stv0367_state *state, in stv0367ter_check_cpamp() argument
665 CPAMPvalue = stv0367_readbits(state, F367TER_PPM_CPAMP_DIRECT); in stv0367ter_check_cpamp()
669 CPAMPvalue = stv0367_readbits(state, F367TER_PPM_CPAMP_DIRECT); in stv0367ter_check_cpamp()
685 stv0367ter_lock_algo(struct stv0367_state *state) in stv0367ter_lock_algo() argument
694 if (state == NULL) in stv0367ter_lock_algo()
701 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0); in stv0367ter_lock_algo()
703 if (state->config->if_iq_mode != 0) in stv0367ter_lock_algo()
704 stv0367_writebits(state, F367TER_COM_N, 0x07); in stv0367ter_lock_algo()
706 stv0367_writebits(state, F367TER_GUARD, 3);/* suggest 2k 1/4 */ in stv0367ter_lock_algo()
707 stv0367_writebits(state, F367TER_MODE, 0); in stv0367ter_lock_algo()
708 stv0367_writebits(state, F367TER_SYR_TR_DIS, 0); in stv0367ter_lock_algo()
711 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1); in stv0367ter_lock_algo()
714 if (stv0367ter_check_syr(state) == FE_TER_NOSYMBOL) in stv0367ter_lock_algo()
719 mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_lock_algo()
720 if (stv0367ter_check_cpamp(state, mode) == in stv0367ter_lock_algo()
731 tmp = stv0367_readreg(state, R367TER_SYR_STAT); in stv0367ter_lock_algo()
732 tmp2 = stv0367_readreg(state, R367TER_STATUS); in stv0367ter_lock_algo()
733 dprintk("state=%p\n", state); in stv0367ter_lock_algo()
737 tmp = stv0367_readreg(state, R367TER_PRVIT); in stv0367ter_lock_algo()
738 tmp2 = stv0367_readreg(state, R367TER_I2CRPT); in stv0367ter_lock_algo()
741 tmp = stv0367_readreg(state, R367TER_GAIN_SRC1); in stv0367ter_lock_algo()
747 /*guard=stv0367_readbits(state,F367TER_SYR_GUARD); */ in stv0367ter_lock_algo()
756 stv0367_writebits(state, F367TER_AUTO_LE_EN, 0); in stv0367ter_lock_algo()
757 stv0367_writereg(state, R367TER_CHC_CTL, 0x01); in stv0367ter_lock_algo()
761 stv0367_writebits(state, F367TER_AUTO_LE_EN, 1); in stv0367ter_lock_algo()
762 stv0367_writereg(state, R367TER_CHC_CTL, 0x11); in stv0367ter_lock_algo()
771 stv0367_writebits(state, F367TER_RST_SFEC, 1); in stv0367ter_lock_algo()
772 stv0367_writebits(state, F367TER_RST_REEDSOLO, 1); in stv0367ter_lock_algo()
774 stv0367_writebits(state, F367TER_RST_SFEC, 0); in stv0367ter_lock_algo()
775 stv0367_writebits(state, F367TER_RST_REEDSOLO, 0); in stv0367ter_lock_algo()
777 u_var1 = stv0367_readbits(state, F367TER_LK); in stv0367ter_lock_algo()
778 u_var2 = stv0367_readbits(state, F367TER_PRF); in stv0367ter_lock_algo()
779 u_var3 = stv0367_readbits(state, F367TER_TPS_LOCK); in stv0367ter_lock_algo()
780 /* u_var4=stv0367_readbits(state,F367TER_TSFIFO_LINEOK); */ in stv0367ter_lock_algo()
789 u_var1 = stv0367_readbits(state, F367TER_LK); in stv0367ter_lock_algo()
790 u_var2 = stv0367_readbits(state, F367TER_PRF); in stv0367ter_lock_algo()
791 u_var3 = stv0367_readbits(state, F367TER_TPS_LOCK); in stv0367ter_lock_algo()
792 /*u_var4=stv0367_readbits(state, F367TER_TSFIFO_LINEOK); */ in stv0367ter_lock_algo()
805 guard = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_lock_algo()
806 stv0367_writereg(state, R367TER_CHC_CTL, 0x11); in stv0367ter_lock_algo()
810 stv0367_writebits(state, F367TER_AUTO_LE_EN, 0); in stv0367ter_lock_algo()
811 /*stv0367_writereg(state,R367TER_CHC_CTL, 0x1);*/ in stv0367ter_lock_algo()
812 stv0367_writebits(state, F367TER_SYR_FILTER, 0); in stv0367ter_lock_algo()
816 stv0367_writebits(state, F367TER_AUTO_LE_EN, 1); in stv0367ter_lock_algo()
817 /*stv0367_writereg(state,R367TER_CHC_CTL, 0x11);*/ in stv0367ter_lock_algo()
818 stv0367_writebits(state, F367TER_SYR_FILTER, 1); in stv0367ter_lock_algo()
826 if ((stv0367_readbits(state, F367TER_TPS_CONST) == 2) && in stv0367ter_lock_algo()
828 (stv0367_readbits(state, F367TER_TPS_HPCODE) != 0)) { in stv0367ter_lock_algo()
829 stv0367_writereg(state, R367TER_SFDLYSETH, 0xc0); in stv0367ter_lock_algo()
830 stv0367_writereg(state, R367TER_SFDLYSETM, 0x60); in stv0367ter_lock_algo()
831 stv0367_writereg(state, R367TER_SFDLYSETL, 0x0); in stv0367ter_lock_algo()
833 stv0367_writereg(state, R367TER_SFDLYSETH, 0x0); in stv0367ter_lock_algo()
836 u_var4 = stv0367_readbits(state, F367TER_TSFIFO_LINEOK); in stv0367ter_lock_algo()
841 u_var4 = stv0367_readbits(state, F367TER_TSFIFO_LINEOK); in stv0367ter_lock_algo()
850 while ((stv0367_readbits(state,F367TER_COM_USEGAINTRK)!=1) && in stv0367ter_lock_algo()
851 (stv0367_readbits(state,F367TER_COM_AGCLOCK)!=1)&&(tempo<100)) { in stv0367ter_lock_algo()
852 ChipWaitOrAbort(state,1); in stv0367ter_lock_algo()
856 stv0367_writebits(state,F367TER_COM_N,0x17); in stv0367ter_lock_algo()
859 stv0367_writebits(state, F367TER_SYR_TR_DIS, 1); in stv0367ter_lock_algo()
867 static void stv0367ter_set_ts_mode(struct stv0367_state *state, in stv0367ter_set_ts_mode() argument
873 if (state == NULL) in stv0367ter_set_ts_mode()
876 stv0367_writebits(state, F367TER_TS_DIS, 0); in stv0367ter_set_ts_mode()
881 stv0367_writebits(state, F367TER_TSFIFO_SERIAL, 0); in stv0367ter_set_ts_mode()
882 stv0367_writebits(state, F367TER_TSFIFO_DVBCI, 0); in stv0367ter_set_ts_mode()
885 stv0367_writebits(state, F367TER_TSFIFO_SERIAL, 1); in stv0367ter_set_ts_mode()
886 stv0367_writebits(state, F367TER_TSFIFO_DVBCI, 1); in stv0367ter_set_ts_mode()
891 static void stv0367ter_set_clk_pol(struct stv0367_state *state, in stv0367ter_set_clk_pol() argument
897 if (state == NULL) in stv0367ter_set_clk_pol()
902 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 1); in stv0367ter_set_clk_pol()
905 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 0); in stv0367ter_set_clk_pol()
909 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 0); in stv0367ter_set_clk_pol()
915 static void stv0367ter_core_sw(struct stv0367_state *state)
920 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
921 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
927 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_standby() local
932 stv0367_writebits(state, F367TER_STDBY, 1); in stv0367ter_standby()
933 stv0367_writebits(state, F367TER_STDBY_FEC, 1); in stv0367ter_standby()
934 stv0367_writebits(state, F367TER_STDBY_CORE, 1); in stv0367ter_standby()
936 stv0367_writebits(state, F367TER_STDBY, 0); in stv0367ter_standby()
937 stv0367_writebits(state, F367TER_STDBY_FEC, 0); in stv0367ter_standby()
938 stv0367_writebits(state, F367TER_STDBY_CORE, 0); in stv0367ter_standby()
951 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_init() local
952 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_init()
958 stv0367_write_table(state, in stv0367ter_init()
959 stv0367_deftabs[state->deftabs][STV0367_TAB_TER]); in stv0367ter_init()
961 stv0367_pll_setup(state, STV0367_ICSPEED_53125, state->config->xtal); in stv0367ter_init()
963 stv0367_writereg(state, R367TER_I2CRPT, 0xa0); in stv0367ter_init()
964 stv0367_writereg(state, R367TER_ANACTRL, 0x00); in stv0367ter_init()
967 stv0367ter_set_ts_mode(state, state->config->ts_mode); in stv0367ter_init()
968 stv0367ter_set_clk_pol(state, state->config->clk_pol); in stv0367ter_init()
970 state->chip_id = stv0367_readreg(state, R367TER_ID); in stv0367ter_init()
980 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_algo() local
981 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_algo()
991 stv0367_get_if_khz(state, &ifkhz); in stv0367ter_algo()
995 + stv0367_readbits(state, F367TER_FORCE) * 2; in stv0367ter_algo()
996 ter_state->if_iq_mode = state->config->if_iq_mode; in stv0367ter_algo()
997 switch (state->config->if_iq_mode) { in stv0367ter_algo()
1000 stv0367_writebits(state, F367TER_TUNER_BB, 0); in stv0367ter_algo()
1001 stv0367_writebits(state, F367TER_LONGPATH_IF, 0); in stv0367ter_algo()
1002 stv0367_writebits(state, F367TER_DEMUX_SWAP, 0); in stv0367ter_algo()
1006 stv0367_writebits(state, F367TER_TUNER_BB, 0); in stv0367ter_algo()
1007 stv0367_writebits(state, F367TER_LONGPATH_IF, 1); in stv0367ter_algo()
1008 stv0367_writebits(state, F367TER_DEMUX_SWAP, 1); in stv0367ter_algo()
1012 stv0367_writebits(state, F367TER_TUNER_BB, 1); in stv0367ter_algo()
1013 stv0367_writebits(state, F367TER_PPM_INVSEL, 0); in stv0367ter_algo()
1027 stv0367_writebits(state, F367TER_IQ_INVERT, in stv0367ter_algo()
1030 stv0367_writebits(state, F367TER_INV_SPECTR, in stv0367ter_algo()
1037 stv0367_writebits(state, F367TER_IQ_INVERT, in stv0367ter_algo()
1040 stv0367_writebits(state, F367TER_INV_SPECTR, in stv0367ter_algo()
1048 stv0367ter_agc_iir_lock_detect_set(state); in stv0367ter_algo()
1052 stv0367_writebits(state, F367TER_SEL_IQNTAR, 1); in stv0367ter_algo()
1053 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_MSB, 0xB); in stv0367ter_algo()
1054 /*stv0367_writebits(state,AUT_AGC_TARGET_LSB,0x04); */ in stv0367ter_algo()
1057 stv0367_writebits(state, F367TER_SEL_IQNTAR, 0); in stv0367ter_algo()
1058 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_MSB, 0xB); in stv0367ter_algo()
1059 /*stv0367_writebits(state,AUT_AGC_TARGET_LSB,0x04); */ in stv0367ter_algo()
1061 if (!stv0367_iir_filt_init(state, ter_state->bw, in stv0367ter_algo()
1062 state->config->xtal)) in stv0367ter_algo()
1067 stv0367ter_agc_iir_rst(state); in stv0367ter_algo()
1071 stv0367_writebits(state, F367TER_BDI_LPSEL, 0x01); in stv0367ter_algo()
1073 stv0367_writebits(state, F367TER_BDI_LPSEL, 0x00); in stv0367ter_algo()
1075 InternalFreq = stv0367ter_get_mclk(state, state->config->xtal) / 1000; in stv0367ter_algo()
1080 stv0367_writebits(state, F367TER_TRL_NOMRATE_LSB, temp % 2); in stv0367ter_algo()
1082 stv0367_writebits(state, F367TER_TRL_NOMRATE_HI, temp / 256); in stv0367ter_algo()
1083 stv0367_writebits(state, F367TER_TRL_NOMRATE_LO, temp % 256); in stv0367ter_algo()
1085 temp = stv0367_readbits(state, F367TER_TRL_NOMRATE_HI) * 512 + in stv0367ter_algo()
1086 stv0367_readbits(state, F367TER_TRL_NOMRATE_LO) * 2 + in stv0367ter_algo()
1087 stv0367_readbits(state, F367TER_TRL_NOMRATE_LSB); in stv0367ter_algo()
1089 stv0367_writebits(state, F367TER_GAIN_SRC_HI, temp / 256); in stv0367ter_algo()
1090 stv0367_writebits(state, F367TER_GAIN_SRC_LO, temp % 256); in stv0367ter_algo()
1091 temp = stv0367_readbits(state, F367TER_GAIN_SRC_HI) * 256 + in stv0367ter_algo()
1092 stv0367_readbits(state, F367TER_GAIN_SRC_LO); in stv0367ter_algo()
1098 stv0367_writebits(state, F367TER_INC_DEROT_HI, temp / 256); in stv0367ter_algo()
1099 stv0367_writebits(state, F367TER_INC_DEROT_LO, temp % 256); in stv0367ter_algo()
1104 stv0367_writebits(state, F367TER_LONG_ECHO, ter_state->echo_pos); in stv0367ter_algo()
1106 if (stv0367ter_lock_algo(state) != FE_TER_LOCKOK) in stv0367ter_algo()
1109 ter_state->state = FE_TER_LOCKOK; in stv0367ter_algo()
1111 ter_state->mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_algo()
1112 ter_state->guard = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_algo()
1117 (stv0367_readbits(state, F367TER_AGC1_VAL_LO) << 16) + in stv0367ter_algo()
1118 (stv0367_readbits(state, F367TER_AGC1_VAL_HI) << 24) + in stv0367ter_algo()
1119 stv0367_readbits(state, F367TER_AGC2_VAL_LO) + in stv0367ter_algo()
1120 (stv0367_readbits(state, F367TER_AGC2_VAL_HI) << 8); in stv0367ter_algo()
1123 stv0367_writebits(state, F367TER_FREEZE, 1); in stv0367ter_algo()
1124 offset = (stv0367_readbits(state, F367TER_CRL_FOFFSET_VHI) << 16) ; in stv0367ter_algo()
1125 offset += (stv0367_readbits(state, F367TER_CRL_FOFFSET_HI) << 8); in stv0367ter_algo()
1126 offset += (stv0367_readbits(state, F367TER_CRL_FOFFSET_LO)); in stv0367ter_algo()
1127 stv0367_writebits(state, F367TER_FREEZE, 0); in stv0367ter_algo()
1140 if (stv0367_readbits(state, F367TER_PPM_INVSEL) == 1) { in stv0367ter_algo()
1141 if ((stv0367_readbits(state, F367TER_INV_SPECTR) == in stv0367ter_algo()
1142 (stv0367_readbits(state, in stv0367ter_algo()
1158 timing_offset = stv0367_readbits(state, F367TER_TRL_TOFFSET_LO) in stv0367ter_algo()
1159 + 256 * stv0367_readbits(state, in stv0367ter_algo()
1163 trl_nomrate = (512 * stv0367_readbits(state, in stv0367ter_algo()
1165 + stv0367_readbits(state, F367TER_TRL_NOMRATE_LO) * 2 in stv0367ter_algo()
1166 + stv0367_readbits(state, F367TER_TRL_NOMRATE_LSB)); in stv0367ter_algo()
1183 stv0367_writebits(state, F367TER_TRL_NOMRATE_LSB, in stv0367ter_algo()
1185 stv0367_writebits(state, F367TER_TRL_NOMRATE_LO, in stv0367ter_algo()
1193 u_var = stv0367_readbits(state, F367TER_LK); in stv0367ter_algo()
1196 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0); in stv0367ter_algo()
1198 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1); in stv0367ter_algo()
1207 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_set_frontend() local
1208 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_set_frontend()
1214 if (state->reinit_on_setfrontend) in stv0367ter_set_frontend()
1218 if (state->use_i2c_gatectrl && fe->ops.i2c_gate_ctrl) in stv0367ter_set_frontend()
1221 if (state->use_i2c_gatectrl && fe->ops.i2c_gate_ctrl) in stv0367ter_set_frontend()
1278 ter_state->state = FE_TER_NOLOCK; in stv0367ter_set_frontend()
1281 while (((index) < num_trials) && (ter_state->state != FE_TER_LOCKOK)) { in stv0367ter_set_frontend()
1289 if ((ter_state->state == FE_TER_LOCKOK) && in stv0367ter_set_frontend()
1305 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_ucblocks() local
1306 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_read_ucblocks()
1310 if (stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 0) { in stv0367ter_read_ucblocks()
1312 ((u32)stv0367_readbits(state, F367TER_ERR_CNT1) in stv0367ter_read_ucblocks()
1314 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_HI) in stv0367ter_read_ucblocks()
1316 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_LO)); in stv0367ter_read_ucblocks()
1328 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_get_frontend() local
1329 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_get_frontend()
1337 constell = stv0367_readbits(state, F367TER_TPS_CONST); in stv0367ter_get_frontend()
1345 p->inversion = stv0367_readbits(state, F367TER_INV_SPECTR); in stv0367ter_get_frontend()
1348 Data = stv0367_readbits(state, F367TER_TPS_HIERMODE); in stv0367ter_get_frontend()
1370 Data = stv0367_readbits(state, F367TER_TPS_LPCODE); in stv0367ter_get_frontend()
1372 Data = stv0367_readbits(state, F367TER_TPS_HPCODE); in stv0367ter_get_frontend()
1395 mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_get_frontend()
1411 p->guard_interval = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_get_frontend()
1418 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_snr_readreg() local
1421 u8 cut = stv0367_readbits(state, F367TER_IDENTIFICATIONREG); in stv0367ter_snr_readreg()
1426 snru32 += stv0367_readbits(state, F367TER_CHCSNR) / 4; in stv0367ter_snr_readreg()
1428 snru32 += 125 * stv0367_readbits(state, F367TER_CHCSNR); in stv0367ter_snr_readreg()
1450 struct stv0367_state *state = fe->demodulator_priv;
1451 struct stv0367ter_state *ter_state = state->ter_state;
1454 locked = (stv0367_readbits(state, F367TER_LK));
1461 if (!stv0367_readbits(state, F367TER_TPS_LOCK) ||
1462 (!stv0367_readbits(state, F367TER_LK))) {
1463 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
1465 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
1467 locked = (stv0367_readbits(state, F367TER_TPS_LOCK)) &&
1468 (stv0367_readbits(state, F367TER_LK));
1479 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_status() local
1485 if (stv0367_readbits(state, F367TER_LK)) { in stv0367ter_read_status()
1496 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_ber() local
1497 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_read_ber()
1503 if (stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 0) in stv0367ter_read_ber()
1504 Errors = ((u32)stv0367_readbits(state, F367TER_SFEC_ERR_CNT) in stv0367ter_read_ber()
1506 + ((u32)stv0367_readbits(state, F367TER_SFEC_ERR_CNT_HI) in stv0367ter_read_ber()
1508 + ((u32)stv0367_readbits(state, in stv0367ter_read_ber()
1516 abc = stv0367_readbits(state, F367TER_SFEC_ERR_SOURCE); in stv0367ter_read_ber()
1517 def = stv0367_readbits(state, F367TER_SFEC_NUM_EVENT); in stv0367ter_read_ber()
1577 static u32 stv0367ter_get_per(struct stv0367_state *state)
1579 struct stv0367ter_state *ter_state = state->ter_state;
1583 while (((stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 1) &&
1586 Errors = ((u32)stv0367_readbits(state, F367TER_ERR_CNT1)
1588 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_HI)
1590 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_LO));
1593 abc = stv0367_readbits(state, F367TER_ERR_SRC1);
1594 def = stv0367_readbits(state, F367TER_NUM_EVT1);
1657 struct stv0367_state *state = fe->demodulator_priv; in stv0367_release() local
1659 kfree(state->ter_state); in stv0367_release()
1660 kfree(state->cab_state); in stv0367_release()
1661 kfree(state); in stv0367_release()
1697 struct stv0367_state *state = NULL; in stv0367ter_attach() local
1700 /* allocate memory for the internal state */ in stv0367ter_attach()
1701 state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL); in stv0367ter_attach()
1702 if (state == NULL) in stv0367ter_attach()
1708 /* setup the state */ in stv0367ter_attach()
1709 state->i2c = i2c; in stv0367ter_attach()
1710 state->config = config; in stv0367ter_attach()
1711 state->ter_state = ter_state; in stv0367ter_attach()
1712 state->fe.ops = stv0367ter_ops; in stv0367ter_attach()
1713 state->fe.demodulator_priv = state; in stv0367ter_attach()
1714 state->chip_id = stv0367_readreg(state, 0xf000); in stv0367ter_attach()
1717 state->use_i2c_gatectrl = 1; in stv0367ter_attach()
1718 state->deftabs = STV0367_DEFTAB_GENERIC; in stv0367ter_attach()
1719 state->reinit_on_setfrontend = 1; in stv0367ter_attach()
1720 state->auto_if_khz = 0; in stv0367ter_attach()
1722 dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id); in stv0367ter_attach()
1725 if ((state->chip_id != 0x50) && (state->chip_id != 0x60)) in stv0367ter_attach()
1728 return &state->fe; in stv0367ter_attach()
1732 kfree(state); in stv0367ter_attach()
1739 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_gate_ctrl() local
1743 stv0367_writebits(state, F367CAB_I2CT_ON, (enable > 0) ? 1 : 0); in stv0367cab_gate_ctrl()
1750 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_get_mclk() local
1755 if (stv0367_readbits(state, F367CAB_BYPASS_PLLXN) == 0) { in stv0367cab_get_mclk()
1756 N = (u32)stv0367_readbits(state, F367CAB_PLL_NDIV); in stv0367cab_get_mclk()
1760 M = (u32)stv0367_readbits(state, F367CAB_PLL_MDIV); in stv0367cab_get_mclk()
1764 P = (u32)stv0367_readbits(state, F367CAB_PLL_PDIV); in stv0367cab_get_mclk()
1785 static enum stv0367cab_mod stv0367cab_SetQamSize(struct stv0367_state *state, in stv0367cab_SetQamSize() argument
1790 stv0367_writebits(state, F367CAB_QAM_MODE, QAMSize); in stv0367cab_SetQamSize()
1795 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1798 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x64); in stv0367cab_SetQamSize()
1799 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1800 stv0367_writereg(state, R367CAB_FSM_STATE, 0x90); in stv0367cab_SetQamSize()
1801 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1802 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
1803 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x95); in stv0367cab_SetQamSize()
1804 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
1805 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0x8a); in stv0367cab_SetQamSize()
1808 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1809 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x6e); in stv0367cab_SetQamSize()
1810 stv0367_writereg(state, R367CAB_FSM_STATE, 0xb0); in stv0367cab_SetQamSize()
1811 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1812 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xb7); in stv0367cab_SetQamSize()
1813 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x9d); in stv0367cab_SetQamSize()
1814 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x7f); in stv0367cab_SetQamSize()
1815 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
1818 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x82); in stv0367cab_SetQamSize()
1819 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x5a); in stv0367cab_SetQamSize()
1821 stv0367_writereg(state, R367CAB_FSM_STATE, 0xb0); in stv0367cab_SetQamSize()
1822 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1823 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa5); in stv0367cab_SetQamSize()
1825 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
1826 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1827 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa6); in stv0367cab_SetQamSize()
1829 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
1830 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xd1); in stv0367cab_SetQamSize()
1831 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
1833 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x95); in stv0367cab_SetQamSize()
1834 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
1835 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0x99); in stv0367cab_SetQamSize()
1838 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1839 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x76); in stv0367cab_SetQamSize()
1840 stv0367_writereg(state, R367CAB_FSM_STATE, 0x90); in stv0367cab_SetQamSize()
1841 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xb1); in stv0367cab_SetQamSize()
1843 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
1845 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa6); in stv0367cab_SetQamSize()
1847 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0x97); in stv0367cab_SetQamSize()
1849 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x8e); in stv0367cab_SetQamSize()
1850 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x7f); in stv0367cab_SetQamSize()
1851 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
1854 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x94); in stv0367cab_SetQamSize()
1855 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x5a); in stv0367cab_SetQamSize()
1856 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
1858 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1860 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1862 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xd1); in stv0367cab_SetQamSize()
1864 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
1865 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x85); in stv0367cab_SetQamSize()
1866 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
1867 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
1870 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1873 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1882 static u32 stv0367cab_set_derot_freq(struct stv0367_state *state, in stv0367cab_set_derot_freq() argument
1908 stv0367_writereg(state, R367CAB_MIX_NCO_LL, sampled_if); in stv0367cab_set_derot_freq()
1909 stv0367_writereg(state, R367CAB_MIX_NCO_HL, (sampled_if >> 8)); in stv0367cab_set_derot_freq()
1910 stv0367_writebits(state, F367CAB_MIX_NCO_INC_HH, (sampled_if >> 16)); in stv0367cab_set_derot_freq()
1915 static u32 stv0367cab_get_derot_freq(struct stv0367_state *state, u32 adc_hz) in stv0367cab_get_derot_freq() argument
1919 sampled_if = stv0367_readbits(state, F367CAB_MIX_NCO_INC_LL) + in stv0367cab_get_derot_freq()
1920 (stv0367_readbits(state, F367CAB_MIX_NCO_INC_HL) << 8) + in stv0367cab_get_derot_freq()
1921 (stv0367_readbits(state, F367CAB_MIX_NCO_INC_HH) << 16); in stv0367cab_get_derot_freq()
1931 static u32 stv0367cab_set_srate(struct stv0367_state *state, u32 adc_hz, in stv0367cab_set_srate() argument
1976 stv0367_writereg(state, R367CAB_EQU_CRL_TFR, (u8)u32_tmp); in stv0367cab_set_srate()
2050 if (stv0367_readbits(state, F367CAB_ADJ_EN)) { in stv0367cab_set_srate()
2051 stv0367cab_SetIirAdjacentcoefficient(state, mclk_hz, in stv0367cab_set_srate()
2055 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 1); in stv0367cab_set_srate()
2056 stv0367cab_SetAllPasscoefficient(state, mclk_hz, SymbolRate); in stv0367cab_set_srate()
2061 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0); in stv0367cab_set_srate()
2063 stv0367_writereg(state, R367CAB_SRC_NCO_LL, u32_tmp); in stv0367cab_set_srate()
2064 stv0367_writereg(state, R367CAB_SRC_NCO_LH, (u32_tmp >> 8)); in stv0367cab_set_srate()
2065 stv0367_writereg(state, R367CAB_SRC_NCO_HL, (u32_tmp >> 16)); in stv0367cab_set_srate()
2066 stv0367_writereg(state, R367CAB_SRC_NCO_HH, (u32_tmp >> 24)); in stv0367cab_set_srate()
2068 stv0367_writereg(state, R367CAB_IQDEM_GAIN_SRC_L, u32_tmp1 & 0x00ff); in stv0367cab_set_srate()
2069 stv0367_writebits(state, F367CAB_GAIN_SRC_HI, (u32_tmp1 >> 8) & 0x00ff); in stv0367cab_set_srate()
2074 static u32 stv0367cab_GetSymbolRate(struct stv0367_state *state, u32 mclk_hz) in stv0367cab_GetSymbolRate() argument
2079 regsym = stv0367_readreg(state, R367CAB_SRC_NCO_LL) + in stv0367cab_GetSymbolRate()
2080 (stv0367_readreg(state, R367CAB_SRC_NCO_LH) << 8) + in stv0367cab_GetSymbolRate()
2081 (stv0367_readreg(state, R367CAB_SRC_NCO_HL) << 16) + in stv0367cab_GetSymbolRate()
2082 (stv0367_readreg(state, R367CAB_SRC_NCO_HH) << 24); in stv0367cab_GetSymbolRate()
2119 static u32 stv0367cab_fsm_status(struct stv0367_state *state) in stv0367cab_fsm_status() argument
2121 return stv0367_readbits(state, F367CAB_FSM_STATUS); in stv0367cab_fsm_status()
2124 static u32 stv0367cab_qamfec_lock(struct stv0367_state *state) in stv0367cab_qamfec_lock() argument
2126 return stv0367_readbits(state, in stv0367cab_qamfec_lock()
2127 (state->cab_state->qamfec_status_reg ? in stv0367cab_qamfec_lock()
2128 state->cab_state->qamfec_status_reg : in stv0367cab_qamfec_lock()
2187 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_status() local
2193 /* update cab_state->state from QAM_FSM_STATUS */ in stv0367cab_read_status()
2194 state->cab_state->state = stv0367cab_fsm_signaltype( in stv0367cab_read_status()
2195 stv0367cab_fsm_status(state)); in stv0367cab_read_status()
2197 if (stv0367cab_qamfec_lock(state)) { in stv0367cab_read_status()
2202 if (state->cab_state->state > FE_CAB_NOSIGNAL) in stv0367cab_read_status()
2205 if (state->cab_state->state > FE_CAB_NOCARRIER) in stv0367cab_read_status()
2208 if (state->cab_state->state >= FE_CAB_DEMODOK) in stv0367cab_read_status()
2211 if (state->cab_state->state >= FE_CAB_DATAOK) in stv0367cab_read_status()
2220 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_standby() local
2225 stv0367_writebits(state, F367CAB_BYPASS_PLLXN, 0x03); in stv0367cab_standby()
2226 stv0367_writebits(state, F367CAB_STDBY_PLLXN, 0x01); in stv0367cab_standby()
2227 stv0367_writebits(state, F367CAB_STDBY, 1); in stv0367cab_standby()
2228 stv0367_writebits(state, F367CAB_STDBY_CORE, 1); in stv0367cab_standby()
2229 stv0367_writebits(state, F367CAB_EN_BUFFER_I, 0); in stv0367cab_standby()
2230 stv0367_writebits(state, F367CAB_EN_BUFFER_Q, 0); in stv0367cab_standby()
2231 stv0367_writebits(state, F367CAB_POFFQ, 1); in stv0367cab_standby()
2232 stv0367_writebits(state, F367CAB_POFFI, 1); in stv0367cab_standby()
2234 stv0367_writebits(state, F367CAB_STDBY_PLLXN, 0x00); in stv0367cab_standby()
2235 stv0367_writebits(state, F367CAB_BYPASS_PLLXN, 0x00); in stv0367cab_standby()
2236 stv0367_writebits(state, F367CAB_STDBY, 0); in stv0367cab_standby()
2237 stv0367_writebits(state, F367CAB_STDBY_CORE, 0); in stv0367cab_standby()
2238 stv0367_writebits(state, F367CAB_EN_BUFFER_I, 1); in stv0367cab_standby()
2239 stv0367_writebits(state, F367CAB_EN_BUFFER_Q, 1); in stv0367cab_standby()
2240 stv0367_writebits(state, F367CAB_POFFQ, 0); in stv0367cab_standby()
2241 stv0367_writebits(state, F367CAB_POFFI, 0); in stv0367cab_standby()
2254 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_init() local
2255 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_init()
2259 stv0367_write_table(state, in stv0367cab_init()
2260 stv0367_deftabs[state->deftabs][STV0367_TAB_CAB]); in stv0367cab_init()
2262 switch (state->config->ts_mode) { in stv0367cab_init()
2265 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x03); in stv0367cab_init()
2269 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x01); in stv0367cab_init()
2273 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x00); in stv0367cab_init()
2277 switch (state->config->clk_pol) { in stv0367cab_init()
2279 stv0367_writebits(state, F367CAB_CLK_POLARITY, 0x00); in stv0367cab_init()
2283 stv0367_writebits(state, F367CAB_CLK_POLARITY, 0x01); in stv0367cab_init()
2287 stv0367_writebits(state, F367CAB_SYNC_STRIP, 0x00); in stv0367cab_init()
2289 stv0367_writebits(state, F367CAB_CT_NBST, 0x01); in stv0367cab_init()
2291 stv0367_writebits(state, F367CAB_TS_SWAP, 0x01); in stv0367cab_init()
2293 stv0367_writebits(state, F367CAB_FIFO_BYPASS, 0x00); in stv0367cab_init()
2295 stv0367_writereg(state, R367CAB_ANACTRL, 0x00);/*PLL enabled and used */ in stv0367cab_init()
2297 cab_state->mclk = stv0367cab_get_mclk(fe, state->config->xtal); in stv0367cab_init()
2298 cab_state->adc_clk = stv0367cab_get_adc_freq(fe, state->config->xtal); in stv0367cab_init()
2303 enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state, in stv0367cab_algo() argument
2306 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_algo()
2316 stv0367_get_if_khz(state, &ifkhz); in stv0367cab_algo()
2384 stv0367_writereg(state, R367CAB_CTRL_1, 0x04); in stv0367cab_algo()
2387 TrackAGCAccum = stv0367_readbits(state, F367CAB_AGC_ACCUMRSTSEL); in stv0367cab_algo()
2388 stv0367_writebits(state, F367CAB_AGC_ACCUMRSTSEL, 0x0); in stv0367cab_algo()
2390 stv0367_writebits(state, F367CAB_MODULUSMAP_EN, 0); in stv0367cab_algo()
2392 stv0367_writebits(state, F367CAB_SWEEP_EN, 0); in stv0367cab_algo()
2395 stv0367cab_set_derot_freq(state, cab_state->adc_clk, in stv0367cab_algo()
2399 stv0367_writebits(state, F367CAB_ADJ_EN, 0); in stv0367cab_algo()
2400 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0); in stv0367cab_algo()
2411 stv0367_writereg(state, R367CAB_CTRL_1, 0x00); in stv0367cab_algo()
2413 QAM_Lock = stv0367cab_fsm_status(state); in stv0367cab_algo()
2430 u32_tmp = stv0367_readbits(state, in stv0367cab_algo()
2432 (stv0367_readbits(state, in stv0367cab_algo()
2434 (stv0367_readbits(state, in stv0367cab_algo()
2438 u32_tmp = u32_tmp / (1 << (11 - stv0367_readbits(state, in stv0367cab_algo()
2441 if (u32_tmp < stv0367_readbits(state, in stv0367cab_algo()
2443 256 * stv0367_readbits(state, in stv0367cab_algo()
2451 tmp = stv0367_readreg(state, R367CAB_IT_STATUS1); in stv0367cab_algo()
2460 tmp = stv0367_readreg(state, R367CAB_IT_STATUS1); in stv0367cab_algo()
2462 tmp = stv0367_readreg(state, R367CAB_IT_STATUS2); in stv0367cab_algo()
2465 tmp = stv0367cab_get_derot_freq(state, cab_state->adc_clk); in stv0367cab_algo()
2474 QAMFEC_Lock = stv0367cab_qamfec_lock(state); in stv0367cab_algo()
2481 cab_state->spect_inv = stv0367_readbits(state, in stv0367cab_algo()
2489 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_algo()
2494 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_algo()
2500 stv0367cab_get_derot_freq(state, in stv0367cab_algo()
2505 cab_state->symbol_rate = stv0367cab_GetSymbolRate(state, in stv0367cab_algo()
2509 /* stv0367_setbits(state, F367CAB_AGC_ACCUMRSTSEL,7);*/ in stv0367cab_algo()
2514 stv0367_writebits(state, F367CAB_AGC_ACCUMRSTSEL, TrackAGCAccum); in stv0367cab_algo()
2521 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_set_frontend() local
2522 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_set_frontend()
2550 if (state->reinit_on_setfrontend) in stv0367cab_set_frontend()
2555 if (state->use_i2c_gatectrl && fe->ops.i2c_gate_ctrl) in stv0367cab_set_frontend()
2558 if (state->use_i2c_gatectrl && fe->ops.i2c_gate_ctrl) in stv0367cab_set_frontend()
2563 state, in stv0367cab_set_frontend()
2567 stv0367cab_set_srate(state, in stv0367cab_set_frontend()
2573 cab_state->state = stv0367cab_algo(state, p); in stv0367cab_set_frontend()
2580 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_get_frontend() local
2581 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_get_frontend()
2588 stv0367_get_if_khz(state, &ifkhz); in stv0367cab_get_frontend()
2589 p->symbol_rate = stv0367cab_GetSymbolRate(state, cab_state->mclk); in stv0367cab_get_frontend()
2591 QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE); in stv0367cab_get_frontend()
2618 (stv0367cab_get_derot_freq(state, cab_state->adc_clk) - in stv0367cab_get_frontend()
2625 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_get_frontend()
2629 - stv0367cab_get_derot_freq(state, cab_state->adc_clk)); in stv0367cab_get_frontend()
2635 void stv0367cab_GetErrorCount(state, enum stv0367cab_mod QAMSize,
2638 stv0367cab_OptimiseNByteAndGetBER(state, QAMSize, symbol_rate, Monitor_results);
2639 stv0367cab_GetPacketsCount(state, Monitor_results);
2646 struct stv0367_state *state = fe->demodulator_priv;
2651 static s32 stv0367cab_get_rf_lvl(struct stv0367_state *state) in stv0367cab_get_rf_lvl() argument
2657 stv0367_writebits(state, F367CAB_STDBY_ADCGP, 0x0); in stv0367cab_get_rf_lvl()
2660 (stv0367_readbits(state, F367CAB_RF_AGC1_LEVEL_LO) & 0x03) + in stv0367cab_get_rf_lvl()
2661 (stv0367_readbits(state, F367CAB_RF_AGC1_LEVEL_HI) << 2); in stv0367cab_get_rf_lvl()
2665 stv0367_readbits(state, F367CAB_AGC_IF_PWMCMD_LO) + in stv0367cab_get_rf_lvl()
2666 (stv0367_readbits(state, F367CAB_AGC_IF_PWMCMD_HI) << 8); in stv0367cab_get_rf_lvl()
2699 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_strength() local
2701 s32 signal = stv0367cab_get_rf_lvl(state); in stv0367cab_read_strength()
2717 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_snr_power() local
2720 QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE); in stv0367cab_snr_power()
2745 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_snr_readreg() local
2750 regval += (stv0367_readbits(state, F367CAB_SNR_LO) in stv0367cab_snr_readreg()
2751 + 256 * stv0367_readbits(state, F367CAB_SNR_HI)); in stv0367cab_snr_readreg()
2762 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_snr() local
2772 * (1 << (3 + stv0367_readbits(state, F367CAB_SNR_PER))); in stv0367cab_read_snr()
2817 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_ucblcks() local
2820 *ucblocks = (stv0367_readreg(state, R367CAB_RS_COUNTER_5) << 8) in stv0367cab_read_ucblcks()
2821 | stv0367_readreg(state, R367CAB_RS_COUNTER_4); in stv0367cab_read_ucblcks()
2822 corrected = (stv0367_readreg(state, R367CAB_RS_COUNTER_3) << 8) in stv0367cab_read_ucblcks()
2823 | stv0367_readreg(state, R367CAB_RS_COUNTER_2); in stv0367cab_read_ucblcks()
2824 tscount = (stv0367_readreg(state, R367CAB_RS_COUNTER_2) << 8) in stv0367cab_read_ucblcks()
2825 | stv0367_readreg(state, R367CAB_RS_COUNTER_1); in stv0367cab_read_ucblcks()
2864 struct stv0367_state *state = NULL; in stv0367cab_attach() local
2867 /* allocate memory for the internal state */ in stv0367cab_attach()
2868 state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL); in stv0367cab_attach()
2869 if (state == NULL) in stv0367cab_attach()
2875 /* setup the state */ in stv0367cab_attach()
2876 state->i2c = i2c; in stv0367cab_attach()
2877 state->config = config; in stv0367cab_attach()
2880 state->cab_state = cab_state; in stv0367cab_attach()
2881 state->fe.ops = stv0367cab_ops; in stv0367cab_attach()
2882 state->fe.demodulator_priv = state; in stv0367cab_attach()
2883 state->chip_id = stv0367_readreg(state, 0xf000); in stv0367cab_attach()
2886 state->use_i2c_gatectrl = 1; in stv0367cab_attach()
2887 state->deftabs = STV0367_DEFTAB_GENERIC; in stv0367cab_attach()
2888 state->reinit_on_setfrontend = 1; in stv0367cab_attach()
2889 state->auto_if_khz = 0; in stv0367cab_attach()
2891 dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id); in stv0367cab_attach()
2894 if ((state->chip_id != 0x50) && (state->chip_id != 0x60)) in stv0367cab_attach()
2897 return &state->fe; in stv0367cab_attach()
2901 kfree(state); in stv0367cab_attach()
2910 static void stv0367ddb_setup_ter(struct stv0367_state *state) in stv0367ddb_setup_ter() argument
2912 stv0367_writereg(state, R367TER_DEBUG_LT4, 0x00); in stv0367ddb_setup_ter()
2913 stv0367_writereg(state, R367TER_DEBUG_LT5, 0x00); in stv0367ddb_setup_ter()
2914 stv0367_writereg(state, R367TER_DEBUG_LT6, 0x00); /* R367CAB_CTRL_1 */ in stv0367ddb_setup_ter()
2915 stv0367_writereg(state, R367TER_DEBUG_LT7, 0x00); /* R367CAB_CTRL_2 */ in stv0367ddb_setup_ter()
2916 stv0367_writereg(state, R367TER_DEBUG_LT8, 0x00); in stv0367ddb_setup_ter()
2917 stv0367_writereg(state, R367TER_DEBUG_LT9, 0x00); in stv0367ddb_setup_ter()
2921 stv0367_writereg(state, R367TER_ANADIGCTRL, 0x89); in stv0367ddb_setup_ter()
2922 stv0367_writereg(state, R367TER_DUAL_AD12, 0x04); /* ADCQ disabled */ in stv0367ddb_setup_ter()
2926 stv0367_writereg(state, R367TER_ANACTRL, 0x0D); in stv0367ddb_setup_ter()
2927 stv0367_writereg(state, R367TER_TOPCTRL, 0x00); /* Set OFDM */ in stv0367ddb_setup_ter()
2930 stv0367_pll_setup(state, STV0367_ICSPEED_53125, state->config->xtal); in stv0367ddb_setup_ter()
2934 stv0367_writereg(state, R367TER_ANACTRL, 0x00); in stv0367ddb_setup_ter()
2936 state->activedemod = demod_ter; in stv0367ddb_setup_ter()
2939 static void stv0367ddb_setup_cab(struct stv0367_state *state) in stv0367ddb_setup_cab() argument
2941 stv0367_writereg(state, R367TER_DEBUG_LT4, 0x00); in stv0367ddb_setup_cab()
2942 stv0367_writereg(state, R367TER_DEBUG_LT5, 0x01); in stv0367ddb_setup_cab()
2943 stv0367_writereg(state, R367TER_DEBUG_LT6, 0x06); /* R367CAB_CTRL_1 */ in stv0367ddb_setup_cab()
2944 stv0367_writereg(state, R367TER_DEBUG_LT7, 0x03); /* R367CAB_CTRL_2 */ in stv0367ddb_setup_cab()
2945 stv0367_writereg(state, R367TER_DEBUG_LT8, 0x00); in stv0367ddb_setup_cab()
2946 stv0367_writereg(state, R367TER_DEBUG_LT9, 0x00); in stv0367ddb_setup_cab()
2950 stv0367_writereg(state, R367TER_ANADIGCTRL, 0x8B); in stv0367ddb_setup_cab()
2952 stv0367_writereg(state, R367TER_DUAL_AD12, 0x04); in stv0367ddb_setup_cab()
2956 stv0367_writereg(state, R367TER_ANACTRL, 0x0D); in stv0367ddb_setup_cab()
2958 stv0367_writereg(state, R367TER_TOPCTRL, 0x10); in stv0367ddb_setup_cab()
2961 stv0367_pll_setup(state, STV0367_ICSPEED_58000, state->config->xtal); in stv0367ddb_setup_cab()
2965 stv0367_writereg(state, R367TER_ANACTRL, 0x00); in stv0367ddb_setup_cab()
2967 state->cab_state->mclk = stv0367cab_get_mclk(&state->fe, in stv0367ddb_setup_cab()
2968 state->config->xtal); in stv0367ddb_setup_cab()
2969 state->cab_state->adc_clk = stv0367cab_get_adc_freq(&state->fe, in stv0367ddb_setup_cab()
2970 state->config->xtal); in stv0367ddb_setup_cab()
2972 state->activedemod = demod_cab; in stv0367ddb_setup_cab()
2977 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_set_frontend() local
2981 if (state->activedemod != demod_ter) in stv0367ddb_set_frontend()
2982 stv0367ddb_setup_ter(state); in stv0367ddb_set_frontend()
2986 if (state->activedemod != demod_cab) in stv0367ddb_set_frontend()
2987 stv0367ddb_setup_cab(state); in stv0367ddb_set_frontend()
3005 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_read_signal_strength() local
3009 switch (state->activedemod) { in stv0367ddb_read_signal_strength()
3011 signalstrength = stv0367cab_get_rf_lvl(state) * 1000; in stv0367ddb_read_signal_strength()
3024 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_read_snr() local
3029 switch (state->activedemod) { in stv0367ddb_read_snr()
3057 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_read_ucblocks() local
3061 switch (state->activedemod) { in stv0367ddb_read_ucblocks()
3080 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_read_status() local
3084 switch (state->activedemod) { in stv0367ddb_read_status()
3119 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_get_frontend() local
3121 switch (state->activedemod) { in stv0367ddb_get_frontend()
3135 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_sleep() local
3137 switch (state->activedemod) { in stv0367ddb_sleep()
3139 state->activedemod = demod_none; in stv0367ddb_sleep()
3142 state->activedemod = demod_none; in stv0367ddb_sleep()
3151 static int stv0367ddb_init(struct stv0367_state *state) in stv0367ddb_init() argument
3153 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ddb_init()
3154 struct dtv_frontend_properties *p = &state->fe.dtv_property_cache; in stv0367ddb_init()
3156 stv0367_writereg(state, R367TER_TOPCTRL, 0x10); in stv0367ddb_init()
3158 if (stv0367_deftabs[state->deftabs][STV0367_TAB_BASE]) in stv0367ddb_init()
3159 stv0367_write_table(state, in stv0367ddb_init()
3160 stv0367_deftabs[state->deftabs][STV0367_TAB_BASE]); in stv0367ddb_init()
3162 stv0367_write_table(state, in stv0367ddb_init()
3163 stv0367_deftabs[state->deftabs][STV0367_TAB_CAB]); in stv0367ddb_init()
3165 stv0367_writereg(state, R367TER_TOPCTRL, 0x00); in stv0367ddb_init()
3166 stv0367_write_table(state, in stv0367ddb_init()
3167 stv0367_deftabs[state->deftabs][STV0367_TAB_TER]); in stv0367ddb_init()
3169 stv0367_writereg(state, R367TER_GAIN_SRC1, 0x2A); in stv0367ddb_init()
3170 stv0367_writereg(state, R367TER_GAIN_SRC2, 0xD6); in stv0367ddb_init()
3171 stv0367_writereg(state, R367TER_INC_DEROT1, 0x55); in stv0367ddb_init()
3172 stv0367_writereg(state, R367TER_INC_DEROT2, 0x55); in stv0367ddb_init()
3173 stv0367_writereg(state, R367TER_TRL_CTL, 0x14); in stv0367ddb_init()
3174 stv0367_writereg(state, R367TER_TRL_NOMRATE1, 0xAE); in stv0367ddb_init()
3175 stv0367_writereg(state, R367TER_TRL_NOMRATE2, 0x56); in stv0367ddb_init()
3176 stv0367_writereg(state, R367TER_FEPATH_CFG, 0x0); in stv0367ddb_init()
3180 stv0367_writereg(state, R367TER_TSCFGH, 0x70); in stv0367ddb_init()
3181 stv0367_writereg(state, R367TER_TSCFGM, 0xC0); in stv0367ddb_init()
3182 stv0367_writereg(state, R367TER_TSCFGL, 0x20); in stv0367ddb_init()
3183 stv0367_writereg(state, R367TER_TSSPEED, 0x40); /* Fixed at 54 MHz */ in stv0367ddb_init()
3185 stv0367_writereg(state, R367TER_TSCFGH, 0x71); in stv0367ddb_init()
3186 stv0367_writereg(state, R367TER_TSCFGH, 0x70); in stv0367ddb_init()
3188 stv0367_writereg(state, R367TER_TOPCTRL, 0x10); in stv0367ddb_init()
3191 stv0367_writereg(state, R367TER_AGC12C, 0x01); /* AGC Pin setup */ in stv0367ddb_init()
3193 stv0367_writereg(state, R367TER_AGCCTRL1, 0x8A); in stv0367ddb_init()
3198 stv0367_writereg(state, R367CAB_OUTFORMAT_0, 0x85); in stv0367ddb_init()
3201 stv0367_writereg(state, R367TER_ANACTRL, 0x0D); in stv0367ddb_init()
3204 stv0367_pll_setup(state, STV0367_ICSPEED_58000, state->config->xtal); in stv0367ddb_init()
3208 stv0367_writereg(state, R367TER_ANADIGCTRL, 0x8b); in stv0367ddb_init()
3209 stv0367_writereg(state, R367TER_DUAL_AD12, 0x04); /* ADCQ disabled */ in stv0367ddb_init()
3212 stv0367_writereg(state, R367CAB_FSM_SNR2_HTH, 0x23); in stv0367ddb_init()
3214 stv0367_writereg(state, R367CAB_IQ_QAM, 0x01); in stv0367ddb_init()
3216 stv0367_writereg(state, R367CAB_EQU_FFE_LEAKAGE, 0x83); in stv0367ddb_init()
3218 stv0367_writereg(state, R367CAB_IQDEM_ADJ_EN, 0x05); in stv0367ddb_init()
3221 stv0367_writereg(state, R367TER_ANACTRL, 0x00); in stv0367ddb_init()
3223 stv0367_writereg(state, R367TER_I2CRPT, (0x08 | ((5 & 0x07) << 4))); in stv0367ddb_init()
3272 struct stv0367_state *state = NULL; in stv0367ddb_attach() local
3276 /* allocate memory for the internal state */ in stv0367ddb_attach()
3277 state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL); in stv0367ddb_attach()
3278 if (state == NULL) in stv0367ddb_attach()
3287 /* setup the state */ in stv0367ddb_attach()
3288 state->i2c = i2c; in stv0367ddb_attach()
3289 state->config = config; in stv0367ddb_attach()
3290 state->ter_state = ter_state; in stv0367ddb_attach()
3293 state->cab_state = cab_state; in stv0367ddb_attach()
3294 state->fe.ops = stv0367ddb_ops; in stv0367ddb_attach()
3295 state->fe.demodulator_priv = state; in stv0367ddb_attach()
3296 state->chip_id = stv0367_readreg(state, R367TER_ID); in stv0367ddb_attach()
3299 state->use_i2c_gatectrl = 0; in stv0367ddb_attach()
3300 state->deftabs = STV0367_DEFTAB_DDB; in stv0367ddb_attach()
3301 state->reinit_on_setfrontend = 0; in stv0367ddb_attach()
3302 state->auto_if_khz = 1; in stv0367ddb_attach()
3303 state->activedemod = demod_none; in stv0367ddb_attach()
3305 dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id); in stv0367ddb_attach()
3308 if ((state->chip_id != 0x50) && (state->chip_id != 0x60)) in stv0367ddb_attach()
3312 state->fe.ops.info.name, state->chip_id, in stv0367ddb_attach()
3315 stv0367ddb_init(state); in stv0367ddb_attach()
3317 return &state->fe; in stv0367ddb_attach()
3322 kfree(state); in stv0367ddb_attach()