Lines Matching refs:dib7000p_write_word
125 static int dib7000p_write_word(struct dib7000p_state *state, u16 reg, u16 val)
160 dib7000p_write_word(state, r, *n++);
213 ret |= dib7000p_write_word(state, 235, smo_mode);
214 ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */
216 ret |= dib7000p_write_word(state, 1286, outreg); /* P_Div_active */
228 dib7000p_write_word(state, 207, 0);
230 dib7000p_write_word(state, 207, (state->div_sync_wait << 4) | (1 << 2) | (2 << 0));
235 dib7000p_write_word(state, 204, 6);
236 dib7000p_write_word(state, 205, 16);
239 dib7000p_write_word(state, 204, 1);
240 dib7000p_write_word(state, 205, 0);
287 dib7000p_write_word(state, 774, reg_774);
288 dib7000p_write_word(state, 775, reg_775);
289 dib7000p_write_word(state, 776, reg_776);
290 dib7000p_write_word(state, 1280, reg_1280);
292 dib7000p_write_word(state, 899, reg_899);
312 dib7000p_write_word(state, 1925, reg | (1 << 4) | (1 << 2)); /* en_slowAdc = 1 & reset_sladc = 1 */
316 dib7000p_write_word(state, 1925, reg & ~(1 << 4)); /* en_slowAdc = 1 & reset_sladc = 0 */
319 dib7000p_write_word(state, 72, reg | (1 << 14) | (3 << 12) | 524); /* ref = Vin1 => Vbg ; sel = Vin0 or Vin3 ; (Vin2 = Vcm) */
322 dib7000p_write_word(state, 909, reg_909);
330 dib7000p_write_word(state, 1925, (reg & ~(1 << 2)) | (1 << 4)); /* reset_sladc = 1 en_slowAdc = 0 */
363 dib7000p_write_word(state, 908, reg_908);
364 dib7000p_write_word(state, 909, reg_909);
385 dib7000p_write_word(state, 23, (u16) ((timf >> 16) & 0xffff));
386 dib7000p_write_word(state, 24, (u16) ((timf) & 0xffff));
394 dib7000p_write_word(state, 73, (0 << 1) | (0 << 0));
397 dib7000p_write_word(state, 74, 2048);
399 dib7000p_write_word(state, 74, 776);
402 dib7000p_write_word(state, 73, (1 << 0));
403 dib7000p_write_word(state, 73, (0 << 0));
416 return dib7000p_write_word(state, 105, (dib7000p_read_word(state, 105) & 0xf000) | value);
439 return dib7000p_write_word(state, 108, v);
448 dib7000p_write_word(state, 1856, (!bw->pll_reset << 13) | (bw->pll_range << 12) | (bw->pll_ratio << 6) | (bw->pll_prediv));
453 dib7000p_write_word(state, 1857, dib7000p_read_word(state, 1857) | (!bw->pll_bypass << 15));
459 dib7000p_write_word(state, 900, clk_cfg0);
462 dib7000p_write_word(state, 903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_reset);
464 dib7000p_write_word(state, 900, clk_cfg0);
467 dib7000p_write_word(state, 18, (u16) (((bw->internal * 1000) >> 16) & 0xffff));
468 dib7000p_write_word(state, 19, (u16) ((bw->internal * 1000) & 0xffff));
469 dib7000p_write_word(state, 21, (u16) ((bw->ifreq >> 16) & 0xffff));
470 dib7000p_write_word(state, 22, (u16) ((bw->ifreq) & 0xffff));
472 dib7000p_write_word(state, 72, bw->sad_cfg);
499 dib7000p_write_word(state, 1857, reg_1857 & ~(1 << 15));
501 dib7000p_write_word(state, 1856, reg_1856 | ((bw->pll_ratio & 0x3f) << 6) | (bw->pll_prediv & 0x3f));
507 dib7000p_write_word(state, 18, (u16) ((internal >> 16) & 0xffff));
508 dib7000p_write_word(state, 19, (u16) (internal & 0xffff));
510 dib7000p_write_word(state, 1857, reg_1857 | (1 << 15));
525 dib7000p_write_word(st, 1029, st->gpio_dir);
526 dib7000p_write_word(st, 1030, st->gpio_val);
530 dib7000p_write_word(st, 1032, st->cfg.gpio_pwm_pos);
532 dib7000p_write_word(st, 1037, st->cfg.pwm_freq_div);
541 dib7000p_write_word(st, 1029, st->gpio_dir);
546 dib7000p_write_word(st, 1030, st->gpio_val);
652 dib7000p_write_word(state, 770, 0xffff);
653 dib7000p_write_word(state, 771, 0xffff);
654 dib7000p_write_word(state, 772, 0x001f);
655 dib7000p_write_word(state, 1280, 0x001f - ((1 << 4) | (1 << 3)));
657 dib7000p_write_word(state, 770, 0);
658 dib7000p_write_word(state, 771, 0);
659 dib7000p_write_word(state, 772, 0);
660 dib7000p_write_word(state, 1280, 0);
663 dib7000p_write_word(state, 898, 0x0003);
664 dib7000p_write_word(state, 898, 0);
674 dib7000p_write_word(state, 899, 0);
677 dib7000p_write_word(state, 42, (1<<5) | 3); /* P_iqc_thsat_ipc = 1 ; P_iqc_win2 = 3 */
678 dib7000p_write_word(state, 43, 0x2d4); /*-300 fag P_iqc_dect_min = -280 */
679 dib7000p_write_word(state, 44, 300); /* 300 fag P_iqc_dect_min = +280 */
680 dib7000p_write_word(state, 273, (0<<6) | 30);
690 dib7000p_write_word(state, 1285, dib7000p_read_word(state, 1285) & ~(1 << 1));
695 dib7000p_write_word(state, 36, 0x0755);/* P_iqc_impnc_on =1 & P_iqc_corr_inh = 1 for impulsive noise */
698 dib7000p_write_word(state, 36, 0x0755);
700 dib7000p_write_word(state, 36, 0x1f55);
705 dib7000p_write_word(state, 901, 0x0006);
706 dib7000p_write_word(state, 902, (3 << 10) | (1 << 6));
707 dib7000p_write_word(state, 905, 0x2c8e);
719 dib7000p_write_word(state, 903, (tmp | 0x1));
721 dib7000p_write_word(state, 900, (tmp & 0x7fff) | (1 << 6));
727 dib7000p_write_word(state, 770, (1 << 11) | (1 << 9));
728 dib7000p_write_word(state, 770, 0x0000);
768 dib7000p_write_word(state, 75, agc->setup);
769 dib7000p_write_word(state, 76, agc->inv_gain);
770 dib7000p_write_word(state, 77, agc->time_stabiliz);
771 dib7000p_write_word(state, 100, (agc->alpha_level << 12) | agc->thlock);
774 dib7000p_write_word(state, 101, (agc->alpha_mant << 5) | agc->alpha_exp);
775 dib7000p_write_word(state, 102, (agc->beta_mant << 6) | agc->beta_exp);
782 dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | state->wbd_ref);
784 dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | agc->wbd_ref);
786 dib7000p_write_word(state, 106, (agc->wbd_sel << 13) | (agc->wbd_alpha << 9) | (agc->perform_agc_softsplit << 8));
788 dib7000p_write_word(state, 107, agc->agc1_max);
789 dib7000p_write_word(state, 108, agc->agc1_min);
790 dib7000p_write_word(state, 109, agc->agc2_max);
791 dib7000p_write_word(state, 110, agc->agc2_min);
792 dib7000p_write_word(state, 111, (agc->agc1_pt1 << 8) | agc->agc1_pt2);
793 dib7000p_write_word(state, 112, agc->agc1_pt3);
794 dib7000p_write_word(state, 113, (agc->agc1_slope1 << 8) | agc->agc1_slope2);
795 dib7000p_write_word(state, 114, (agc->agc2_pt1 << 8) | agc->agc2_pt2);
796 dib7000p_write_word(state, 115, (agc->agc2_slope1 << 8) | agc->agc2_slope2);
826 dib7000p_write_word(state, 21, (u16) (((dds >> 16) & 0x1ff) | (0 << 10) | (invert << 9)));
827 dib7000p_write_word(state, 22, (u16) (dds & 0xffff));
848 dib7000p_write_word(state, 0x79a, upd_demod_gain_period & 0xFFFF); /* lsb */
849 dib7000p_write_word(state, 0x79b, reg | (1 << 14) | ((upd_demod_gain_period >> 16) & 0xFF));
853 dib7000p_write_word(state, 0x780, (reg | (0x3)) & (~(1 << 7)));
880 dib7000p_write_word(state, 78, 32768);
884 dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alpha << 9) | (1 << 8));
898 dib7000p_write_word(state, 75, state->current_agc->setup | (1 << 4)); /* freeze AGC loop */
899 dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (2 << 9) | (0 << 8)); /* fast split search 0.25kHz */
906 dib7000p_write_word(state, 78, dib7000p_read_word(state, 394)); /* set AGC gain start value */
908 dib7000p_write_word(state, 75, state->current_agc->setup); /* std AGC loop */
909 dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alpha << 9) | agc_split); /* standard split search */
943 dib7000p_write_word(state, 23, (u16) (timf >> 16));
944 dib7000p_write_word(state, 24, (u16) (timf & 0xffff));
1026 dib7000p_write_word(state, 0, value);
1027 dib7000p_write_word(state, 5, (seq << 4) | 1); /* do not force tps, search list 0 */
1055 dib7000p_write_word(state, 208, value);
1058 dib7000p_write_word(state, 26, 0x6680);
1059 dib7000p_write_word(state, 32, 0x0003);
1060 dib7000p_write_word(state, 29, 0x1273);
1061 dib7000p_write_word(state, 33, 0x0005);
1122 dib7000p_write_word(state, 187 + value, est[value]);
1153 dib7000p_write_word(state, 6, (u16) ((value >> 16) & 0xffff));
1154 dib7000p_write_word(state, 7, (u16) (value & 0xffff));
1156 dib7000p_write_word(state, 8, (u16) ((value >> 16) & 0xffff));
1157 dib7000p_write_word(state, 9, (u16) (value & 0xffff));
1159 dib7000p_write_word(state, 10, (u16) ((value >> 16) & 0xffff));
1160 dib7000p_write_word(state, 11, (u16) (value & 0xffff));
1163 dib7000p_write_word(state, 0, (u16) ((1 << 9) | value));
1165 dib7000p_write_word(state, 0, (u16) value);
1220 dib7000p_write_word(state, 142, 0x0610);
1265 dib7000p_write_word(state, 143, (0 << 14) | (k << 10) | (coef_re[k] & 0x3ff));
1266 dib7000p_write_word(state, 144, coef_im[k] & 0x3ff);
1267 dib7000p_write_word(state, 143, (1 << 14) | (k << 10) | (coef_re[k] & 0x3ff));
1269 dib7000p_write_word(state, 143, 0);
1284 dib7000p_write_word(state, 770, 0x4000);
1285 dib7000p_write_word(state, 770, 0x0000);
1293 dib7000p_write_word(state, 166, 0x4000);
1295 dib7000p_write_word(state, 166, 0x0000);
1297 dib7000p_write_word(state, 29, tmp);
1319 dib7000p_write_word(state, 26, tmp); /* timf_a(6xxx) */
1335 dib7000p_write_word(state, 32, tmp);
1351 dib7000p_write_word(state, 33, tmp);
1357 dib7000p_write_word(state, 771, tmp | (1 << 1));
1358 dib7000p_write_word(state, 771, tmp);
1367 dib7000p_write_word(state, 26, (tmp & ~(0xf << 12)) | ((((tmp >> 12) & 0xf) + 5) << 12));
2068 return dib7000p_write_word(state, 235, val);
2075 return dib7000p_write_word(state, 241 + id, onoff ? (1 << 13) | pid : 0);
2100 dib7000p_write_word(dpst, 1287, 0x0003); /* sram lead in, rdy */
2103 dib7000p_write_word(dpst, 1287, 0x0003); /* sram lead in, rdy */
2115 dib7000p_write_word(dpst, 1285, (new_addr << 2) | 0x2);
2128 dib7000p_write_word(dpst, 1285, dpst->i2c_addr << 2);
2204 dib7000p_write_word(state, 1985, (1 << 6) | (serpar_num & 0x3f));
2205 dib7000p_write_word(state, 1986, (msg[0].buf[1] << 8) | msg[0].buf[2]);
2224 dib7000p_write_word(state, 1985, (0 << 6) | (serpar_num & 0x3f));
2259 dib7000p_write_word(state, apb_address, ((msg[0].buf[1] << 8) | (msg[0].buf[2])));
2371 dib7000p_write_word(state, 72, word); /* Set the proper input */
2407 dib7000p_write_word(state, 1798, reg);
2412 dib7000p_write_word(state, 1799, reg);
2417 dib7000p_write_word(state, 1800, reg);
2422 dib7000p_write_word(state, 1801, reg);
2427 dib7000p_write_word(state, 1802, reg);
2454 dib7000p_write_word(state, 1615, 1);
2455 dib7000p_write_word(state, 1603, P_Kin);
2456 dib7000p_write_word(state, 1605, P_Kout);
2457 dib7000p_write_word(state, 1606, insertExtSynchro);
2458 dib7000p_write_word(state, 1608, synchroMode);
2459 dib7000p_write_word(state, 1609, (syncWord >> 16) & 0xffff);
2460 dib7000p_write_word(state, 1610, syncWord & 0xffff);
2461 dib7000p_write_word(state, 1612, syncSize);
2462 dib7000p_write_word(state, 1615, 0);
2475 dib7000p_write_word(state, 1542, syncFreq);
2477 dib7000p_write_word(state, 1554, 1);
2478 dib7000p_write_word(state, 1536, P_Kin);
2479 dib7000p_write_word(state, 1537, P_Kout);
2480 dib7000p_write_word(state, 1539, synchroMode);
2481 dib7000p_write_word(state, 1540, (syncWord >> 16) & 0xffff);
2482 dib7000p_write_word(state, 1541, syncWord & 0xffff);
2483 dib7000p_write_word(state, 1543, syncSize);
2484 dib7000p_write_word(state, 1544, dataOutRate);
2485 dib7000p_write_word(state, 1554, 0);
2503 dib7000p_write_word(state, 1287, reg_1287);
2517 dib7000p_write_word(state, 1287, ((pulseWidth & 0x1f) << 2)
2547 dib7000p_write_word(state, 1288, reg_1288);
2572 dib7000p_write_word(state, 1288, reg_1288);
2592 dib7000p_write_word(state, 1287, reg_1287);
2683 ret |= dib7000p_write_word(state, 235, smo_mode);
2684 ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */
2685 ret |= dib7000p_write_word(state, 1286, outreg);
2709 dib7000p_write_word(state, 1922, en_cur_state);
2725 dib7000p_write_word(state, 1794, reg | (4 << 12));
2727 dib7000p_write_word(state, 1032, 0xffff);
2757 dib7000p_write_word(st, 1287, 0x0003); /* sram lead in, rdy */