Lines Matching +full:stm32mp1 +full:- +full:ipcc

1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
54 spinlock_t lock; /* protect access to IPCC registers */
84 struct stm32_ipcc *ipcc = data; in stm32_ipcc_rx_irq() local
85 struct device *dev = ipcc->controller.dev; in stm32_ipcc_rx_irq()
91 proc_offset = ipcc->proc_id ? -IPCC_PROC_OFFST : IPCC_PROC_OFFST; in stm32_ipcc_rx_irq()
92 tosr = readl_relaxed(ipcc->reg_proc + proc_offset + IPCC_XTOYSR); in stm32_ipcc_rx_irq()
93 mr = readl_relaxed(ipcc->reg_proc + IPCC_XMR); in stm32_ipcc_rx_irq()
98 for (chan = 0; chan < ipcc->n_chans; chan++) { in stm32_ipcc_rx_irq()
104 mbox_chan_received_data(&ipcc->controller.chans[chan], NULL); in stm32_ipcc_rx_irq()
106 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XSCR, in stm32_ipcc_rx_irq()
117 struct stm32_ipcc *ipcc = data; in stm32_ipcc_tx_irq() local
118 struct device *dev = ipcc->controller.dev; in stm32_ipcc_tx_irq()
122 tosr = readl_relaxed(ipcc->reg_proc + IPCC_XTOYSR); in stm32_ipcc_tx_irq()
123 mr = readl_relaxed(ipcc->reg_proc + IPCC_XMR); in stm32_ipcc_tx_irq()
128 for (chan = 0; chan < ipcc->n_chans ; chan++) { in stm32_ipcc_tx_irq()
135 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR, in stm32_ipcc_tx_irq()
138 mbox_chan_txdone(&ipcc->controller.chans[chan], 0); in stm32_ipcc_tx_irq()
148 unsigned long chan = (unsigned long)link->con_priv; in stm32_ipcc_send_data()
149 struct stm32_ipcc *ipcc = container_of(link->mbox, struct stm32_ipcc, in stm32_ipcc_send_data() local
152 dev_dbg(ipcc->controller.dev, "%s: chan:%lu\n", __func__, chan); in stm32_ipcc_send_data()
155 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XSCR, in stm32_ipcc_send_data()
159 stm32_ipcc_clr_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR, in stm32_ipcc_send_data()
167 unsigned long chan = (unsigned long)link->con_priv; in stm32_ipcc_startup()
168 struct stm32_ipcc *ipcc = container_of(link->mbox, struct stm32_ipcc, in stm32_ipcc_startup() local
172 ret = clk_prepare_enable(ipcc->clk); in stm32_ipcc_startup()
174 dev_err(ipcc->controller.dev, "can not enable the clock\n"); in stm32_ipcc_startup()
179 stm32_ipcc_clr_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR, in stm32_ipcc_startup()
187 unsigned long chan = (unsigned long)link->con_priv; in stm32_ipcc_shutdown()
188 struct stm32_ipcc *ipcc = container_of(link->mbox, struct stm32_ipcc, in stm32_ipcc_shutdown() local
192 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR, in stm32_ipcc_shutdown()
195 clk_disable_unprepare(ipcc->clk); in stm32_ipcc_shutdown()
206 struct device *dev = &pdev->dev; in stm32_ipcc_probe()
207 struct device_node *np = dev->of_node; in stm32_ipcc_probe()
208 struct stm32_ipcc *ipcc; in stm32_ipcc_probe() local
217 return -ENODEV; in stm32_ipcc_probe()
220 ipcc = devm_kzalloc(dev, sizeof(*ipcc), GFP_KERNEL); in stm32_ipcc_probe()
221 if (!ipcc) in stm32_ipcc_probe()
222 return -ENOMEM; in stm32_ipcc_probe()
224 spin_lock_init(&ipcc->lock); in stm32_ipcc_probe()
227 if (of_property_read_u32(np, "st,proc-id", &ipcc->proc_id)) { in stm32_ipcc_probe()
228 dev_err(dev, "Missing st,proc-id\n"); in stm32_ipcc_probe()
229 return -ENODEV; in stm32_ipcc_probe()
232 if (ipcc->proc_id >= STM32_MAX_PROCS) { in stm32_ipcc_probe()
233 dev_err(dev, "Invalid proc_id (%d)\n", ipcc->proc_id); in stm32_ipcc_probe()
234 return -EINVAL; in stm32_ipcc_probe()
238 ipcc->reg_base = devm_platform_ioremap_resource(pdev, 0); in stm32_ipcc_probe()
239 if (IS_ERR(ipcc->reg_base)) in stm32_ipcc_probe()
240 return PTR_ERR(ipcc->reg_base); in stm32_ipcc_probe()
242 ipcc->reg_proc = ipcc->reg_base + ipcc->proc_id * IPCC_PROC_OFFST; in stm32_ipcc_probe()
245 ipcc->clk = devm_clk_get(dev, NULL); in stm32_ipcc_probe()
246 if (IS_ERR(ipcc->clk)) in stm32_ipcc_probe()
247 return PTR_ERR(ipcc->clk); in stm32_ipcc_probe()
249 ret = clk_prepare_enable(ipcc->clk); in stm32_ipcc_probe()
257 ipcc->irqs[i] = platform_get_irq_byname(pdev, irq_name[i]); in stm32_ipcc_probe()
258 if (ipcc->irqs[i] < 0) { in stm32_ipcc_probe()
259 ret = ipcc->irqs[i]; in stm32_ipcc_probe()
263 ret = devm_request_threaded_irq(dev, ipcc->irqs[i], NULL, in stm32_ipcc_probe()
265 dev_name(dev), ipcc); in stm32_ipcc_probe()
273 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR, in stm32_ipcc_probe()
275 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XCR, in stm32_ipcc_probe()
279 if (of_property_read_bool(np, "wakeup-source")) { in stm32_ipcc_probe()
282 ret = dev_pm_set_wake_irq(dev, ipcc->irqs[IPCC_IRQ_RX]); in stm32_ipcc_probe()
290 ipcc->n_chans = readl_relaxed(ipcc->reg_base + IPCC_HWCFGR); in stm32_ipcc_probe()
291 ipcc->n_chans &= IPCFGR_CHAN_MASK; in stm32_ipcc_probe()
293 ipcc->controller.dev = dev; in stm32_ipcc_probe()
294 ipcc->controller.txdone_irq = true; in stm32_ipcc_probe()
295 ipcc->controller.ops = &stm32_ipcc_ops; in stm32_ipcc_probe()
296 ipcc->controller.num_chans = ipcc->n_chans; in stm32_ipcc_probe()
297 ipcc->controller.chans = devm_kcalloc(dev, ipcc->controller.num_chans, in stm32_ipcc_probe()
298 sizeof(*ipcc->controller.chans), in stm32_ipcc_probe()
300 if (!ipcc->controller.chans) { in stm32_ipcc_probe()
301 ret = -ENOMEM; in stm32_ipcc_probe()
305 for (i = 0; i < ipcc->controller.num_chans; i++) in stm32_ipcc_probe()
306 ipcc->controller.chans[i].con_priv = (void *)i; in stm32_ipcc_probe()
308 ret = devm_mbox_controller_register(dev, &ipcc->controller); in stm32_ipcc_probe()
312 platform_set_drvdata(pdev, ipcc); in stm32_ipcc_probe()
314 ip_ver = readl_relaxed(ipcc->reg_base + IPCC_VER); in stm32_ipcc_probe()
316 dev_info(dev, "ipcc rev:%ld.%ld enabled, %d chans, proc %d\n", in stm32_ipcc_probe()
319 ipcc->controller.num_chans, ipcc->proc_id); in stm32_ipcc_probe()
321 clk_disable_unprepare(ipcc->clk); in stm32_ipcc_probe()
325 if (of_property_read_bool(np, "wakeup-source")) in stm32_ipcc_probe()
330 clk_disable_unprepare(ipcc->clk); in stm32_ipcc_probe()
336 struct device *dev = &pdev->dev; in stm32_ipcc_remove()
338 if (of_property_read_bool(dev->of_node, "wakeup-source")) in stm32_ipcc_remove()
339 dev_pm_clear_wake_irq(&pdev->dev); in stm32_ipcc_remove()
347 struct stm32_ipcc *ipcc = dev_get_drvdata(dev); in stm32_ipcc_suspend() local
349 ipcc->xmr = readl_relaxed(ipcc->reg_proc + IPCC_XMR); in stm32_ipcc_suspend()
350 ipcc->xcr = readl_relaxed(ipcc->reg_proc + IPCC_XCR); in stm32_ipcc_suspend()
357 struct stm32_ipcc *ipcc = dev_get_drvdata(dev); in stm32_ipcc_resume() local
359 writel_relaxed(ipcc->xmr, ipcc->reg_proc + IPCC_XMR); in stm32_ipcc_resume()
360 writel_relaxed(ipcc->xcr, ipcc->reg_proc + IPCC_XCR); in stm32_ipcc_resume()
370 { .compatible = "st,stm32mp1-ipcc" },
377 .name = "stm32-ipcc",
389 MODULE_DESCRIPTION("STM32 IPCC driver");