97 	/* Convert DMA addr (PA or IOVA) to GCE readable addr */  in cmdq_convert_gce_addr()
103 	/* Revert GCE readable addr to DMA addr (PA or IOVA) */  in cmdq_revert_gce_addr()
140 		dev_err(cmdq->mbox.dev, "suspend GCE thread 0x%x failed\n",  in cmdq_thread_suspend()
175 		dev_err(cmdq->mbox.dev, "reset GCE thread 0x%x failed\n",  in cmdq_thread_reset()
189 /* notify GCE to re-fetch commands by setting GCE thread PC */
261 	 * reset / disable this GCE thread, so we need to check the enable  in cmdq_thread_irq_handler()
262 	 * bit of this GCE thread.  in cmdq_thread_irq_handler()
544 		dev_err(cmdq->mbox.dev, "Fail to wait GCE thread 0x%x done\n",  in cmdq_mbox_flush()
579 	static const char * const gce_name = "gce";  in cmdq_get_clocks()
595 					     "failed to get gce clock\n");  in cmdq_get_clocks()
601 	 * If there is more than one GCE, get the clocks for the others too,  in cmdq_get_clocks()
602 	 * as the clock of the main GCE must be enabled for additional IPs  in cmdq_get_clocks()
613 		clks->id = devm_kasprintf(dev, GFP_KERNEL, "gce%d", alias_id);  in cmdq_get_clocks()
623 					     "failed to get gce%d clock\n", alias_id);  in cmdq_get_clocks()
786 	{.compatible = "mediatek,mt6779-gce", .data = (void *)&gce_plat_mt6779},
787 	{.compatible = "mediatek,mt8173-gce", .data = (void *)&gce_plat_mt8173},
788 	{.compatible = "mediatek,mt8183-gce", .data = (void *)&gce_plat_mt8183},
789 	{.compatible = "mediatek,mt8186-gce", .data = (void *)&gce_plat_mt8186},
790 	{.compatible = "mediatek,mt8188-gce", .data = (void *)&gce_plat_mt8188},
791 	{.compatible = "mediatek,mt8192-gce", .data = (void *)&gce_plat_mt8192},
792 	{.compatible = "mediatek,mt8195-gce", .data = (void *)&gce_plat_mt8195},