Lines Matching +full:mbox +full:-
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2020-2022 Microchip Corporation. All rights reserved.
46 #define SCB_CTRL_MASK GENMASK(SCB_CTRL_POS + SCB_MASK_WIDTH - 1, SCB_CTRL_POS)
63 #define SCB_STATUS_MASK GENMASK(SCB_STATUS_POS + SCB_MASK_WIDTH - 1, SCB_STATUS_POS)
78 static bool mpfs_mbox_busy(struct mpfs_mbox *mbox)
82 if (mbox->control_scb)
83 regmap_read(mbox->control_scb, SERVICES_SR_OFFSET, &status);
85 status = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
92 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
93 struct mpfs_mss_response *response = mbox->response;
96 if (mpfs_mbox_busy(mbox))
105 if (mbox->control_scb)
106 regmap_read(mbox->control_scb, SERVICES_SR_OFFSET, &val);
108 val = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
110 response->resp_status = (val & SCB_STATUS_MASK) >> SCB_STATUS_POS;
117 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
123 mbox->response = msg->response;
124 mbox->resp_offset = msg->resp_offset;
126 if (mpfs_mbox_busy(mbox))
127 return -EBUSY;
129 if (msg->cmd_data_size) {
131 u8 extra_bits = msg->cmd_data_size & 3;
132 u32 *word_buf = (u32 *)msg->cmd_data;
134 for (index = 0; index < (msg->cmd_data_size / 4); index++)
136 mbox->mbox_base + msg->mbox_offset + index * 0x4);
139 u8 byte_off = ALIGN_DOWN(msg->cmd_data_size, 4);
140 u8 *byte_buf = msg->cmd_data + byte_off;
142 val = readl_relaxed(mbox->mbox_base + msg->mbox_offset + index * 0x4);
149 writel_relaxed(val, mbox->mbox_base + msg->mbox_offset + index * 0x4);
153 opt_sel = ((msg->mbox_offset << 7u) | (msg->cmd_opcode & 0x7fu));
158 if (mbox->control_scb)
159 regmap_write(mbox->control_scb, SERVICES_CR_OFFSET, tx_trigger);
161 writel_relaxed(tx_trigger, mbox->ctrl_base + SERVICES_CR_OFFSET);
169 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
170 struct mpfs_mss_response *response = mbox->response;
171 u16 num_words = ALIGN((response->resp_size), (4)) / 4U;
174 if (!response->resp_msg) {
175 dev_err(mbox->dev, "failed to assign memory for response %d\n", -ENOMEM);
184 if (mpfs_mbox_busy(mbox)) {
185 dev_err(mbox->dev, "got an interrupt but system controller is busy\n");
186 response->resp_status = 0xDEAD;
191 response->resp_msg[i] =
192 readl_relaxed(mbox->mbox_base
193 + mbox->resp_offset + i * 0x4);
202 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
204 if (mbox->control_scb)
205 regmap_write(mbox->sysreg_scb, MESSAGE_INT_OFFSET, 0);
207 writel_relaxed(0, mbox->int_reg);
216 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
219 if (!mbox)
220 return -EINVAL;
222 ret = devm_request_irq(mbox->dev, mbox->irq, mpfs_mbox_inbox_isr, 0, "mpfs-mailbox", chan);
224 dev_err(mbox->dev, "failed to register mailbox interrupt:%d\n", ret);
231 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
233 devm_free_irq(mbox->dev, mbox->irq, chan);
243 static inline int mpfs_mbox_syscon_probe(struct mpfs_mbox *mbox, struct platform_device *pdev)
245 mbox->control_scb = syscon_regmap_lookup_by_compatible("microchip,mpfs-control-scb");
246 if (IS_ERR(mbox->control_scb))
247 return PTR_ERR(mbox->control_scb);
249 mbox->sysreg_scb = syscon_regmap_lookup_by_compatible("microchip,mpfs-sysreg-scb");
250 if (IS_ERR(mbox->sysreg_scb))
251 return PTR_ERR(mbox->sysreg_scb);
253 mbox->mbox_base = devm_platform_ioremap_resource(pdev, 0);
254 if (IS_ERR(mbox->mbox_base))
255 return PTR_ERR(mbox->mbox_base);
260 static inline int mpfs_mbox_old_format_probe(struct mpfs_mbox *mbox, struct platform_device *pdev)
262 dev_warn(&pdev->dev, "falling back to old devicetree format");
264 mbox->ctrl_base = devm_platform_ioremap_resource(pdev, 0);
265 if (IS_ERR(mbox->ctrl_base))
266 return PTR_ERR(mbox->ctrl_base);
268 mbox->int_reg = devm_platform_ioremap_resource(pdev, 1);
269 if (IS_ERR(mbox->int_reg))
270 return PTR_ERR(mbox->int_reg);
272 mbox->mbox_base = devm_platform_ioremap_resource(pdev, 2);
273 if (IS_ERR(mbox->mbox_base)) // account for the old dt-binding w/ 2 regs
274 mbox->mbox_base = mbox->ctrl_base + MAILBOX_REG_OFFSET;
281 struct mpfs_mbox *mbox;
284 mbox = devm_kzalloc(&pdev->dev, sizeof(*mbox), GFP_KERNEL);
285 if (!mbox)
286 return -ENOMEM;
288 ret = mpfs_mbox_syscon_probe(mbox, pdev);
294 mbox->control_scb = NULL;
295 ret = mpfs_mbox_old_format_probe(mbox, pdev);
299 mbox->irq = platform_get_irq(pdev, 0);
300 if (mbox->irq < 0)
301 return mbox->irq;
303 mbox->dev = &pdev->dev;
305 mbox->chans[0].con_priv = mbox;
306 mbox->controller.dev = mbox->dev;
307 mbox->controller.num_chans = 1;
308 mbox->controller.chans = mbox->chans;
309 mbox->controller.ops = &mpfs_mbox_ops;
310 mbox->controller.txdone_poll = true;
311 mbox->controller.txpoll_period = 10u;
313 ret = devm_mbox_controller_register(&pdev->dev, &mbox->controller);
315 dev_err(&pdev->dev, "Registering MPFS mailbox controller failed\n");
318 dev_info(&pdev->dev, "Registered MPFS mailbox controller driver\n");
324 {.compatible = "microchip,mpfs-mailbox", },
331 .name = "mpfs-mailbox",