Lines Matching +full:mbox +full:- +full:tx
1 // SPDX-License-Identifier: GPL-2.0
10 * protocol modes: data-transfer and doorbell, to be used on those channel
19 * hardware - mainly the number of channel windows implemented by the platform,
45 #define LSB_MASK(n) ((1 << (n * __CHAR_BIT__)) - 1)
46 #define MHUV2_PROTOCOL_PROP "arm,mhuv2-protocols"
94 u8 pad1[0x0C - 0x04];
99 u8 pad2[0x20 - 0x1C];
114 u8 pad[0xFC8 - 0xFB0];
124 u8 reserved0[0x10 - 0x0C];
128 u8 pad[0x20 - 0x1C];
135 u8 reserved0[0xF90 - 0xF84];
141 u8 reserved2[0xFC8 - 0xFB0];
160 * struct mhuv2 - MHUv2 mailbox controller data
162 * @mbox: Mailbox controller belonging to the MHU frame.
171 * @doorbell_pending_lock: spinlock required for correct operation of Tx
175 struct mbox_controller mbox;
190 #define mhu_from_mbox(_mbox) container_of(_mbox, struct mhuv2, mbox)
193 * struct mhuv2_protocol_ops - MHUv2 operations
203 * @last_tx_done: Report back if the last tx is completed or not.
263 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
265 writel_relaxed(BIT(priv->doorbell),
266 &mhu->recv->ch_wn[priv->ch_wn_idx].mask_clear);
273 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
275 writel_relaxed(BIT(priv->doorbell),
276 &mhu->recv->ch_wn[priv->ch_wn_idx].mask_set);
281 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
283 writel_relaxed(BIT(priv->doorbell),
284 &mhu->recv->ch_wn[priv->ch_wn_idx].stat_clear);
291 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
293 return !(readl_relaxed(&mhu->send->ch_wn[priv->ch_wn_idx].stat) &
294 BIT(priv->doorbell));
300 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
303 spin_lock_irqsave(&mhu->doorbell_pending_lock, flags);
305 priv->pending = 1;
306 writel_relaxed(BIT(priv->doorbell),
307 &mhu->send->ch_wn[priv->ch_wn_idx].stat_set);
309 spin_unlock_irqrestore(&mhu->doorbell_pending_lock, flags);
321 #define IS_PROTOCOL_DOORBELL(_priv) (_priv->ops == &mhuv2_doorbell_ops)
328 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
329 int i = priv->ch_wn_idx + priv->windows - 1;
335 writel_relaxed(0xFFFFFFFF, &mhu->recv->ch_wn[i].mask_clear);
342 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
343 int i = priv->ch_wn_idx + priv->windows - 1;
345 writel_relaxed(0xFFFFFFFF, &mhu->recv->ch_wn[i].mask_set);
351 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
352 const int windows = priv->windows;
359 return ERR_PTR(-ENOMEM);
361 data = msg->data = msg + 1;
362 msg->len = windows * MHUV2_STAT_BYTES;
374 * data-transfer protocol, the interrupt is de-asserted.
377 idx = priv->ch_wn_idx + i;
378 data[windows - 1 - i] = readl_relaxed(&mhu->recv->ch_wn[idx].stat);
379 writel_relaxed(0xFFFFFFFF, &mhu->recv->ch_wn[idx].stat_clear);
388 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
389 int i = priv->ch_wn_idx + priv->windows - 1;
392 if (mhu->minor) {
393 writel_relaxed(0x1, &mhu->send->ch_wn[i].int_clr);
394 writel_relaxed(0x1, &mhu->send->ch_wn[i].int_en);
401 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
402 int i = priv->ch_wn_idx + priv->windows - 1;
404 if (mhu->minor)
405 writel_relaxed(0x0, &mhu->send->ch_wn[i].int_en);
411 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
412 int i = priv->ch_wn_idx + priv->windows - 1;
415 return !readl_relaxed(&mhu->send->ch_wn[i].stat);
422 * written. As an example, a 6-word message is to be written on a 4-channel MHU
431 * [ stat 3 ] <- [0x00000001] 4 <- triggers interrupt on receiver
432 * [ stat 2 ] <- [0x00000002] 3
433 * [ stat 1 ] <- [0x00000003] 2
434 * [ stat 0 ] <- [0x00000004] 1
440 * [ stat 3 ] <- [0x00000005] 2 <- triggers interrupt on receiver
441 * [ stat 2 ] <- [0x00000006] 1
442 * [ stat 1 ] <- [0x00000000]
443 * [ stat 0 ] <- [0x00000000]
449 int bytes_left = msg->len, bytes_to_send, bytes_in_round, i;
450 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
451 int windows = priv->windows;
452 u32 *data = msg->data, word;
456 dev_err(mhu->mbox.dev, "Data aligned at first window can't be zero to guarantee interrupt generation at receiver");
457 return -EINVAL;
465 for (i = windows - 1; i >= 0; i--) {
471 bytes_to_send = bytes_in_round & (MHUV2_STAT_BYTES - 1);
477 writel_relaxed(word, &mhu->send->ch_wn[priv->ch_wn_idx + windows - 1 - i].stat_set);
478 bytes_left -= bytes_to_send;
479 bytes_in_round -= bytes_to_send;
502 struct mbox_chan *chans = mhu->mbox.chans;
513 for (j = 0; j < mhu->length; j += 2) {
514 protocol = mhu->protocols[j];
515 windows = mhu->protocols[j + 1];
529 channel += MHUV2_STAT_BITS * (ch_wn - offset);
535 return ERR_PTR(-EIO);
541 struct device *dev = mhu->mbox.dev;
548 chan = get_irq_chan_comb(mhu, mhu->send->chcomb_int_st);
550 dev_warn(dev, "Failed to find channel for the Tx interrupt\n");
553 priv = chan->con_priv;
556 for (i = 0; i < priv->windows; i++)
557 writel_relaxed(1, &mhu->send->ch_wn[priv->ch_wn_idx + i].int_clr);
559 if (chan->cl) {
564 dev_warn(dev, "Tx interrupt Received on channel (%u) not currently attached to a mailbox client\n",
565 priv->ch_wn_idx);
570 writel_relaxed(1, &mhu->send->ch_wn[priv->ch_wn_idx].int_clr);
574 * interrupt handler is trying to find the finished doorbell tx
578 spin_lock_irqsave(&mhu->doorbell_pending_lock, flags);
584 stat = readl_relaxed(&mhu->send->ch_wn[priv->ch_wn_idx].stat);
590 if (priv->pending ^ ((stat >> i) & 0x1)) {
591 BUG_ON(!priv->pending);
593 if (!chan->cl) {
594 dev_warn(dev, "Tx interrupt received on doorbell (%u : %u) channel not currently attached to a mailbox client\n",
595 priv->ch_wn_idx, i);
600 priv->pending = 0;
605 spin_unlock_irqrestore(&mhu->doorbell_pending_lock, flags);
613 dev_dbg(dev, "Couldn't find the doorbell (%u) for the Tx interrupt interrupt\n",
614 priv->ch_wn_idx);
627 chan = get_irq_chan_comb(mhu, mhu->recv->chcomb_int_st);
631 priv = chan->con_priv;
639 stat = readl_relaxed(&mhu->recv->ch_wn[priv->ch_wn_idx].stat_masked);
647 struct mbox_chan *chans = mhu->mbox.chans;
652 while (i < mhu->mbox.num_chans) {
654 stat = readl_relaxed(&mhu->recv->ch_wn[priv->ch_wn_idx].stat_masked);
665 return ERR_PTR(-EIO);
670 if (!mhu->minor)
680 struct device *dev = mhu->mbox.dev;
689 priv = chan->con_priv;
692 data = priv->ops->read_data(mhu, chan);
694 if (!chan->cl) {
696 priv->ch_wn_idx);
713 struct mhuv2 *mhu = mhu_from_mbox(chan->mbox);
714 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
716 return priv->ops->last_tx_done(mhu, chan);
721 struct mhuv2 *mhu = mhu_from_mbox(chan->mbox);
722 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
724 if (!priv->ops->last_tx_done(mhu, chan))
725 return -EBUSY;
727 return priv->ops->send_data(mhu, chan, data);
732 struct mhuv2 *mhu = mhu_from_mbox(chan->mbox);
733 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
735 if (priv->ops->tx_startup)
736 priv->ops->tx_startup(mhu, chan);
742 struct mhuv2 *mhu = mhu_from_mbox(chan->mbox);
743 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
745 if (priv->ops->tx_shutdown)
746 priv->ops->tx_shutdown(mhu, chan);
758 struct mhuv2 *mhu = mhu_from_mbox(chan->mbox);
759 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
761 return priv->ops->rx_startup(mhu, chan);
766 struct mhuv2 *mhu = mhu_from_mbox(chan->mbox);
767 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
769 priv->ops->rx_shutdown(mhu, chan);
774 dev_err(chan->mbox->dev,
776 return -EIO;
781 dev_err(chan->mbox->dev, "Trying to Tx poll on a receiver MHU frame\n");
792 static struct mbox_chan *mhuv2_mbox_of_xlate(struct mbox_controller *mbox,
795 struct mhuv2 *mhu = mhu_from_mbox(mbox);
796 struct mbox_chan *chans = mbox->chans;
799 if (pa->args_count != 2)
800 return ERR_PTR(-EINVAL);
802 offset = pa->args[0];
803 doorbell = pa->args[1];
807 for (i = 0; i < mhu->length; i += 2) {
808 protocol = mhu->protocols[i];
809 windows = mhu->protocols[i + 1];
816 offset -= windows;
826 offset--;
831 dev_err(mbox->dev, "Couldn't xlate to a valid channel (%d: %d)\n",
832 pa->args[0], doorbell);
833 return ERR_PTR(-ENODEV);
838 struct device *dev = mhu->mbox.dev;
841 for (i = 0; i < mhu->length; i += 2) {
842 protocol = mhu->protocols[i];
843 windows = mhu->protocols[i + 1];
847 return -EINVAL;
858 return -EINVAL;
862 if (total_windows > mhu->windows) {
864 total_windows, mhu->windows);
865 return -EINVAL;
868 mhu->mbox.num_chans = channels;
874 struct mbox_controller *mbox = &mhu->mbox;
876 struct device *dev = mbox->dev;
880 chans = devm_kcalloc(dev, mbox->num_chans, sizeof(*chans), GFP_KERNEL);
882 return -ENOMEM;
884 mbox->chans = chans;
886 for (i = 0; i < mhu->length; i += 2) {
889 protocol = mhu->protocols[i];
890 windows = mhu->protocols[i + 1];
895 return -ENOMEM;
897 priv->ch_wn_idx = next_window;
898 priv->ops = &mhuv2_data_transfer_ops;
899 priv->windows = windows;
900 chans++->con_priv = priv;
908 return -ENOMEM;
910 priv->ch_wn_idx = next_window + j;
911 priv->ops = &mhuv2_doorbell_ops;
912 priv->doorbell = k;
913 chans++->con_priv = priv;
920 if (mhu->frame == SENDER_FRAME && mhu->minor)
921 writel_relaxed(0x1, &mhu->send->ch_wn[priv->ch_wn_idx].int_en);
926 BUG_ON(chans - mbox->chans != mbox->num_chans);
933 struct device *dev = mhu->mbox.dev;
934 const struct device_node *np = dev->of_node;
942 return -EINVAL;
947 return -ENOMEM;
956 mhu->protocols = protocols;
957 mhu->length = count;
969 struct device *dev = mhu->mbox.dev;
972 mhu->frame = SENDER_FRAME;
973 mhu->mbox.ops = &mhuv2_sender_ops;
974 mhu->send = reg;
976 mhu->windows = readl_relaxed_bitfield(&mhu->send->mhu_cfg, struct mhu_cfg_t, num_ch);
977 mhu->minor = readl_relaxed_bitfield(&mhu->send->aidr, struct aidr_t, arch_minor_rev);
979 spin_lock_init(&mhu->doorbell_pending_lock);
982 * For minor version 1 and forward, tx interrupt is provided by
985 if (mhu->minor && adev->irq[0]) {
986 ret = devm_request_threaded_irq(dev, adev->irq[0], NULL,
988 IRQF_ONESHOT, "mhuv2-tx", mhu);
990 dev_err(dev, "Failed to request tx IRQ, fallback to polling mode: %d\n",
993 mhu->mbox.txdone_irq = true;
994 mhu->mbox.txdone_poll = false;
995 mhu->irq = adev->irq[0];
997 writel_relaxed_bitfield(1, &mhu->send->int_en, struct int_en_t, chcomb);
1000 for (i = 0; i < mhu->windows; i++)
1001 writel_relaxed(0x0, &mhu->send->ch_wn[i].int_en);
1007 mhu->mbox.txdone_irq = false;
1008 mhu->mbox.txdone_poll = true;
1009 mhu->mbox.txpoll_period = 1;
1013 writel_relaxed(0x1, &mhu->send->access_request);
1014 while (!readl_relaxed(&mhu->send->access_ready))
1023 struct device *dev = mhu->mbox.dev;
1026 mhu->frame = RECEIVER_FRAME;
1027 mhu->mbox.ops = &mhuv2_receiver_ops;
1028 mhu->recv = reg;
1030 mhu->windows = readl_relaxed_bitfield(&mhu->recv->mhu_cfg, struct mhu_cfg_t, num_ch);
1031 mhu->minor = readl_relaxed_bitfield(&mhu->recv->aidr, struct aidr_t, arch_minor_rev);
1033 mhu->irq = adev->irq[0];
1034 if (!mhu->irq) {
1036 return -EINVAL;
1039 ret = devm_request_threaded_irq(dev, mhu->irq, NULL,
1041 "mhuv2-rx", mhu);
1048 for (i = 0; i < mhu->windows; i++)
1049 writel_relaxed(0xFFFFFFFF, &mhu->recv->ch_wn[i].mask_set);
1051 if (mhu->minor)
1052 writel_relaxed_bitfield(1, &mhu->recv->int_en, struct int_en_t, chcomb);
1059 struct device *dev = &adev->dev;
1060 const struct device_node *np = dev->of_node;
1063 int ret = -EINVAL;
1065 reg = devm_of_iomap(dev, dev->of_node, 0, NULL);
1071 return -ENOMEM;
1073 mhu->mbox.dev = dev;
1074 mhu->mbox.of_xlate = mhuv2_mbox_of_xlate;
1076 if (of_device_is_compatible(np, "arm,mhuv2-tx"))
1078 else if (of_device_is_compatible(np, "arm,mhuv2-rx"))
1087 BUG_ON(!mhu->windows);
1095 ret = devm_mbox_controller_register(dev, &mhu->mbox);
1106 if (mhu->frame == SENDER_FRAME)
1107 writel_relaxed(0x0, &mhu->send->access_request);
1127 .name = "arm-mhuv2",