38 waitforHIA(struct isar_hw *isar, int timeout)  in waitforHIA()  argument
41 	u8 val = isar->read_reg(isar->hw, ISAR_HIA);  in waitforHIA()
46 		val = isar->read_reg(isar->hw, ISAR_HIA);  in waitforHIA()
48 	pr_debug("%s: HIA after %dus\n", isar->name, timeout - t);  in waitforHIA()
57 send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg)  in send_mbox()  argument
59 	if (!waitforHIA(isar, 1000))  in send_mbox()
62 	isar->write_reg(isar->hw, ISAR_CTRL_H, creg);  in send_mbox()
63 	isar->write_reg(isar->hw, ISAR_CTRL_L, len);  in send_mbox()
64 	isar->write_reg(isar->hw, ISAR_WADR, 0);  in send_mbox()
66 		msg = isar->buf;  in send_mbox()
68 		isar->write_fifo(isar->hw, ISAR_MBOX, msg, len);  in send_mbox()
69 		if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {  in send_mbox()
74 						   isar->log, 256, 1);  in send_mbox()
75 				pr_debug("%s: %s %02x: %s\n", isar->name,  in send_mbox()
76 					 __func__, l, isar->log);  in send_mbox()
81 	isar->write_reg(isar->hw, ISAR_HIS, his);  in send_mbox()
82 	waitforHIA(isar, 1000);  in send_mbox()
91 rcv_mbox(struct isar_hw *isar, u8 *msg)  in rcv_mbox()  argument
94 		msg = isar->buf;  in rcv_mbox()
95 	isar->write_reg(isar->hw, ISAR_RADR, 0);  in rcv_mbox()
96 	if (msg && isar->clsb) {  in rcv_mbox()
97 		isar->read_fifo(isar->hw, ISAR_MBOX, msg, isar->clsb);  in rcv_mbox()
98 		if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {  in rcv_mbox()
101 			while (l < (int)isar->clsb) {  in rcv_mbox()
102 				hex_dump_to_buffer(msg + l, isar->clsb - l, 32,  in rcv_mbox()
103 						   1, isar->log, 256, 1);  in rcv_mbox()
104 				pr_debug("%s: %s %02x: %s\n", isar->name,  in rcv_mbox()
105 					 __func__, l, isar->log);  in rcv_mbox()
110 	isar->write_reg(isar->hw, ISAR_IIA, 0);  in rcv_mbox()
114 get_irq_infos(struct isar_hw *isar)  in get_irq_infos()  argument
116 	isar->iis = isar->read_reg(isar->hw, ISAR_IIS);  in get_irq_infos()
117 	isar->cmsb = isar->read_reg(isar->hw, ISAR_CTRL_H);  in get_irq_infos()
118 	isar->clsb = isar->read_reg(isar->hw, ISAR_CTRL_L);  in get_irq_infos()
119 	pr_debug("%s: rcv_mbox(%02x,%02x,%d)\n", isar->name,  in get_irq_infos()
120 		 isar->iis, isar->cmsb, isar->clsb);  in get_irq_infos()
129 poll_mbox(struct isar_hw *isar, int maxdelay)  in poll_mbox()  argument
134 	irq = isar->read_reg(isar->hw, ISAR_IRQBIT);  in poll_mbox()
140 		get_irq_infos(isar);  in poll_mbox()
141 		rcv_mbox(isar, NULL);  in poll_mbox()
144 		 isar->name, isar->clsb, maxdelay - t);  in poll_mbox()
149 ISARVersion(struct isar_hw *isar)  in ISARVersion()  argument
154 	isar->write_reg(isar->hw, ISAR_IRQBIT, 0);  in ISARVersion()
155 	isar->buf[0] = ISAR_MSG_HWVER;  in ISARVersion()
156 	isar->buf[1] = 0;  in ISARVersion()
157 	isar->buf[2] = 1;  in ISARVersion()
158 	if (!send_mbox(isar, ISAR_HIS_VNR, 0, 3, NULL))  in ISARVersion()
160 	if (!poll_mbox(isar, 1000))  in ISARVersion()
162 	if (isar->iis == ISAR_IIS_VNR) {  in ISARVersion()
163 		if (isar->clsb == 1) {  in ISARVersion()
164 			ver = isar->buf[0] & 0xf;  in ISARVersion()
173 load_firmware(struct isar_hw *isar, const u8 *buf, int size)  in load_firmware()  argument
175 	u32	saved_debug = isar->ch[0].bch.debug;  in load_firmware()
188 	if (1 != isar->version) {  in load_firmware()
190 		       isar->name, isar->version);  in load_firmware()
194 		isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO;  in load_firmware()
196 		 isar->name, size / 2, size);  in load_firmware()
200 	spin_lock_irqsave(isar->hwlock, flags);  in load_firmware()
201 	isar->write_reg(isar->hw, ISAR_IRQBIT, 0);  in load_firmware()
202 	spin_unlock_irqrestore(isar->hwlock, flags);  in load_firmware()
213 				isar->name, size, cnt + left);  in load_firmware()
217 		spin_lock_irqsave(isar->hwlock, flags);  in load_firmware()
218 		if (!send_mbox(isar, ISAR_HIS_DKEY, blk_head.d_key & 0xff,  in load_firmware()
224 		if (!poll_mbox(isar, 1000)) {  in load_firmware()
229 		spin_unlock_irqrestore(isar->hwlock, flags);  in load_firmware()
230 		if ((isar->iis != ISAR_IIS_DKEY) || isar->cmsb || isar->clsb) {  in load_firmware()
232 				isar->iis, isar->cmsb, isar->clsb);  in load_firmware()
242 			mp  = isar->buf;  in load_firmware()
249 			pr_debug("%s: load %3d words at %04x\n", isar->name,  in load_firmware()
258 			spin_lock_irqsave(isar->hwlock, flags);  in load_firmware()
259 			if (!send_mbox(isar, ISAR_HIS_FIRM, 0, nom, NULL)) {  in load_firmware()
264 			if (!poll_mbox(isar, 1000)) {  in load_firmware()
269 			spin_unlock_irqrestore(isar->hwlock, flags);  in load_firmware()
270 			if ((isar->iis != ISAR_IIS_FIRM) ||  in load_firmware()
271 			    isar->cmsb || isar->clsb) {  in load_firmware()
273 					isar->iis, isar->cmsb, isar->clsb);  in load_firmware()
279 			 isar->name, blk_head.len);  in load_firmware()
281 	isar->ch[0].bch.debug = saved_debug;  in load_firmware()
286 	isar->buf[0] = 0xff;  in load_firmware()
287 	isar->buf[1] = 0xfe;  in load_firmware()
288 	isar->bstat = 0;  in load_firmware()
289 	spin_lock_irqsave(isar->hwlock, flags);  in load_firmware()
290 	if (!send_mbox(isar, ISAR_HIS_STDSP, 0, 2, NULL)) {  in load_firmware()
295 	if (!poll_mbox(isar, 1000)) {  in load_firmware()
300 	if ((isar->iis != ISAR_IIS_STDSP) || isar->cmsb || isar->clsb) {  in load_firmware()
302 			isar->iis, isar->cmsb, isar->clsb);  in load_firmware()
306 		pr_debug("%s: ISAR start dsp success\n", isar->name);  in load_firmware()
310 	isar->write_reg(isar->hw, ISAR_IRQBIT, ISAR_IRQSTA);  in load_firmware()
311 	spin_unlock_irqrestore(isar->hwlock, flags);  in load_firmware()
313 	while ((!isar->bstat) && cnt) {  in load_firmware()
323 			 isar->name, isar->bstat);  in load_firmware()
328 	isar->iis = 0;  in load_firmware()
329 	spin_lock_irqsave(isar->hwlock, flags);  in load_firmware()
330 	if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {  in load_firmware()
335 	spin_unlock_irqrestore(isar->hwlock, flags);  in load_firmware()
337 	while ((isar->iis != ISAR_IIS_DIAG) && cnt) {  in load_firmware()
347 	if ((isar->cmsb == ISAR_CTRL_STST) && (isar->clsb == 1)  in load_firmware()
348 	    && (isar->buf[0] == 0))  in load_firmware()
349 		pr_debug("%s: ISAR selftest OK\n", isar->name);  in load_firmware()
352 			isar->cmsb, isar->clsb, isar->buf[0]);  in load_firmware()
356 	spin_lock_irqsave(isar->hwlock, flags);  in load_firmware()
357 	isar->iis = 0;  in load_firmware()
358 	if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {  in load_firmware()
363 	spin_unlock_irqrestore(isar->hwlock, flags);  in load_firmware()
365 	while ((isar->iis != ISAR_IIS_DIAG) && cnt) {  in load_firmware()
375 		if ((isar->cmsb == ISAR_CTRL_SWVER) && (isar->clsb == 1)) {  in load_firmware()
377 				  isar->name, isar->buf[0]);  in load_firmware()
380 				" cnt(%d)\n", isar->name, isar->cmsb,  in load_firmware()
381 				isar->clsb, cnt);  in load_firmware()
386 	spin_lock_irqsave(isar->hwlock, flags);  in load_firmware()
387 	isar_setup(isar);  in load_firmware()
388 	spin_unlock_irqrestore(isar->hwlock, flags);  in load_firmware()
391 	spin_lock_irqsave(isar->hwlock, flags);  in load_firmware()
393 	isar->ch[0].bch.debug = saved_debug;  in load_firmware()
396 		isar->write_reg(isar->hw, ISAR_IRQBIT, 0);  in load_firmware()
397 	spin_unlock_irqrestore(isar->hwlock, flags);  in load_firmware()
660 sel_bch_isar(struct isar_hw *isar, u8 dpath)  in sel_bch_isar()  argument
662 	struct isar_ch	*base = &isar->ch[0];  in sel_bch_isar()
720 check_send(struct isar_hw *isar, u8 rdm)  in check_send()  argument
724 	pr_debug("%s: rdm %x\n", isar->name, rdm);  in check_send()
726 		ch = sel_bch_isar(isar, 1);  in check_send()
736 		ch = sel_bch_isar(isar, 2);  in check_send()
1037 mISDNisar_irq(struct isar_hw *isar)  in mISDNisar_irq()  argument
1041 	get_irq_infos(isar);  in mISDNisar_irq()
1042 	switch (isar->iis & ISAR_IIS_MSCMSD) {  in mISDNisar_irq()
1044 		ch = sel_bch_isar(isar, isar->iis >> 6);  in mISDNisar_irq()
1049 				 isar->name, isar->iis, isar->cmsb,  in mISDNisar_irq()
1050 				 isar->clsb);  in mISDNisar_irq()
1051 			isar->write_reg(isar->hw, ISAR_IIA, 0);  in mISDNisar_irq()
1055 		isar->write_reg(isar->hw, ISAR_IIA, 0);  in mISDNisar_irq()
1056 		isar->bstat |= isar->cmsb;  in mISDNisar_irq()
1057 		check_send(isar, isar->cmsb);  in mISDNisar_irq()
1061 		ch = sel_bch_isar(isar, isar->iis >> 6);  in mISDNisar_irq()
1063 			if (isar->cmsb == BSTEV_TBO)  in mISDNisar_irq()
1065 			if (isar->cmsb == BSTEV_RBO)  in mISDNisar_irq()
1070 			 isar->name, isar->iis >> 6, isar->cmsb);  in mISDNisar_irq()
1071 		isar->write_reg(isar->hw, ISAR_IIA, 0);  in mISDNisar_irq()
1074 		ch = sel_bch_isar(isar, isar->iis >> 6);  in mISDNisar_irq()
1076 			rcv_mbox(isar, NULL);  in mISDNisar_irq()
1078 				isar_pump_statev_modem(ch, isar->cmsb);  in mISDNisar_irq()
1080 				isar_pump_statev_fax(ch, isar->cmsb);  in mISDNisar_irq()
1083 				tt = isar->cmsb | 0x30;  in mISDNisar_irq()
1096 					 isar->name, ch->bch.state,  in mISDNisar_irq()
1097 					 isar->cmsb);  in mISDNisar_irq()
1100 				 isar->name, isar->iis, isar->cmsb,  in mISDNisar_irq()
1101 				 isar->clsb);  in mISDNisar_irq()
1102 			isar->write_reg(isar->hw, ISAR_IIA, 0);  in mISDNisar_irq()
1106 		ch = sel_bch_isar(isar, isar->iis >> 6);  in mISDNisar_irq()
1108 			rcv_mbox(isar, NULL);  in mISDNisar_irq()
1112 				 isar->name, isar->iis, isar->cmsb,  in mISDNisar_irq()
1113 				 isar->clsb);  in mISDNisar_irq()
1114 			isar->write_reg(isar->hw, ISAR_IIA, 0);  in mISDNisar_irq()
1120 		rcv_mbox(isar, NULL);  in mISDNisar_irq()
1123 		rcv_mbox(isar, NULL);  in mISDNisar_irq()
1124 		pr_debug("%s: invalid msg his:%x\n", isar->name, isar->cmsb);  in mISDNisar_irq()
1127 		rcv_mbox(isar, NULL);  in mISDNisar_irq()
1129 			 isar->name, isar->iis, isar->cmsb, isar->clsb);  in mISDNisar_irq()
1448 isar_setup(struct isar_hw *isar)  in isar_setup()  argument
1457 		send_mbox(isar, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |  in isar_setup()
1459 		isar->ch[i].mml = msg;  in isar_setup()
1460 		isar->ch[i].bch.state = 0;  in isar_setup()
1461 		isar->ch[i].dpath = i + 1;  in isar_setup()
1462 		modeisar(&isar->ch[i], ISDN_P_NONE);  in isar_setup()
1602 free_isar(struct isar_hw *isar)  in free_isar()  argument
1604 	modeisar(&isar->ch[0], ISDN_P_NONE);  in free_isar()
1605 	modeisar(&isar->ch[1], ISDN_P_NONE);  in free_isar()
1606 	timer_delete(&isar->ch[0].ftimer);  in free_isar()
1607 	timer_delete(&isar->ch[1].ftimer);  in free_isar()
1608 	test_and_clear_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);  in free_isar()
1609 	test_and_clear_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);  in free_isar()
1613 init_isar(struct isar_hw *isar)  in init_isar()  argument
1618 		isar->version = ISARVersion(isar);  in init_isar()
1619 		if (isar->ch[0].bch.debug & DEBUG_HW)  in init_isar()
1621 				  isar->name, isar->version, 3 - cnt);  in init_isar()
1622 		if (isar->version == 1)  in init_isar()
1624 		isar->ctrl(isar->hw, HW_RESET_REQ, 0);  in init_isar()
1626 	if (isar->version != 1)  in init_isar()
1628 	timer_setup(&isar->ch[0].ftimer, ftimer_handler, 0);  in init_isar()
1629 	test_and_set_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);  in init_isar()
1630 	timer_setup(&isar->ch[1].ftimer, ftimer_handler, 0);  in init_isar()
1631 	test_and_set_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);  in init_isar()
1636 isar_open(struct isar_hw *isar, struct channel_req *rq)  in isar_open()  argument
1644 	bch = &isar->ch[rq->adr.channel - 1].bch;  in isar_open()
1653 mISDNisar_init(struct isar_hw *isar, void *hw)  in mISDNisar_init()  argument
1657 	isar->hw = hw;  in mISDNisar_init()
1659 		isar->ch[i].bch.nr = i + 1;  in mISDNisar_init()
1660 		mISDN_initbchannel(&isar->ch[i].bch, MAX_DATA_MEM, 32);  in mISDNisar_init()
1661 		isar->ch[i].bch.ch.nr = i + 1;  in mISDNisar_init()
1662 		isar->ch[i].bch.ch.send = &isar_l2l1;  in mISDNisar_init()
1663 		isar->ch[i].bch.ch.ctrl = isar_bctrl;  in mISDNisar_init()
1664 		isar->ch[i].bch.hw = hw;  in mISDNisar_init()
1665 		isar->ch[i].is = isar;  in mISDNisar_init()
1668 	isar->init = &init_isar;  in mISDNisar_init()
1669 	isar->release = &free_isar;  in mISDNisar_init()
1670 	isar->firmware = &load_firmware;  in mISDNisar_init()
1671 	isar->open = &isar_open;  in mISDNisar_init()