Lines Matching +full:te +full:- +full:source
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * hfcpci.c low level driver for CCD's hfc-pci based cards
8 * type approval valid for HFC-S PCI A based card
10 * Copyright 1999 by Werner Cornelius (werner@isdn-development.de)
52 MODULE_DESCRIPTION("mISDN driver for CCD's hfc-pci based cards");
104 /* marker saving last b-fifo frame count */
121 #define CLKDEL_TE 0x0e /* CLKDEL in TE mode */
143 hc->hw.int_m2 |= HFCPCI_IRQ_ENABLE; in enable_hwirq()
144 Write_hfc(hc, HFCPCI_INT_M2, hc->hw.int_m2); in enable_hwirq()
150 hc->hw.int_m2 &= ~((u_char)HFCPCI_IRQ_ENABLE); in disable_hwirq()
151 Write_hfc(hc, HFCPCI_INT_M2, hc->hw.int_m2); in disable_hwirq()
161 pci_write_config_word(hc->pdev, PCI_COMMAND, 0); in release_io_hfcpci()
162 timer_delete(&hc->hw.timer); in release_io_hfcpci()
163 dma_free_coherent(&hc->pdev->dev, 0x8000, hc->hw.fifos, in release_io_hfcpci()
164 hc->hw.dmahandle); in release_io_hfcpci()
165 iounmap(hc->hw.pci_io); in release_io_hfcpci()
169 * set mode (NT or TE)
174 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_setmode()
175 hc->hw.clkdel = CLKDEL_NT; /* ST-Bit delay for NT-Mode */ in hfcpci_setmode()
176 hc->hw.sctrl |= SCTRL_MODE_NT; /* NT-MODE */ in hfcpci_setmode()
177 hc->hw.states = 1; /* G1 */ in hfcpci_setmode()
179 hc->hw.clkdel = CLKDEL_TE; /* ST-Bit delay for TE-Mode */ in hfcpci_setmode()
180 hc->hw.sctrl &= ~SCTRL_MODE_NT; /* TE-MODE */ in hfcpci_setmode()
181 hc->hw.states = 2; /* F2 */ in hfcpci_setmode()
183 Write_hfc(hc, HFCPCI_CLKDEL, hc->hw.clkdel); in hfcpci_setmode()
184 Write_hfc(hc, HFCPCI_STATES, HFCPCI_LOAD_STATE | hc->hw.states); in hfcpci_setmode()
186 Write_hfc(hc, HFCPCI_STATES, hc->hw.states | 0x40); /* Deactivate */ in hfcpci_setmode()
187 Write_hfc(hc, HFCPCI_SCTRL, hc->hw.sctrl); in hfcpci_setmode()
204 pci_write_config_word(hc->pdev, PCI_COMMAND, PCI_ENA_MEMIO); in reset_hfcpci()
207 pci_write_config_word(hc->pdev, PCI_COMMAND, in reset_hfcpci()
210 printk(KERN_DEBUG "HFC-PCI status(%x) before reset\n", val); in reset_hfcpci()
211 hc->hw.cirm = HFCPCI_RESET; /* Reset On */ in reset_hfcpci()
212 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in reset_hfcpci()
215 hc->hw.cirm = 0; /* Reset Off */ in reset_hfcpci()
216 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in reset_hfcpci()
218 printk(KERN_DEBUG "HFC-PCI status(%x) after reset\n", val); in reset_hfcpci()
226 printk(KERN_DEBUG "HFC-PCI status(%x) after %dus\n", val, cnt); in reset_hfcpci()
228 hc->hw.fifo_en = 0x30; /* only D fifos enabled */ in reset_hfcpci()
230 hc->hw.bswapped = 0; /* no exchange */ in reset_hfcpci()
231 hc->hw.ctmt = HFCPCI_TIM3_125 | HFCPCI_AUTO_TIMER; in reset_hfcpci()
232 hc->hw.trm = HFCPCI_BTRANS_THRESMASK; /* no echo connect , threshold */ in reset_hfcpci()
233 hc->hw.sctrl = 0x40; /* set tx_lo mode, error in datasheet ! */ in reset_hfcpci()
234 hc->hw.sctrl_r = 0; in reset_hfcpci()
235 hc->hw.sctrl_e = HFCPCI_AUTO_AWAKE; /* S/T Auto awake */ in reset_hfcpci()
236 hc->hw.mst_m = 0; in reset_hfcpci()
237 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in reset_hfcpci()
238 hc->hw.mst_m |= HFCPCI_MASTER; /* HFC Master Mode */ in reset_hfcpci()
239 if (test_bit(HFC_CFG_NEG_F0, &hc->cfg)) in reset_hfcpci()
240 hc->hw.mst_m |= HFCPCI_F0_NEGATIV; in reset_hfcpci()
241 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in reset_hfcpci()
242 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in reset_hfcpci()
243 Write_hfc(hc, HFCPCI_SCTRL_E, hc->hw.sctrl_e); in reset_hfcpci()
244 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in reset_hfcpci()
246 hc->hw.int_m1 = HFCPCI_INTS_DTRANS | HFCPCI_INTS_DREC | in reset_hfcpci()
248 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in reset_hfcpci()
253 /* set NT/TE mode */ in reset_hfcpci()
256 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in reset_hfcpci()
257 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in reset_hfcpci()
261 * Slots 0 and 1 are set for B-chan 1 and 2 in reset_hfcpci()
262 * D- and monitor/CI channel are not enabled in reset_hfcpci()
263 * STIO1 is used as output for data, B1+B2 from ST->IOM+HFC in reset_hfcpci()
264 * STIO2 is used as data input, B1+B2 from IOM->ST in reset_hfcpci()
265 * ST B-channel send disabled -> continuous 1s in reset_hfcpci()
268 if (test_bit(HFC_CFG_PCM, &hc->cfg)) { in reset_hfcpci()
270 hc->hw.conn = 0x09; in reset_hfcpci()
272 hc->hw.conn = 0x36; /* set data flow directions */ in reset_hfcpci()
273 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) { in reset_hfcpci()
285 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in reset_hfcpci()
296 hc->hw.timer.expires = jiffies + 75; in hfcpci_Timer()
299 * WriteReg(hc, HFCD_DATA, HFCD_CTMT, hc->hw.ctmt | 0x80); in hfcpci_Timer()
300 * add_timer(&hc->hw.timer); in hfcpci_Timer()
306 * select a b-channel entry matching and active
311 if (test_bit(FLG_ACTIVE, &hc->bch[0].Flags) && in Sel_BCS()
312 (hc->bch[0].nr & channel)) in Sel_BCS()
313 return &hc->bch[0]; in Sel_BCS()
314 else if (test_bit(FLG_ACTIVE, &hc->bch[1].Flags) && in Sel_BCS()
315 (hc->bch[1].nr & channel)) in Sel_BCS()
316 return &hc->bch[1]; in Sel_BCS()
322 * clear the desired B-channel rx fifo
331 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in hfcpci_clear_fifo_rx()
332 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B2RX; in hfcpci_clear_fifo_rx()
334 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in hfcpci_clear_fifo_rx()
335 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B1RX; in hfcpci_clear_fifo_rx()
338 hc->hw.fifo_en ^= fifo_state; in hfcpci_clear_fifo_rx()
339 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_rx()
340 hc->hw.last_bfifo_cnt[fifo] = 0; in hfcpci_clear_fifo_rx()
341 bzr->f1 = MAX_B_FRAMES; in hfcpci_clear_fifo_rx()
342 bzr->f2 = bzr->f1; /* init F pointers to remain constant */ in hfcpci_clear_fifo_rx()
343 bzr->za[MAX_B_FRAMES].z1 = cpu_to_le16(B_FIFO_SIZE + B_SUB_VAL - 1); in hfcpci_clear_fifo_rx()
344 bzr->za[MAX_B_FRAMES].z2 = cpu_to_le16( in hfcpci_clear_fifo_rx()
345 le16_to_cpu(bzr->za[MAX_B_FRAMES].z1)); in hfcpci_clear_fifo_rx()
347 hc->hw.fifo_en |= fifo_state; in hfcpci_clear_fifo_rx()
348 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_rx()
352 * clear the desired B-channel tx fifo
360 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_clear_fifo_tx()
361 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B2TX; in hfcpci_clear_fifo_tx()
363 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_clear_fifo_tx()
364 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B1TX; in hfcpci_clear_fifo_tx()
367 hc->hw.fifo_en ^= fifo_state; in hfcpci_clear_fifo_tx()
368 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_tx()
369 if (hc->bch[fifo].debug & DEBUG_HW_BCHANNEL) in hfcpci_clear_fifo_tx()
372 fifo, bzt->f1, bzt->f2, in hfcpci_clear_fifo_tx()
373 le16_to_cpu(bzt->za[MAX_B_FRAMES].z1), in hfcpci_clear_fifo_tx()
374 le16_to_cpu(bzt->za[MAX_B_FRAMES].z2), in hfcpci_clear_fifo_tx()
376 bzt->f2 = MAX_B_FRAMES; in hfcpci_clear_fifo_tx()
377 bzt->f1 = bzt->f2; /* init F pointers to remain constant */ in hfcpci_clear_fifo_tx()
378 bzt->za[MAX_B_FRAMES].z1 = cpu_to_le16(B_FIFO_SIZE + B_SUB_VAL - 1); in hfcpci_clear_fifo_tx()
379 bzt->za[MAX_B_FRAMES].z2 = cpu_to_le16(B_FIFO_SIZE + B_SUB_VAL - 2); in hfcpci_clear_fifo_tx()
381 hc->hw.fifo_en |= fifo_state; in hfcpci_clear_fifo_tx()
382 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_tx()
383 if (hc->bch[fifo].debug & DEBUG_HW_BCHANNEL) in hfcpci_clear_fifo_tx()
386 fifo, bzt->f1, bzt->f2, in hfcpci_clear_fifo_tx()
387 le16_to_cpu(bzt->za[MAX_B_FRAMES].z1), in hfcpci_clear_fifo_tx()
388 le16_to_cpu(bzt->za[MAX_B_FRAMES].z2)); in hfcpci_clear_fifo_tx()
392 * read a complete B-frame out of the buffer
402 if ((bch->debug & DEBUG_HW_BCHANNEL) && !(bch->debug & DEBUG_HW_BFIFO)) in hfcpci_empty_bfifo()
404 zp = &bz->za[bz->f2]; /* point to Z-Regs */ in hfcpci_empty_bfifo()
405 new_z2 = le16_to_cpu(zp->z2) + count; /* new position in fifo */ in hfcpci_empty_bfifo()
407 new_z2 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_empty_bfifo()
408 new_f2 = (bz->f2 + 1) & MAX_B_FRAMES; in hfcpci_empty_bfifo()
410 (*(bdata + (le16_to_cpu(zp->z1) - B_SUB_VAL)))) { in hfcpci_empty_bfifo()
411 if (bch->debug & DEBUG_HW) in hfcpci_empty_bfifo()
415 bch->err_inv++; in hfcpci_empty_bfifo()
417 bz->za[new_f2].z2 = cpu_to_le16(new_z2); in hfcpci_empty_bfifo()
418 bz->f2 = new_f2; /* next buffer */ in hfcpci_empty_bfifo()
420 bch->rx_skb = mI_alloc_skb(count - 3, GFP_ATOMIC); in hfcpci_empty_bfifo()
421 if (!bch->rx_skb) { in hfcpci_empty_bfifo()
425 count -= 3; in hfcpci_empty_bfifo()
426 ptr = skb_put(bch->rx_skb, count); in hfcpci_empty_bfifo()
428 if (le16_to_cpu(zp->z2) + count <= B_FIFO_SIZE + B_SUB_VAL) in hfcpci_empty_bfifo()
431 maxlen = B_FIFO_SIZE + B_SUB_VAL - in hfcpci_empty_bfifo()
432 le16_to_cpu(zp->z2); /* maximum */ in hfcpci_empty_bfifo()
434 ptr1 = bdata + (le16_to_cpu(zp->z2) - B_SUB_VAL); in hfcpci_empty_bfifo()
437 count -= maxlen; in hfcpci_empty_bfifo()
444 bz->za[new_f2].z2 = cpu_to_le16(new_z2); in hfcpci_empty_bfifo()
445 bz->f2 = new_f2; /* next buffer */ in hfcpci_empty_bfifo()
451 * D-channel receive procedure
456 struct dchannel *dch = &hc->dch; in receive_dmsg()
464 df = &((union fifo_area *)(hc->hw.fifos))->d_chan.d_rx; in receive_dmsg()
465 while (((df->f1 & D_FREG_MASK) != (df->f2 & D_FREG_MASK)) && count--) { in receive_dmsg()
466 zp = &df->za[df->f2 & D_FREG_MASK]; in receive_dmsg()
467 rcnt = le16_to_cpu(zp->z1) - le16_to_cpu(zp->z2); in receive_dmsg()
471 if (dch->debug & DEBUG_HW_DCHANNEL) in receive_dmsg()
474 df->f1, df->f2, in receive_dmsg()
475 le16_to_cpu(zp->z1), in receive_dmsg()
476 le16_to_cpu(zp->z2), in receive_dmsg()
480 (df->data[le16_to_cpu(zp->z1)])) { in receive_dmsg()
481 if (dch->debug & DEBUG_HW) in receive_dmsg()
486 df->data[le16_to_cpu(zp->z1)]); in receive_dmsg()
488 cs->err_rx++; in receive_dmsg()
490 df->f2 = ((df->f2 + 1) & MAX_D_FRAMES) | in receive_dmsg()
492 df->za[df->f2 & D_FREG_MASK].z2 = in receive_dmsg()
493 cpu_to_le16((le16_to_cpu(zp->z2) + rcnt) & in receive_dmsg()
494 (D_FIFO_SIZE - 1)); in receive_dmsg()
496 dch->rx_skb = mI_alloc_skb(rcnt - 3, GFP_ATOMIC); in receive_dmsg()
497 if (!dch->rx_skb) { in receive_dmsg()
499 "HFC-PCI: D receive out of memory\n"); in receive_dmsg()
503 rcnt -= 3; in receive_dmsg()
504 ptr = skb_put(dch->rx_skb, rcnt); in receive_dmsg()
506 if (le16_to_cpu(zp->z2) + rcnt <= D_FIFO_SIZE) in receive_dmsg()
509 maxlen = D_FIFO_SIZE - le16_to_cpu(zp->z2); in receive_dmsg()
512 ptr1 = df->data + le16_to_cpu(zp->z2); in receive_dmsg()
515 rcnt -= maxlen; in receive_dmsg()
519 ptr1 = df->data; /* start of buffer */ in receive_dmsg()
522 df->f2 = ((df->f2 + 1) & MAX_D_FRAMES) | in receive_dmsg()
524 df->za[df->f2 & D_FREG_MASK].z2 = cpu_to_le16(( in receive_dmsg()
525 le16_to_cpu(zp->z2) + total) & (D_FIFO_SIZE - 1)); in receive_dmsg()
543 z1r = &rxbz->za[MAX_B_FRAMES].z1; /* pointer to z reg */ in hfcpci_empty_fifo_trans()
545 z1t = &txbz->za[MAX_B_FRAMES].z1; in hfcpci_empty_fifo_trans()
548 fcnt_rx = le16_to_cpu(*z1r) - le16_to_cpu(*z2r); in hfcpci_empty_fifo_trans()
556 new_z2 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_empty_fifo_trans()
558 fcnt_tx = le16_to_cpu(*z2t) - le16_to_cpu(*z1t); in hfcpci_empty_fifo_trans()
561 /* fcnt_tx contains available bytes in tx-fifo */ in hfcpci_empty_fifo_trans()
562 fcnt_tx = B_FIFO_SIZE - fcnt_tx; in hfcpci_empty_fifo_trans()
563 /* remaining bytes to send (bytes in tx-fifo) */ in hfcpci_empty_fifo_trans()
565 if (test_bit(FLG_RX_OFF, &bch->Flags)) { in hfcpci_empty_fifo_trans()
566 bch->dropcnt += fcnt_rx; in hfcpci_empty_fifo_trans()
572 pr_warn("B%d: No bufferspace for %d bytes\n", bch->nr, fcnt_rx); in hfcpci_empty_fifo_trans()
574 ptr = skb_put(bch->rx_skb, fcnt_rx); in hfcpci_empty_fifo_trans()
578 maxlen = B_FIFO_SIZE + B_SUB_VAL - le16_to_cpu(*z2r); in hfcpci_empty_fifo_trans()
581 ptr1 = bdata + (le16_to_cpu(*z2r) - B_SUB_VAL); in hfcpci_empty_fifo_trans()
584 fcnt_rx -= maxlen; in hfcpci_empty_fifo_trans()
597 * B-channel main receive routine
602 struct hfc_pci *hc = bch->hw; in main_rec_hfcpci()
609 if ((bch->nr & 2) && (!hc->hw.bswapped)) { in main_rec_hfcpci()
610 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in main_rec_hfcpci()
611 txbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in main_rec_hfcpci()
612 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.rxdat_b2; in main_rec_hfcpci()
615 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in main_rec_hfcpci()
616 txbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in main_rec_hfcpci()
617 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.rxdat_b1; in main_rec_hfcpci()
621 count--; in main_rec_hfcpci()
622 if (rxbz->f1 != rxbz->f2) { in main_rec_hfcpci()
623 if (bch->debug & DEBUG_HW_BCHANNEL) in main_rec_hfcpci()
625 bch->nr, rxbz->f1, rxbz->f2); in main_rec_hfcpci()
626 zp = &rxbz->za[rxbz->f2]; in main_rec_hfcpci()
628 rcnt = le16_to_cpu(zp->z1) - le16_to_cpu(zp->z2); in main_rec_hfcpci()
632 if (bch->debug & DEBUG_HW_BCHANNEL) in main_rec_hfcpci()
635 bch->nr, le16_to_cpu(zp->z1), in main_rec_hfcpci()
636 le16_to_cpu(zp->z2), rcnt); in main_rec_hfcpci()
638 rcnt = rxbz->f1 - rxbz->f2; in main_rec_hfcpci()
641 if (hc->hw.last_bfifo_cnt[real_fifo] > rcnt + 1) { in main_rec_hfcpci()
645 hc->hw.last_bfifo_cnt[real_fifo] = rcnt; in main_rec_hfcpci()
650 } else if (test_bit(FLG_TRANSPARENT, &bch->Flags)) { in main_rec_hfcpci()
661 * D-channel send routine
666 struct dchannel *dch = &hc->dch; in hfcpci_fill_dfifo()
672 if ((dch->debug & DEBUG_HW_DCHANNEL) && !(dch->debug & DEBUG_HW_DFIFO)) in hfcpci_fill_dfifo()
675 if (!dch->tx_skb) in hfcpci_fill_dfifo()
677 count = dch->tx_skb->len - dch->tx_idx; in hfcpci_fill_dfifo()
680 df = &((union fifo_area *) (hc->hw.fifos))->d_chan.d_tx; in hfcpci_fill_dfifo()
682 if (dch->debug & DEBUG_HW_DFIFO) in hfcpci_fill_dfifo()
684 df->f1, df->f2, in hfcpci_fill_dfifo()
685 le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1)); in hfcpci_fill_dfifo()
686 fcnt = df->f1 - df->f2; /* frame count actually buffered */ in hfcpci_fill_dfifo()
689 if (fcnt > (MAX_D_FRAMES - 1)) { in hfcpci_fill_dfifo()
690 if (dch->debug & DEBUG_HW_DCHANNEL) in hfcpci_fill_dfifo()
694 cs->err_tx++; in hfcpci_fill_dfifo()
699 maxlen = le16_to_cpu(df->za[df->f2 & D_FREG_MASK].z2) - in hfcpci_fill_dfifo()
700 le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1) - 1; in hfcpci_fill_dfifo()
704 if (dch->debug & DEBUG_HW_DCHANNEL) in hfcpci_fill_dfifo()
708 if (dch->debug & DEBUG_HW_DCHANNEL) in hfcpci_fill_dfifo()
712 new_z1 = (le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1) + count) & in hfcpci_fill_dfifo()
713 (D_FIFO_SIZE - 1); in hfcpci_fill_dfifo()
714 new_f1 = ((df->f1 + 1) & D_FREG_MASK) | (D_FREG_MASK + 1); in hfcpci_fill_dfifo()
715 src = dch->tx_skb->data + dch->tx_idx; /* source pointer */ in hfcpci_fill_dfifo()
716 dst = df->data + le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1); in hfcpci_fill_dfifo()
717 maxlen = D_FIFO_SIZE - le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1); in hfcpci_fill_dfifo()
723 count -= maxlen; /* remaining bytes */ in hfcpci_fill_dfifo()
725 dst = df->data; /* start of buffer */ in hfcpci_fill_dfifo()
729 df->za[new_f1 & D_FREG_MASK].z1 = cpu_to_le16(new_z1); in hfcpci_fill_dfifo()
731 df->za[df->f1 & D_FREG_MASK].z1 = cpu_to_le16(new_z1); in hfcpci_fill_dfifo()
733 df->f1 = new_f1; /* next frame */ in hfcpci_fill_dfifo()
734 dch->tx_idx = dch->tx_skb->len; in hfcpci_fill_dfifo()
738 * B-channel send routine
743 struct hfc_pci *hc = bch->hw; in hfcpci_fill_fifo()
751 if ((bch->debug & DEBUG_HW_BCHANNEL) && !(bch->debug & DEBUG_HW_BFIFO)) in hfcpci_fill_fifo()
753 if ((!bch->tx_skb) || bch->tx_skb->len == 0) { in hfcpci_fill_fifo()
754 if (!test_bit(FLG_FILLEMPTY, &bch->Flags) && in hfcpci_fill_fifo()
755 !test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcpci_fill_fifo()
759 count = bch->tx_skb->len - bch->tx_idx; in hfcpci_fill_fifo()
761 if ((bch->nr & 2) && (!hc->hw.bswapped)) { in hfcpci_fill_fifo()
762 bz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_fill_fifo()
763 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.txdat_b2; in hfcpci_fill_fifo()
765 bz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_fill_fifo()
766 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.txdat_b1; in hfcpci_fill_fifo()
769 if (test_bit(FLG_TRANSPARENT, &bch->Flags)) { in hfcpci_fill_fifo()
770 z1t = &bz->za[MAX_B_FRAMES].z1; in hfcpci_fill_fifo()
772 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
774 "cnt(%d) z1(%x) z2(%x)\n", bch->nr, count, in hfcpci_fill_fifo()
776 fcnt = le16_to_cpu(*z2t) - le16_to_cpu(*z1t); in hfcpci_fill_fifo()
779 if (test_bit(FLG_FILLEMPTY, &bch->Flags)) { in hfcpci_fill_fifo()
786 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
787 dst = bdata + (le16_to_cpu(*z1t) - B_SUB_VAL); in hfcpci_fill_fifo()
788 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - le16_to_cpu(*z1t); in hfcpci_fill_fifo()
790 if (bch->debug & DEBUG_HW_BFIFO) in hfcpci_fill_fifo()
796 memset(dst, bch->fill[0], maxlen); /* first copy */ in hfcpci_fill_fifo()
797 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
800 memset(dst, bch->fill[0], count); in hfcpci_fill_fifo()
806 fcnt = B_FIFO_SIZE - fcnt; in hfcpci_fill_fifo()
810 count = bch->tx_skb->len - bch->tx_idx; in hfcpci_fill_fifo()
812 if (count > (poll << 1) - fcnt) in hfcpci_fill_fifo()
813 count = (poll << 1) - fcnt; in hfcpci_fill_fifo()
820 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
821 src = bch->tx_skb->data + bch->tx_idx; in hfcpci_fill_fifo()
822 /* source pointer */ in hfcpci_fill_fifo()
823 dst = bdata + (le16_to_cpu(*z1t) - B_SUB_VAL); in hfcpci_fill_fifo()
824 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - le16_to_cpu(*z1t); in hfcpci_fill_fifo()
826 if (bch->debug & DEBUG_HW_BFIFO) in hfcpci_fill_fifo()
831 bch->tx_idx += count; in hfcpci_fill_fifo()
835 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
842 if (bch->tx_idx < bch->tx_skb->len) in hfcpci_fill_fifo()
844 dev_kfree_skb_any(bch->tx_skb); in hfcpci_fill_fifo()
849 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
852 __func__, bch->nr, bz->f1, bz->f2, in hfcpci_fill_fifo()
853 bz->za[bz->f1].z1); in hfcpci_fill_fifo()
854 fcnt = bz->f1 - bz->f2; /* frame count actually buffered */ in hfcpci_fill_fifo()
857 if (fcnt > (MAX_B_FRAMES - 1)) { in hfcpci_fill_fifo()
858 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
864 maxlen = le16_to_cpu(bz->za[bz->f2].z2) - in hfcpci_fill_fifo()
865 le16_to_cpu(bz->za[bz->f1].z1) - 1; in hfcpci_fill_fifo()
869 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
871 bch->nr, count, maxlen); in hfcpci_fill_fifo()
874 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
878 new_z1 = le16_to_cpu(bz->za[bz->f1].z1) + count; in hfcpci_fill_fifo()
881 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
883 new_f1 = ((bz->f1 + 1) & MAX_B_FRAMES); in hfcpci_fill_fifo()
884 src = bch->tx_skb->data + bch->tx_idx; /* source pointer */ in hfcpci_fill_fifo()
885 dst = bdata + (le16_to_cpu(bz->za[bz->f1].z1) - B_SUB_VAL); in hfcpci_fill_fifo()
886 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - le16_to_cpu(bz->za[bz->f1].z1); in hfcpci_fill_fifo()
892 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
898 bz->za[new_f1].z1 = cpu_to_le16(new_z1); /* for next buffer */ in hfcpci_fill_fifo()
899 bz->f1 = new_f1; /* next frame */ in hfcpci_fill_fifo()
900 dev_kfree_skb_any(bch->tx_skb); in hfcpci_fill_fifo()
907 * handle L1 state changes TE
913 if (dch->debug) in ph_state_te()
914 printk(KERN_DEBUG "%s: TE newstate %x\n", in ph_state_te()
915 __func__, dch->state); in ph_state_te()
916 switch (dch->state) { in ph_state_te()
918 l1_event(dch->l1, HW_RESET_IND); in ph_state_te()
921 l1_event(dch->l1, HW_DEACT_IND); in ph_state_te()
925 l1_event(dch->l1, ANYSIGNAL); in ph_state_te()
928 l1_event(dch->l1, INFO2); in ph_state_te()
931 l1_event(dch->l1, INFO4_P8); in ph_state_te()
942 struct hfc_pci *hc = dch->hw; in handle_nt_timer3()
944 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in handle_nt_timer3()
945 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in handle_nt_timer3()
946 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in handle_nt_timer3()
947 hc->hw.nt_timer = 0; in handle_nt_timer3()
948 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in handle_nt_timer3()
949 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in handle_nt_timer3()
950 hc->hw.mst_m |= HFCPCI_MASTER; in handle_nt_timer3()
951 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in handle_nt_timer3()
952 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in handle_nt_timer3()
959 struct hfc_pci *hc = dch->hw; in ph_state_nt()
961 if (dch->debug) in ph_state_nt()
963 __func__, dch->state); in ph_state_nt()
964 switch (dch->state) { in ph_state_nt()
966 if (hc->hw.nt_timer < 0) { in ph_state_nt()
967 hc->hw.nt_timer = 0; in ph_state_nt()
968 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
969 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
970 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
971 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
977 dch->state = 4; in ph_state_nt()
978 } else if (hc->hw.nt_timer == 0) { in ph_state_nt()
979 hc->hw.int_m1 |= HFCPCI_INTS_TIMER; in ph_state_nt()
980 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
981 hc->hw.nt_timer = NT_T1_COUNT; in ph_state_nt()
982 hc->hw.ctmt &= ~HFCPCI_AUTO_TIMER; in ph_state_nt()
983 hc->hw.ctmt |= HFCPCI_TIM3_125; in ph_state_nt()
984 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | in ph_state_nt()
986 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
987 test_and_set_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
988 /* allow G2 -> G3 transition */ in ph_state_nt()
995 hc->hw.nt_timer = 0; in ph_state_nt()
996 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
997 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
998 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
999 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
1000 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in ph_state_nt()
1001 hc->hw.mst_m &= ~HFCPCI_MASTER; in ph_state_nt()
1002 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in ph_state_nt()
1003 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); in ph_state_nt()
1004 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, in ph_state_nt()
1008 hc->hw.nt_timer = 0; in ph_state_nt()
1009 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
1010 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
1011 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
1012 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
1015 if (!test_and_set_bit(FLG_HFC_TIMER_T3, &dch->Flags)) { in ph_state_nt()
1017 &dch->Flags)) { in ph_state_nt()
1021 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
1022 hc->hw.int_m1 |= HFCPCI_INTS_TIMER; in ph_state_nt()
1023 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
1024 hc->hw.nt_timer = NT_T3_COUNT; in ph_state_nt()
1025 hc->hw.ctmt &= ~HFCPCI_AUTO_TIMER; in ph_state_nt()
1026 hc->hw.ctmt |= HFCPCI_TIM3_125; in ph_state_nt()
1027 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | in ph_state_nt()
1037 struct hfc_pci *hc = dch->hw; in ph_state()
1039 if (hc->hw.protocol == ISDN_P_NT_S0) { in ph_state()
1040 if (test_bit(FLG_HFC_TIMER_T3, &dch->Flags) && in ph_state()
1041 hc->hw.nt_timer < 0) in ph_state()
1055 struct hfc_pci *hc = dch->hw; in hfc_l1callback()
1060 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in hfc_l1callback()
1061 hc->hw.mst_m |= HFCPCI_MASTER; in hfc_l1callback()
1062 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1069 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in hfc_l1callback()
1070 hc->hw.mst_m |= HFCPCI_MASTER; in hfc_l1callback()
1071 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1074 l1_event(dch->l1, HW_POWERUP_IND); in hfc_l1callback()
1077 hc->hw.mst_m &= ~HFCPCI_MASTER; in hfc_l1callback()
1078 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1079 skb_queue_purge(&dch->squeue); in hfc_l1callback()
1080 if (dch->tx_skb) { in hfc_l1callback()
1081 dev_kfree_skb(dch->tx_skb); in hfc_l1callback()
1082 dch->tx_skb = NULL; in hfc_l1callback()
1084 dch->tx_idx = 0; in hfc_l1callback()
1085 if (dch->rx_skb) { in hfc_l1callback()
1086 dev_kfree_skb(dch->rx_skb); in hfc_l1callback()
1087 dch->rx_skb = NULL; in hfc_l1callback()
1089 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in hfc_l1callback()
1090 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in hfc_l1callback()
1091 timer_delete(&dch->timer); in hfc_l1callback()
1097 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in hfc_l1callback()
1098 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfc_l1callback()
1102 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in hfc_l1callback()
1103 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfc_l1callback()
1107 if (dch->debug & DEBUG_HW) in hfc_l1callback()
1110 return -1; in hfc_l1callback()
1121 if (bch->tx_skb && bch->tx_idx < bch->tx_skb->len) in tx_birq()
1124 dev_kfree_skb_any(bch->tx_skb); in tx_birq()
1133 if (dch->tx_skb && dch->tx_idx < dch->tx_skb->len) in tx_dirq()
1134 hfcpci_fill_dfifo(dch->hw); in tx_dirq()
1136 dev_kfree_skb(dch->tx_skb); in tx_dirq()
1138 hfcpci_fill_dfifo(dch->hw); in tx_dirq()
1150 spin_lock(&hc->lock); in hfcpci_int()
1151 if (!(hc->hw.int_m2 & 0x08)) { in hfcpci_int()
1152 spin_unlock(&hc->lock); in hfcpci_int()
1158 if (hc->dch.debug & DEBUG_HW_DCHANNEL) in hfcpci_int()
1160 "HFC-PCI: stat(%02x) s1(%02x)\n", stat, val); in hfcpci_int()
1163 spin_unlock(&hc->lock); in hfcpci_int()
1166 hc->irqcnt++; in hfcpci_int()
1168 if (hc->dch.debug & DEBUG_HW_DCHANNEL) in hfcpci_int()
1169 printk(KERN_DEBUG "HFC-PCI irq %x\n", val); in hfcpci_int()
1170 val &= hc->hw.int_m1; in hfcpci_int()
1173 if (hc->dch.debug & DEBUG_HW_DCHANNEL) in hfcpci_int()
1174 printk(KERN_DEBUG "ph_state chg %d->%d\n", in hfcpci_int()
1175 hc->dch.state, exval); in hfcpci_int()
1176 hc->dch.state = exval; in hfcpci_int()
1177 schedule_event(&hc->dch, FLG_PHCHANGE); in hfcpci_int()
1181 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_int()
1182 if ((--hc->hw.nt_timer) < 0) in hfcpci_int()
1183 schedule_event(&hc->dch, FLG_PHCHANGE); in hfcpci_int()
1186 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | HFCPCI_CLTIMER); in hfcpci_int()
1189 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in hfcpci_int()
1192 else if (hc->dch.debug) in hfcpci_int()
1199 else if (hc->dch.debug) in hfcpci_int()
1203 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in hfcpci_int()
1206 else if (hc->dch.debug) in hfcpci_int()
1213 else if (hc->dch.debug) in hfcpci_int()
1219 if (test_and_clear_bit(FLG_BUSY_TIMER, &hc->dch.Flags)) in hfcpci_int()
1220 timer_delete(&hc->dch.timer); in hfcpci_int()
1221 tx_dirq(&hc->dch); in hfcpci_int()
1223 spin_unlock(&hc->lock); in hfcpci_int()
1228 * timer callback for D-chan busy resolution. Currently no function
1241 struct hfc_pci *hc = bch->hw; in mode_hfcpci()
1245 if (bch->debug & DEBUG_HW_BCHANNEL) in mode_hfcpci()
1247 "HFCPCI bchannel protocol %x-->%x ch %x-->%x\n", in mode_hfcpci()
1248 bch->state, protocol, bch->nr, bc); in mode_hfcpci()
1253 if (!test_bit(HFC_CFG_PCM, &hc->cfg)) in mode_hfcpci()
1260 } else if (test_bit(HFC_CFG_PCM, &hc->cfg) && (protocol > ISDN_P_NONE)) in mode_hfcpci()
1263 if (hc->chanlimit > 1) { in mode_hfcpci()
1264 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1265 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1269 hc->hw.bswapped = 1; /* B1 and B2 exchanged */ in mode_hfcpci()
1270 hc->hw.sctrl_e |= 0x80; in mode_hfcpci()
1272 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1273 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1277 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1278 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1282 case (-1): /* used for init */ in mode_hfcpci()
1283 bch->state = -1; in mode_hfcpci()
1284 bch->nr = bc; in mode_hfcpci()
1287 if (bch->state == ISDN_P_NONE) in mode_hfcpci()
1290 hc->hw.sctrl &= ~SCTRL_B2_ENA; in mode_hfcpci()
1291 hc->hw.sctrl_r &= ~SCTRL_B2_ENA; in mode_hfcpci()
1293 hc->hw.sctrl &= ~SCTRL_B1_ENA; in mode_hfcpci()
1294 hc->hw.sctrl_r &= ~SCTRL_B1_ENA; in mode_hfcpci()
1297 hc->hw.fifo_en &= ~HFCPCI_FIFOEN_B2; in mode_hfcpci()
1298 hc->hw.int_m1 &= ~(HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1301 hc->hw.fifo_en &= ~HFCPCI_FIFOEN_B1; in mode_hfcpci()
1302 hc->hw.int_m1 &= ~(HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1306 if (bch->nr & 2) in mode_hfcpci()
1307 hc->hw.cirm &= 0x7f; in mode_hfcpci()
1309 hc->hw.cirm &= 0xbf; in mode_hfcpci()
1311 bch->state = ISDN_P_NONE; in mode_hfcpci()
1312 bch->nr = bc; in mode_hfcpci()
1313 test_and_clear_bit(FLG_HDLC, &bch->Flags); in mode_hfcpci()
1314 test_and_clear_bit(FLG_TRANSPARENT, &bch->Flags); in mode_hfcpci()
1317 bch->state = protocol; in mode_hfcpci()
1318 bch->nr = bc; in mode_hfcpci()
1322 hc->hw.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1323 hc->hw.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1325 hc->hw.cirm |= 0x80; in mode_hfcpci()
1328 hc->hw.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1329 hc->hw.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1331 hc->hw.cirm |= 0x40; in mode_hfcpci()
1335 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1337 hc->hw.int_m1 |= (HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1339 hc->hw.ctmt |= 2; in mode_hfcpci()
1340 hc->hw.conn &= ~0x18; in mode_hfcpci()
1342 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1344 hc->hw.int_m1 |= (HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1346 hc->hw.ctmt |= 1; in mode_hfcpci()
1347 hc->hw.conn &= ~0x03; in mode_hfcpci()
1349 test_and_set_bit(FLG_TRANSPARENT, &bch->Flags); in mode_hfcpci()
1352 bch->state = protocol; in mode_hfcpci()
1353 bch->nr = bc; in mode_hfcpci()
1357 hc->hw.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1358 hc->hw.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1360 hc->hw.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1361 hc->hw.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1364 hc->hw.last_bfifo_cnt[1] = 0; in mode_hfcpci()
1365 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1366 hc->hw.int_m1 |= (HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1368 hc->hw.ctmt &= ~2; in mode_hfcpci()
1369 hc->hw.conn &= ~0x18; in mode_hfcpci()
1371 hc->hw.last_bfifo_cnt[0] = 0; in mode_hfcpci()
1372 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1373 hc->hw.int_m1 |= (HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1375 hc->hw.ctmt &= ~1; in mode_hfcpci()
1376 hc->hw.conn &= ~0x03; in mode_hfcpci()
1378 test_and_set_bit(FLG_HDLC, &bch->Flags); in mode_hfcpci()
1382 return -ENOPROTOOPT; in mode_hfcpci()
1384 if (test_bit(HFC_CFG_PCM, &hc->cfg)) { in mode_hfcpci()
1386 (protocol == -1)) { /* init case */ in mode_hfcpci()
1390 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) { in mode_hfcpci()
1399 hc->hw.conn &= 0xc7; in mode_hfcpci()
1400 hc->hw.conn |= 0x08; in mode_hfcpci()
1408 hc->hw.conn &= 0xf8; in mode_hfcpci()
1409 hc->hw.conn |= 0x01; in mode_hfcpci()
1418 Write_hfc(hc, HFCPCI_SCTRL_E, hc->hw.sctrl_e); in mode_hfcpci()
1419 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in mode_hfcpci()
1420 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in mode_hfcpci()
1421 Write_hfc(hc, HFCPCI_SCTRL, hc->hw.sctrl); in mode_hfcpci()
1422 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in mode_hfcpci()
1423 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in mode_hfcpci()
1424 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in mode_hfcpci()
1426 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in mode_hfcpci()
1434 struct hfc_pci *hc = bch->hw; in set_hfcpci_rxtest()
1436 if (bch->debug & DEBUG_HW_BCHANNEL) in set_hfcpci_rxtest()
1438 "HFCPCI bchannel test rx protocol %x-->%x ch %x-->%x\n", in set_hfcpci_rxtest()
1439 bch->state, protocol, bch->nr, chan); in set_hfcpci_rxtest()
1440 if (bch->nr != chan) { in set_hfcpci_rxtest()
1443 bch->nr, chan); in set_hfcpci_rxtest()
1444 return -EINVAL; in set_hfcpci_rxtest()
1448 bch->state = protocol; in set_hfcpci_rxtest()
1451 hc->hw.sctrl_r |= SCTRL_B2_ENA; in set_hfcpci_rxtest()
1452 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2RX; in set_hfcpci_rxtest()
1454 hc->hw.int_m1 |= HFCPCI_INTS_B2REC; in set_hfcpci_rxtest()
1455 hc->hw.ctmt |= 2; in set_hfcpci_rxtest()
1456 hc->hw.conn &= ~0x18; in set_hfcpci_rxtest()
1458 hc->hw.cirm |= 0x80; in set_hfcpci_rxtest()
1461 hc->hw.sctrl_r |= SCTRL_B1_ENA; in set_hfcpci_rxtest()
1462 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1RX; in set_hfcpci_rxtest()
1464 hc->hw.int_m1 |= HFCPCI_INTS_B1REC; in set_hfcpci_rxtest()
1465 hc->hw.ctmt |= 1; in set_hfcpci_rxtest()
1466 hc->hw.conn &= ~0x03; in set_hfcpci_rxtest()
1468 hc->hw.cirm |= 0x40; in set_hfcpci_rxtest()
1473 bch->state = protocol; in set_hfcpci_rxtest()
1476 hc->hw.sctrl_r |= SCTRL_B2_ENA; in set_hfcpci_rxtest()
1477 hc->hw.last_bfifo_cnt[1] = 0; in set_hfcpci_rxtest()
1478 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2RX; in set_hfcpci_rxtest()
1479 hc->hw.int_m1 |= HFCPCI_INTS_B2REC; in set_hfcpci_rxtest()
1480 hc->hw.ctmt &= ~2; in set_hfcpci_rxtest()
1481 hc->hw.conn &= ~0x18; in set_hfcpci_rxtest()
1483 hc->hw.sctrl_r |= SCTRL_B1_ENA; in set_hfcpci_rxtest()
1484 hc->hw.last_bfifo_cnt[0] = 0; in set_hfcpci_rxtest()
1485 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1RX; in set_hfcpci_rxtest()
1486 hc->hw.int_m1 |= HFCPCI_INTS_B1REC; in set_hfcpci_rxtest()
1487 hc->hw.ctmt &= ~1; in set_hfcpci_rxtest()
1488 hc->hw.conn &= ~0x03; in set_hfcpci_rxtest()
1493 return -ENOPROTOOPT; in set_hfcpci_rxtest()
1495 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in set_hfcpci_rxtest()
1496 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in set_hfcpci_rxtest()
1497 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in set_hfcpci_rxtest()
1498 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in set_hfcpci_rxtest()
1499 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in set_hfcpci_rxtest()
1501 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in set_hfcpci_rxtest()
1509 struct hfc_pci *hc = bch->hw; in deactivate_bchannel()
1512 spin_lock_irqsave(&hc->lock, flags); in deactivate_bchannel()
1514 mode_hfcpci(bch, bch->nr, ISDN_P_NONE); in deactivate_bchannel()
1515 spin_unlock_irqrestore(&hc->lock, flags); in deactivate_bchannel()
1519 * Layer 1 B-channel hardware access
1530 struct hfc_pci *hc = bch->hw; in hfc_bctrl()
1531 int ret = -EINVAL; in hfc_bctrl()
1534 if (bch->debug & DEBUG_HW) in hfc_bctrl()
1538 spin_lock_irqsave(&hc->lock, flags); in hfc_bctrl()
1540 spin_unlock_irqrestore(&hc->lock, flags); in hfc_bctrl()
1543 spin_lock_irqsave(&hc->lock, flags); in hfc_bctrl()
1545 spin_unlock_irqrestore(&hc->lock, flags); in hfc_bctrl()
1548 spin_lock_irqsave(&hc->lock, flags); in hfc_bctrl()
1549 mode_hfcpci(bch, bch->nr, ISDN_P_NONE); in hfc_bctrl()
1550 spin_unlock_irqrestore(&hc->lock, flags); in hfc_bctrl()
1554 test_and_clear_bit(FLG_OPEN, &bch->Flags); in hfc_bctrl()
1556 ch->protocol = ISDN_P_NONE; in hfc_bctrl()
1557 ch->peer = NULL; in hfc_bctrl()
1572 * Layer2 -> Layer 1 Dchannel data
1579 struct hfc_pci *hc = dch->hw; in hfcpci_l2l1D()
1580 int ret = -EINVAL; in hfcpci_l2l1D()
1585 switch (hh->prim) { in hfcpci_l2l1D()
1587 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1D()
1590 id = hh->id; /* skb can be freed */ in hfcpci_l2l1D()
1591 hfcpci_fill_dfifo(dch->hw); in hfcpci_l2l1D()
1593 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1596 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1599 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1D()
1600 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_l2l1D()
1602 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in hfcpci_l2l1D()
1603 hc->hw.mst_m |= HFCPCI_MASTER; in hfcpci_l2l1D()
1604 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfcpci_l2l1D()
1605 if (test_bit(FLG_ACTIVE, &dch->Flags)) { in hfcpci_l2l1D()
1606 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1607 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in hfcpci_l2l1D()
1611 test_and_set_bit(FLG_L2_ACTIVATED, &dch->Flags); in hfcpci_l2l1D()
1615 ret = l1_event(dch->l1, hh->prim); in hfcpci_l2l1D()
1616 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1619 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); in hfcpci_l2l1D()
1620 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1D()
1621 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_l2l1D()
1627 skb_queue_splice_init(&dch->squeue, &free_queue); in hfcpci_l2l1D()
1628 if (dch->tx_skb) { in hfcpci_l2l1D()
1629 __skb_queue_tail(&free_queue, dch->tx_skb); in hfcpci_l2l1D()
1630 dch->tx_skb = NULL; in hfcpci_l2l1D()
1632 dch->tx_idx = 0; in hfcpci_l2l1D()
1633 if (dch->rx_skb) { in hfcpci_l2l1D()
1634 __skb_queue_tail(&free_queue, dch->rx_skb); in hfcpci_l2l1D()
1635 dch->rx_skb = NULL; in hfcpci_l2l1D()
1637 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in hfcpci_l2l1D()
1638 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in hfcpci_l2l1D()
1639 timer_delete(&dch->timer); in hfcpci_l2l1D()
1641 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) in hfcpci_l2l1D()
1642 dchannel_sched_event(&hc->dch, D_CLEARBUSY); in hfcpci_l2l1D()
1644 hc->hw.mst_m &= ~HFCPCI_MASTER; in hfcpci_l2l1D()
1645 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfcpci_l2l1D()
1647 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1650 ret = l1_event(dch->l1, hh->prim); in hfcpci_l2l1D()
1651 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1661 * Layer2 -> Layer 1 Bchannel data
1667 struct hfc_pci *hc = bch->hw; in hfcpci_l2l1B()
1668 int ret = -EINVAL; in hfcpci_l2l1B()
1672 switch (hh->prim) { in hfcpci_l2l1B()
1674 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1B()
1680 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1B()
1683 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1B()
1684 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) in hfcpci_l2l1B()
1685 ret = mode_hfcpci(bch, bch->nr, ch->protocol); in hfcpci_l2l1B()
1688 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1B()
1713 timer_setup(&hc->dch.timer, hfcpci_dbusy_timer, 0); in inithfcpci()
1714 hc->chanlimit = 2; in inithfcpci()
1715 mode_hfcpci(&hc->bch[0], 1, -1); in inithfcpci()
1716 mode_hfcpci(&hc->bch[1], 2, -1); in inithfcpci()
1729 spin_lock_irqsave(&hc->lock, flags); in init_card()
1731 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1732 if (request_irq(hc->irq, hfcpci_int, IRQF_SHARED, "HFC PCI", hc)) { in init_card()
1734 "mISDN: couldn't get interrupt %d\n", hc->irq); in init_card()
1735 return -EIO; in init_card()
1737 spin_lock_irqsave(&hc->lock, flags); in init_card()
1747 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1752 hc->irq, hc->irqcnt); in init_card()
1754 spin_lock_irqsave(&hc->lock, flags); in init_card()
1755 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in init_card()
1756 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in init_card()
1758 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in init_card()
1759 if (!hc->irqcnt) { in init_card()
1762 "during init %d\n", hc->irq, 4 - cnt); in init_card()
1767 cnt--; in init_card()
1770 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1771 hc->initdone = 1; in init_card()
1776 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1777 free_irq(hc->irq, hc); in init_card()
1778 return -EIO; in init_card()
1787 switch (cq->op) { in channel_ctrl()
1789 cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_CONNECT | in channel_ctrl()
1794 if (cq->channel < 0 || cq->channel > 2) { in channel_ctrl()
1795 ret = -EINVAL; in channel_ctrl()
1798 if (cq->channel & 1) { in channel_ctrl()
1799 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1807 hc->hw.conn = (hc->hw.conn & ~7) | 6; in channel_ctrl()
1808 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1810 if (cq->channel & 2) { in channel_ctrl()
1811 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1819 hc->hw.conn = (hc->hw.conn & ~0x38) | 0x30; in channel_ctrl()
1820 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1822 if (cq->channel & 3) in channel_ctrl()
1823 hc->hw.trm |= 0x80; /* enable IOM-loop */ in channel_ctrl()
1825 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x09; in channel_ctrl()
1826 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1827 hc->hw.trm &= 0x7f; /* disable IOM-loop */ in channel_ctrl()
1829 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in channel_ctrl()
1832 if (cq->channel == cq->p1) { in channel_ctrl()
1833 ret = -EINVAL; in channel_ctrl()
1836 if (cq->channel < 1 || cq->channel > 2 || in channel_ctrl()
1837 cq->p1 < 1 || cq->p1 > 2) { in channel_ctrl()
1838 ret = -EINVAL; in channel_ctrl()
1841 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1849 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1857 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x36; in channel_ctrl()
1858 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1859 hc->hw.trm |= 0x80; in channel_ctrl()
1860 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in channel_ctrl()
1863 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x09; in channel_ctrl()
1864 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1865 hc->hw.trm &= 0x7f; /* disable IOM-loop */ in channel_ctrl()
1868 ret = l1_event(hc->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); in channel_ctrl()
1872 __func__, cq->op); in channel_ctrl()
1873 ret = -EINVAL; in channel_ctrl()
1887 hc->dch.dev.id, __builtin_return_address(0)); in open_dchannel()
1888 if (rq->protocol == ISDN_P_NONE) in open_dchannel()
1889 return -EINVAL; in open_dchannel()
1890 if (rq->adr.channel == 1) { in open_dchannel()
1891 /* TODO: E-Channel */ in open_dchannel()
1892 return -EINVAL; in open_dchannel()
1894 if (!hc->initdone) { in open_dchannel()
1895 if (rq->protocol == ISDN_P_TE_S0) { in open_dchannel()
1896 err = create_l1(&hc->dch, hfc_l1callback); in open_dchannel()
1900 hc->hw.protocol = rq->protocol; in open_dchannel()
1901 ch->protocol = rq->protocol; in open_dchannel()
1906 if (rq->protocol != ch->protocol) { in open_dchannel()
1907 if (hc->hw.protocol == ISDN_P_TE_S0) in open_dchannel()
1908 l1_event(hc->dch.l1, CLOSE_CHANNEL); in open_dchannel()
1909 if (rq->protocol == ISDN_P_TE_S0) { in open_dchannel()
1910 err = create_l1(&hc->dch, hfc_l1callback); in open_dchannel()
1914 hc->hw.protocol = rq->protocol; in open_dchannel()
1915 ch->protocol = rq->protocol; in open_dchannel()
1920 if (((ch->protocol == ISDN_P_NT_S0) && (hc->dch.state == 3)) || in open_dchannel()
1921 ((ch->protocol == ISDN_P_TE_S0) && (hc->dch.state == 7))) { in open_dchannel()
1925 rq->ch = ch; in open_dchannel()
1936 if (rq->adr.channel == 0 || rq->adr.channel > 2) in open_bchannel()
1937 return -EINVAL; in open_bchannel()
1938 if (rq->protocol == ISDN_P_NONE) in open_bchannel()
1939 return -EINVAL; in open_bchannel()
1940 bch = &hc->bch[rq->adr.channel - 1]; in open_bchannel()
1941 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) in open_bchannel()
1942 return -EBUSY; /* b-channel can be only open once */ in open_bchannel()
1943 bch->ch.protocol = rq->protocol; in open_bchannel()
1944 rq->ch = &bch->ch; /* TODO: E-channel */ in open_bchannel()
1958 struct hfc_pci *hc = dch->hw; in hfc_dctrl()
1962 if (dch->debug & DEBUG_HW) in hfc_dctrl()
1968 if ((rq->protocol == ISDN_P_TE_S0) || in hfc_dctrl()
1969 (rq->protocol == ISDN_P_NT_S0)) in hfc_dctrl()
1977 __func__, hc->dch.dev.id, in hfc_dctrl()
1985 if (dch->debug & DEBUG_HW) in hfc_dctrl()
1988 return -EINVAL; in hfc_dctrl()
1998 printk(KERN_INFO "mISDN: HFC-PCI driver %s\n", hfcpci_revision); in setup_hw()
1999 hc->hw.cirm = 0; in setup_hw()
2000 hc->dch.state = 0; in setup_hw()
2001 pci_set_master(hc->pdev); in setup_hw()
2002 if (!hc->irq) { in setup_hw()
2003 printk(KERN_WARNING "HFC-PCI: No IRQ for PCI card found\n"); in setup_hw()
2004 return -EINVAL; in setup_hw()
2006 hc->hw.pci_io = in setup_hw()
2007 (char __iomem *)(unsigned long)hc->pdev->resource[1].start; in setup_hw()
2009 if (!hc->hw.pci_io) { in setup_hw()
2010 printk(KERN_WARNING "HFC-PCI: No IO-Mem for PCI card found\n"); in setup_hw()
2011 return -ENOMEM; in setup_hw()
2015 if (dma_set_mask(&hc->pdev->dev, 0xFFFF8000)) { in setup_hw()
2017 "HFC-PCI: No usable DMA configuration!\n"); in setup_hw()
2018 return -EIO; in setup_hw()
2020 buffer = dma_alloc_coherent(&hc->pdev->dev, 0x8000, &hc->hw.dmahandle, in setup_hw()
2025 "HFC-PCI: Error allocating memory for FIFO!\n"); in setup_hw()
2026 return -ENOMEM; in setup_hw()
2028 hc->hw.fifos = buffer; in setup_hw()
2029 pci_write_config_dword(hc->pdev, 0x80, hc->hw.dmahandle); in setup_hw()
2030 hc->hw.pci_io = ioremap((ulong) hc->hw.pci_io, 256); in setup_hw()
2031 if (unlikely(!hc->hw.pci_io)) { in setup_hw()
2033 "HFC-PCI: Error in ioremap for PCI!\n"); in setup_hw()
2034 dma_free_coherent(&hc->pdev->dev, 0x8000, hc->hw.fifos, in setup_hw()
2035 hc->hw.dmahandle); in setup_hw()
2036 return -ENOMEM; in setup_hw()
2040 "HFC-PCI: defined at mem %#lx fifo %p(%pad) IRQ %d HZ %d\n", in setup_hw()
2041 (u_long) hc->hw.pci_io, hc->hw.fifos, in setup_hw()
2042 &hc->hw.dmahandle, hc->irq, HZ); in setup_hw()
2045 pci_write_config_word(hc->pdev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_hw()
2046 hc->hw.int_m2 = 0; in setup_hw()
2048 hc->hw.int_m1 = 0; in setup_hw()
2049 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in setup_hw()
2052 timer_setup(&hc->hw.timer, hfcpci_Timer, 0); in setup_hw()
2054 test_and_set_bit(HFC_CFG_MASTER, &hc->cfg); in setup_hw()
2062 spin_lock_irqsave(&hc->lock, flags); in release_card()
2063 hc->hw.int_m2 = 0; /* interrupt output off ! */ in release_card()
2065 mode_hfcpci(&hc->bch[0], 1, ISDN_P_NONE); in release_card()
2066 mode_hfcpci(&hc->bch[1], 2, ISDN_P_NONE); in release_card()
2067 if (hc->dch.timer.function != NULL) { in release_card()
2068 timer_delete(&hc->dch.timer); in release_card()
2069 hc->dch.timer.function = NULL; in release_card()
2071 spin_unlock_irqrestore(&hc->lock, flags); in release_card()
2072 if (hc->hw.protocol == ISDN_P_TE_S0) in release_card()
2073 l1_event(hc->dch.l1, CLOSE_CHANNEL); in release_card()
2074 if (hc->initdone) in release_card()
2075 free_irq(hc->irq, hc); in release_card()
2077 mISDN_unregister_device(&hc->dch.dev); in release_card()
2078 mISDN_freebchannel(&hc->bch[1]); in release_card()
2079 mISDN_freebchannel(&hc->bch[0]); in release_card()
2080 mISDN_freedchannel(&hc->dch); in release_card()
2081 pci_set_drvdata(hc->pdev, NULL); in release_card()
2088 int err = -EINVAL; in setup_card()
2092 card->dch.debug = debug; in setup_card()
2093 spin_lock_init(&card->lock); in setup_card()
2094 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, ph_state); in setup_card()
2095 card->dch.hw = card; in setup_card()
2096 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0) | (1 << ISDN_P_NT_S0); in setup_card()
2097 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | in setup_card()
2099 card->dch.dev.D.send = hfcpci_l2l1D; in setup_card()
2100 card->dch.dev.D.ctrl = hfc_dctrl; in setup_card()
2101 card->dch.dev.nrbchan = 2; in setup_card()
2103 card->bch[i].nr = i + 1; in setup_card()
2104 set_channelmap(i + 1, card->dch.dev.channelmap); in setup_card()
2105 card->bch[i].debug = debug; in setup_card()
2106 mISDN_initbchannel(&card->bch[i], MAX_DATA_MEM, poll >> 1); in setup_card()
2107 card->bch[i].hw = card; in setup_card()
2108 card->bch[i].ch.send = hfcpci_l2l1B; in setup_card()
2109 card->bch[i].ch.ctrl = hfc_bctrl; in setup_card()
2110 card->bch[i].ch.nr = i + 1; in setup_card()
2111 list_add(&card->bch[i].ch.list, &card->dch.dev.bchannels); in setup_card()
2116 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-pci.%d", HFC_cnt + 1); in setup_card()
2117 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev, name); in setup_card()
2124 mISDN_freebchannel(&card->bch[1]); in setup_card()
2125 mISDN_freebchannel(&card->bch[0]); in setup_card()
2126 mISDN_freedchannel(&card->dch); in setup_card()
2154 {HFC_BERKOM_TCONCEPT, 0, "German telekom T-Concept"},
2166 {HFC_SITECOM_DC105V2, 0, "Sitecom Connectivity DC-105 ISDN TA"},
2224 int err = -ENOMEM; in hfc_probe()
2226 struct _hfc_map *m = (struct _hfc_map *)ent->driver_data; in hfc_probe()
2233 card->pdev = pdev; in hfc_probe()
2234 card->subtype = m->subtype; in hfc_probe()
2242 m->name, pci_name(pdev)); in hfc_probe()
2244 card->irq = pdev->irq; in hfc_probe()
2281 if (hc->hw.int_m2 & HFCPCI_IRQ_ENABLE) { in _hfcpci_softirq()
2282 spin_lock_irq(&hc->lock); in _hfcpci_softirq()
2283 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in _hfcpci_softirq()
2284 if (bch && bch->state == ISDN_P_B_RAW) { /* B1 rx&tx */ in _hfcpci_softirq()
2288 bch = Sel_BCS(hc, hc->hw.bswapped ? 1 : 2); in _hfcpci_softirq()
2289 if (bch && bch->state == ISDN_P_B_RAW) { /* B2 rx&tx */ in _hfcpci_softirq()
2293 spin_unlock_irq(&hc->lock); in _hfcpci_softirq()
2305 if ((s32)(hfc_jiffies + tics - jiffies) <= 0) in hfcpci_softirq()
2328 err = -EINVAL; in HFC_init()