Lines Matching +full:tx +full:- +full:termination +full:- +full:fix
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * hfcmulti.c low level driver for hfc-4s/hfc-8s/hfc-e1 based cards
7 * Peter Sprenger (sprengermoving-bytes.de)
9 * inspired by existing hfc-pci driver:
10 * Copyright 1999 by Werner Cornelius (werner@isdn-development.de)
22 * Bit 0-7 = 0x00001 = HFC-E1 (1 port)
23 * or Bit 0-7 = 0x00004 = HFC-4S (4 ports)
24 * or Bit 0-7 = 0x00008 = HFC-8S (8 ports)
26 * Bit 9 = 0x00200 = Disable DTMF detect on all B-channels via hardware
38 * example: 0x20204 one HFC-4S with dtmf detection and 128 timeslots on PCM
42 * HFC-4S/HFC-8S only bits:
47 * Bit 2 = 0x004 = Disable E-channel. (No E-channel processing)
48 * example: 0x0001,0x0000,0x0000,0x0000 one HFC-4S with master clock
51 * HFC-E1 only bits:
53 * Bit 1 = 0x0002 = reserved (later for 32 B-channels transparent mode)
58 * Bit 8 = 0x0100 = Turn off CRC-4 Multiframe Mode, use double frame
64 * Bit 12-13 = 0xX000 = elastic jitter buffer (1-3), Set both bits to 0
88 * -1 means no support of PCM bus not even.
93 * NOTE: One dmask value must be given for every HFC-E1 card.
94 * If omitted, the E1 card has D-channel on time slot 16, which is default.
98 * value stands for a B-channel. The bmask may not overlap with dmask or
101 * This will create one fragment with D-channel on slot 1 with
102 * B-channels on slots 2..15, and a second fragment with D-channel
103 * on slot 17 with B-channels on slot 18..31. Slot 16 is unused.
104 * If bit 0 is set (dmask=0x00000001) the D-channel is on slot 0 and will
108 * B-channels.
109 * If no bits are set on bmask, no B-channel is created for that fragment.
110 * Example: dmask=0xfffffffe bmask=0,0,0,0.... (31 0-values for bmask)
111 * This will create 31 ports with one D-channel only.
116 * -> See hfc_multi.h for HFC_IO_MODE_* values
138 * Set to card number starting with 1. Set to -1 to disable.
224 MODULE_DESCRIPTION("mISDN driver for hfc-4s/hfc-8s/hfc-e1 based cards");
243 (hc->HFC_outb(hc, reg, val, __func__, __LINE__))
245 (hc->HFC_outb_nodebug(hc, reg, val, __func__, __LINE__))
247 (hc->HFC_inb(hc, reg, __func__, __LINE__))
249 (hc->HFC_inb_nodebug(hc, reg, __func__, __LINE__))
251 (hc->HFC_inw(hc, reg, __func__, __LINE__))
253 (hc->HFC_inw_nodebug(hc, reg, __func__, __LINE__))
255 (hc->HFC_wait(hc, __func__, __LINE__))
257 (hc->HFC_wait_nodebug(hc, __func__, __LINE__))
259 #define HFC_outb(hc, reg, val) (hc->HFC_outb(hc, reg, val))
260 #define HFC_outb_nodebug(hc, reg, val) (hc->HFC_outb_nodebug(hc, reg, val))
261 #define HFC_inb(hc, reg) (hc->HFC_inb(hc, reg))
262 #define HFC_inb_nodebug(hc, reg) (hc->HFC_inb_nodebug(hc, reg))
263 #define HFC_inw(hc, reg) (hc->HFC_inw(hc, reg))
264 #define HFC_inw_nodebug(hc, reg) (hc->HFC_inw_nodebug(hc, reg))
265 #define HFC_wait(hc) (hc->HFC_wait(hc))
266 #define HFC_wait_nodebug(hc) (hc->HFC_wait_nodebug(hc))
282 writeb(val, hc->pci_membase + reg); in HFC_outb_pcimem()
291 return readb(hc->pci_membase + reg); in HFC_inb_pcimem()
300 return readw(hc->pci_membase + reg); in HFC_inw_pcimem()
309 while (readb(hc->pci_membase + R_STATUS) & V_BUSY) in HFC_wait_pcimem()
322 outb(reg, hc->pci_iobase + 4); in HFC_outb_regio()
323 outb(val, hc->pci_iobase); in HFC_outb_regio()
332 outb(reg, hc->pci_iobase + 4); in HFC_inb_regio()
333 return inb(hc->pci_iobase); in HFC_inb_regio()
342 outb(reg, hc->pci_iobase + 4); in HFC_inw_regio()
343 return inw(hc->pci_iobase); in HFC_inw_regio()
352 outb(R_STATUS, hc->pci_iobase + 4); in HFC_wait_regio()
353 while (inb(hc->pci_iobase) & V_BUSY) in HFC_wait_regio()
365 i = -1; in HFC_outb_debug()
383 hc->id, reg, regname, val, bits, function, line); in HFC_outb_debug()
413 hc->id, reg, regname, val, bits, function, line); in HFC_inb_debug()
435 hc->id, reg, regname, val, function, line); in HFC_inw_debug()
442 hc->id, function, line); in HFC_wait_debug()
451 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4); in write_fifo_regio()
453 outl(cpu_to_le32(*(u32 *)data), hc->pci_iobase); in write_fifo_regio()
455 len -= 4; in write_fifo_regio()
458 outw(cpu_to_le16(*(u16 *)data), hc->pci_iobase); in write_fifo_regio()
460 len -= 2; in write_fifo_regio()
463 outb(*data, hc->pci_iobase); in write_fifo_regio()
465 len--; in write_fifo_regio()
474 hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
476 len -= 4; in write_fifo_pcimem()
480 hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
482 len -= 2; in write_fifo_pcimem()
485 writeb(*data, hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
487 len--; in write_fifo_pcimem()
495 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4); in read_fifo_regio()
497 *(u32 *)data = le32_to_cpu(inl(hc->pci_iobase)); in read_fifo_regio()
499 len -= 4; in read_fifo_regio()
502 *(u16 *)data = le16_to_cpu(inw(hc->pci_iobase)); in read_fifo_regio()
504 len -= 2; in read_fifo_regio()
507 *data = inb(hc->pci_iobase); in read_fifo_regio()
509 len--; in read_fifo_regio()
519 le32_to_cpu(readl(hc->pci_membase + A_FIFO_DATA0)); in read_fifo_pcimem()
521 len -= 4; in read_fifo_pcimem()
525 le16_to_cpu(readw(hc->pci_membase + A_FIFO_DATA0)); in read_fifo_pcimem()
527 len -= 2; in read_fifo_pcimem()
530 *data = readb(hc->pci_membase + A_FIFO_DATA0); in read_fifo_pcimem()
532 len--; in read_fifo_pcimem()
539 hc->hw.r_irq_ctrl |= V_GLOB_IRQ_EN; in enable_hwirq()
540 HFC_outb(hc, R_IRQ_CTRL, hc->hw.r_irq_ctrl); in enable_hwirq()
546 hc->hw.r_irq_ctrl &= ~((u_char)V_GLOB_IRQ_EN); in disable_hwirq()
547 HFC_outb(hc, R_IRQ_CTRL, hc->hw.r_irq_ctrl); in disable_hwirq()
572 if (!hc->pci_iobase) in readpcibridge()
585 outw(cipv, hc->pci_iobase + 4); in readpcibridge()
586 data = inb(hc->pci_iobase); in readpcibridge()
600 if (!hc->pci_iobase) in writepcibridge()
609 outw(cipv, hc->pci_iobase + 4); in writepcibridge()
621 outl(datav, hc->pci_iobase); in writepcibridge()
722 /* Setup TDM path - sets fsync and tdm_clk as inputs */ in vpm_init()
736 vpm_out(wc, x, 0x33 - i, (mask >> (i << 3)) & 0xff); in vpm_init()
739 printk(KERN_DEBUG "VPM: A-law mode\n"); in vpm_init()
758 * reference at link-time. in vpm_init()
814 struct bchannel *bch = hc->chan[ch].bch; in vpm_echocan_on()
816 int txadj = -4; in vpm_echocan_on()
819 if (hc->chan[ch].protocol != ISDN_P_B_RAW) in vpm_echocan_on()
846 struct bchannel *bch = hc->chan[ch].bch; in vpm_echocan_off()
852 if (hc->chan[ch].protocol != ISDN_P_B_RAW) in vpm_echocan_off()
902 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_resync()
903 if (hc->syncronized) { in hfcmulti_resync()
913 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_resync()
914 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
918 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { in hfcmulti_resync()
920 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_resync()
924 hc->e1_resync |= 1; /* get SYNC_I */ in hfcmulti_resync()
934 "interface.\n", hc->id, hc); in hfcmulti_resync()
936 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
941 if (hc->ctype == HFC_TYPE_E1 in hfcmulti_resync()
942 && !test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) { in hfcmulti_resync()
945 hc->e1_resync |= 2; /* switch to jatt */ in hfcmulti_resync()
953 "with QUARTZ\n", hc->id, hc); in hfcmulti_resync()
954 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_resync()
959 "Schedule QUARTZ for HFC-E1\n"); in hfcmulti_resync()
960 hc->e1_resync |= 4; /* switch quartz */ in hfcmulti_resync()
965 "enabled by HFC-%dS\n", hc->ctype); in hfcmulti_resync()
967 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
986 if (hc->syncronized) { in plxsd_checksync()
990 " (id=%d)\n", __func__, hc->id + 1, in plxsd_checksync()
991 hc->id); in plxsd_checksync()
998 " (id=%d)\n", __func__, hc->id + 1, in plxsd_checksync()
999 hc->id); in plxsd_checksync()
1020 hc->hw.r_cirm |= V_SRES; in release_io_hfcmulti()
1021 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in release_io_hfcmulti()
1023 hc->hw.r_cirm &= ~V_SRES; in release_io_hfcmulti()
1024 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in release_io_hfcmulti()
1028 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && hc->plx_membase) { in release_io_hfcmulti()
1031 __func__, hc->id + 1); in release_io_hfcmulti()
1033 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in release_io_hfcmulti()
1036 /* Termination off */ in release_io_hfcmulti()
1052 test_and_clear_bit(HFC_CHIP_PLXSD, &hc->chip); /* prevent resync */ in release_io_hfcmulti()
1053 if (hc->pci_dev) in release_io_hfcmulti()
1054 pci_write_config_word(hc->pci_dev, PCI_COMMAND, 0); in release_io_hfcmulti()
1055 if (hc->pci_membase) in release_io_hfcmulti()
1056 iounmap(hc->pci_membase); in release_io_hfcmulti()
1057 if (hc->plx_membase) in release_io_hfcmulti()
1058 iounmap(hc->plx_membase); in release_io_hfcmulti()
1059 if (hc->pci_iobase) in release_io_hfcmulti()
1060 release_region(hc->pci_iobase, 8); in release_io_hfcmulti()
1061 if (hc->xhfc_membase) in release_io_hfcmulti()
1062 iounmap((void *)hc->xhfc_membase); in release_io_hfcmulti()
1064 if (hc->pci_dev) { in release_io_hfcmulti()
1065 pci_disable_device(hc->pci_dev); in release_io_hfcmulti()
1066 pci_set_drvdata(hc->pci_dev, NULL); in release_io_hfcmulti()
1089 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1091 memset(&hc->hw, 0, sizeof(struct hfcm_hw)); in init_chip()
1100 err = -EIO; in init_chip()
1106 val, rev, (rev == 0 && (hc->ctype != HFC_TYPE_XHFC)) ? in init_chip()
1108 if (hc->ctype != HFC_TYPE_XHFC && rev == 0) { in init_chip()
1109 test_and_set_bit(HFC_CHIP_REVISION0, &hc->chip); in init_chip()
1123 /* set s-ram size */ in init_chip()
1124 hc->Flen = 0x10; in init_chip()
1125 hc->Zmin = 0x80; in init_chip()
1126 hc->Zlen = 384; in init_chip()
1127 hc->DTMFbase = 0x1000; in init_chip()
1128 if (test_bit(HFC_CHIP_EXRAM_128, &hc->chip)) { in init_chip()
1132 hc->hw.r_ctrl |= V_EXT_RAM; in init_chip()
1133 hc->hw.r_ram_sz = 1; in init_chip()
1134 hc->Flen = 0x20; in init_chip()
1135 hc->Zmin = 0xc0; in init_chip()
1136 hc->Zlen = 1856; in init_chip()
1137 hc->DTMFbase = 0x2000; in init_chip()
1139 if (test_bit(HFC_CHIP_EXRAM_512, &hc->chip)) { in init_chip()
1143 hc->hw.r_ctrl |= V_EXT_RAM; in init_chip()
1144 hc->hw.r_ram_sz = 2; in init_chip()
1145 hc->Flen = 0x20; in init_chip()
1146 hc->Zmin = 0xc0; in init_chip()
1147 hc->Zlen = 8000; in init_chip()
1148 hc->DTMFbase = 0x2000; in init_chip()
1150 if (hc->ctype == HFC_TYPE_XHFC) { in init_chip()
1151 hc->Flen = 0x8; in init_chip()
1152 hc->Zmin = 0x0; in init_chip()
1153 hc->Zlen = 64; in init_chip()
1154 hc->DTMFbase = 0x0; in init_chip()
1156 hc->max_trans = poll << 1; in init_chip()
1157 if (hc->max_trans > hc->Zlen) in init_chip()
1158 hc->max_trans = hc->Zlen; in init_chip()
1161 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1164 __func__, hc->id + 1); in init_chip()
1166 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1184 * termination of last PLXSD card off. in init_chip()
1190 if (test_bit(HFC_CHIP_PLXSD, &pos->chip)) { in init_chip()
1199 "we disable termination\n", in init_chip()
1200 __func__, plx_last_hc->id + 1); in init_chip()
1202 plx_acc_32 = plx_last_hc->plx_membase + PLX_GPIOC; in init_chip()
1213 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ in init_chip()
1216 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1217 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ in init_chip()
1219 /* we only want the real Z2 read-pointer for revision > 0 */ in init_chip()
1220 if (!test_bit(HFC_CHIP_REVISION0, &hc->chip)) in init_chip()
1221 hc->hw.r_ram_sz |= V_FZ_MD; in init_chip()
1224 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_chip()
1229 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) && !plxsd_master) { in init_chip()
1233 hc->hw.r_pcm_md0 |= V_PCM_MD; in init_chip()
1241 HFC_outb(hc, R_CTRL, hc->hw.r_ctrl); in init_chip()
1242 if (hc->ctype == HFC_TYPE_XHFC) in init_chip()
1244 0x11 /* 16 Bytes TX/RX */); in init_chip()
1246 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); in init_chip()
1248 if (hc->ctype == HFC_TYPE_XHFC) in init_chip()
1249 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES; in init_chip()
1251 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES in init_chip()
1253 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in init_chip()
1255 hc->hw.r_cirm = 0; in init_chip()
1256 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in init_chip()
1258 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1259 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); in init_chip()
1262 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1264 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1267 if (hc->hw.r_pcm_md0 & V_PCM_MD) { in init_chip()
1285 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x90); in init_chip()
1286 if (hc->slots == 32) in init_chip()
1288 if (hc->slots == 64) in init_chip()
1290 if (hc->slots == 128) in init_chip()
1292 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0xa0); in init_chip()
1293 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in init_chip()
1295 else if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1299 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); in init_chip()
1303 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1305 hc->slot_owner[i] = -1; in init_chip()
1309 if (test_bit(HFC_CHIP_CLOCK2, &hc->chip)) { in init_chip()
1316 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1320 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in init_chip()
1335 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1338 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1347 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) in init_chip()
1350 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) in init_chip()
1353 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in init_chip()
1359 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { in init_chip()
1363 err = -EIO; in init_chip()
1366 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_chip()
1371 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) in init_chip()
1376 err = -EIO; in init_chip()
1380 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1382 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1392 hc->hw.r_pcm_md0 |= V_PCM_MD; in init_chip()
1393 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); in init_chip()
1394 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1397 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1405 &hc->chip); in init_chip()
1414 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1415 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) in init_chip()
1418 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1429 if (hc->pcm) in init_chip()
1431 hc->pcm); in init_chip()
1433 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) in init_chip()
1434 || test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1437 hc->pcm = PCM_cnt; in init_chip()
1439 "(auto selected)\n", hc->pcm); in init_chip()
1444 hc->hw.r_irqmsk_misc |= V_TI_IRQMSK; in init_chip()
1447 if (hc->ctype == HFC_TYPE_E1) in init_chip()
1448 hc->hw.r_irqmsk_misc |= V_STA_IRQMSK; in init_chip()
1451 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) { in init_chip()
1454 "for all B-channel\n", __func__); in init_chip()
1455 hc->hw.r_dtmf = V_DTMF_EN | V_DTMF_STOP; in init_chip()
1456 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) in init_chip()
1457 hc->hw.r_dtmf |= V_ULAW_SEL; in init_chip()
1458 HFC_outb(hc, R_DTMF_N, 102 - 1); in init_chip()
1459 hc->hw.r_irqmsk_misc |= V_DTMF_IRQMSK; in init_chip()
1463 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) in init_chip()
1467 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1471 switch (hc->leds) { in init_chip()
1472 case 1: /* HFC-E1 OEM */ in init_chip()
1473 if (test_bit(HFC_CHIP_WATCHDOG, &hc->chip)) in init_chip()
1484 case 2: /* HFC-4S OEM */ in init_chip()
1492 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) { in init_chip()
1493 hc->hw.r_st_sync = 0x10; /* V_AUTO_SYNCI */ in init_chip()
1494 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); in init_chip()
1498 if (hc->masterclk >= 0) { in init_chip()
1502 __func__, hc->masterclk, hc->ports - 1); in init_chip()
1503 hc->hw.r_st_sync |= (hc->masterclk | V_AUTO_SYNC); in init_chip()
1504 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); in init_chip()
1510 HFC_outb(hc, R_IRQMSK_MISC, hc->hw.r_irqmsk_misc); in init_chip()
1513 hc->hw.r_irqmsk_misc); in init_chip()
1535 printk(KERN_DEBUG "aborting - %d RAM access errors\n", err); in init_chip()
1536 err = -EIO; in init_chip()
1543 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1554 hc->wdcount++; in hfcmulti_watchdog()
1556 if (hc->wdcount > 10) { in hfcmulti_watchdog()
1557 hc->wdcount = 0; in hfcmulti_watchdog()
1558 hc->wdbyte = hc->wdbyte == V_GPIO_OUT2 ? in hfcmulti_watchdog()
1561 /* printk("Sending Watchdog Kill %x\n",hc->wdbyte); */ in hfcmulti_watchdog()
1563 HFC_outb(hc, R_GPIO_OUT0, hc->wdbyte); in hfcmulti_watchdog()
1581 switch (hc->leds) { in hfcmulti_leds()
1582 case 1: /* HFC-E1 OEM */ in hfcmulti_leds()
1586 * 1st green flashing: activity on TX in hfcmulti_leds()
1593 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_leds()
1595 if (hc->chan[hc->dnum[0]].los) in hfcmulti_leds()
1597 if (hc->e1_state != 1) { in hfcmulti_leds()
1599 hc->flash[2] = 0; in hfcmulti_leds()
1600 hc->flash[3] = 0; in hfcmulti_leds()
1604 if (!hc->flash[2] && hc->activity_tx) in hfcmulti_leds()
1605 hc->flash[2] = poll; in hfcmulti_leds()
1606 if (!hc->flash[3] && hc->activity_rx) in hfcmulti_leds()
1607 hc->flash[3] = poll; in hfcmulti_leds()
1608 if (hc->flash[2] && hc->flash[2] < 1024) in hfcmulti_leds()
1610 if (hc->flash[3] && hc->flash[3] < 1024) in hfcmulti_leds()
1612 if (hc->flash[2] >= 2048) in hfcmulti_leds()
1613 hc->flash[2] = 0; in hfcmulti_leds()
1614 if (hc->flash[3] >= 2048) in hfcmulti_leds()
1615 hc->flash[3] = 0; in hfcmulti_leds()
1616 if (hc->flash[2]) in hfcmulti_leds()
1617 hc->flash[2] += poll; in hfcmulti_leds()
1618 if (hc->flash[3]) in hfcmulti_leds()
1619 hc->flash[3] += poll; in hfcmulti_leds()
1624 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1626 hc->ledstate = leds; in hfcmulti_leds()
1630 case 2: /* HFC-4S OEM */ in hfcmulti_leds()
1633 * green flashing: activity on TX in hfcmulti_leds()
1637 active = -1; in hfcmulti_leds()
1638 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1640 state = dch->state; in hfcmulti_leds()
1641 if (dch->dev.D.protocol == ISDN_P_NT_S0) in hfcmulti_leds()
1649 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1650 if (!hc->flash[i] && in hfcmulti_leds()
1651 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1652 hc->flash[i] = poll; in hfcmulti_leds()
1653 if (hc->flash[i] && hc->flash[i] < 1024) in hfcmulti_leds()
1655 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1656 hc->flash[i] = 0; in hfcmulti_leds()
1657 if (hc->flash[i]) in hfcmulti_leds()
1658 hc->flash[i] += poll; in hfcmulti_leds()
1661 hc->flash[i] = 0; in hfcmulti_leds()
1666 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in hfcmulti_leds()
1677 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1679 hc->ledstate = leds; in hfcmulti_leds()
1686 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1689 hc->ledstate = leds; in hfcmulti_leds()
1697 * green flashing: activity on TX in hfcmulti_leds()
1701 active = -1; in hfcmulti_leds()
1702 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1704 state = dch->state; in hfcmulti_leds()
1705 if (dch->dev.D.protocol == ISDN_P_NT_S0) in hfcmulti_leds()
1713 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1714 if (!hc->flash[i] && in hfcmulti_leds()
1715 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1716 hc->flash[i] = poll; in hfcmulti_leds()
1717 if (hc->flash[i] < 1024) in hfcmulti_leds()
1719 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1720 hc->flash[i] = 0; in hfcmulti_leds()
1721 if (hc->flash[i]) in hfcmulti_leds()
1722 hc->flash[i] += poll; in hfcmulti_leds()
1725 hc->flash[i] = 0; in hfcmulti_leds()
1732 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1737 hc->ledstate = leds; in hfcmulti_leds()
1743 * flashing: activity on TX in hfcmulti_leds()
1748 active = -1; in hfcmulti_leds()
1749 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1751 state = dch->state; in hfcmulti_leds()
1752 if (dch->dev.D.protocol == ISDN_P_NT_S0) in hfcmulti_leds()
1760 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1761 if (!hc->flash[i] && in hfcmulti_leds()
1762 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1763 hc->flash[i] = poll; in hfcmulti_leds()
1764 if (hc->flash[i] < 1024) in hfcmulti_leds()
1766 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1767 hc->flash[i] = 0; in hfcmulti_leds()
1768 if (hc->flash[i]) in hfcmulti_leds()
1769 hc->flash[i] += poll; in hfcmulti_leds()
1771 hc->flash[i] = 0; in hfcmulti_leds()
1775 if (leddw != hc->ledstate) { in hfcmulti_leds()
1780 outw(0x4000, hc->pci_iobase + 4); in hfcmulti_leds()
1781 outl(leddw, hc->pci_iobase); in hfcmulti_leds()
1783 hc->ledstate = leddw; in hfcmulti_leds()
1787 hc->activity_tx = 0; in hfcmulti_leds()
1788 hc->activity_rx = 0; in hfcmulti_leds()
1811 /* only process enabled B-channels */ in hfcmulti_dtmf()
1812 bch = hc->chan[ch].bch; in hfcmulti_dtmf()
1815 if (!hc->created[hc->chan[ch].port]) in hfcmulti_dtmf()
1817 if (!test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcmulti_dtmf()
1822 coeff = &(hc->chan[ch].coeff[hc->chan[ch].coeff_count * 16]); in hfcmulti_dtmf()
1825 /* read W(n-1) coefficient */ in hfcmulti_dtmf()
1826 addr = hc->DTMFbase + ((co << 7) | (ch << 2)); in hfcmulti_dtmf()
1843 mantissa <<= (exponent - 1); in hfcmulti_dtmf()
1862 mantissa <<= (exponent - 1); in hfcmulti_dtmf()
1873 hc->chan[ch].coeff_count++; in hfcmulti_dtmf()
1874 if (hc->chan[ch].coeff_count == 8) { in hfcmulti_dtmf()
1875 hc->chan[ch].coeff_count = 0; in hfcmulti_dtmf()
1883 hh->prim = PH_CONTROL_IND; in hfcmulti_dtmf()
1884 hh->id = DTMF_HFC_COEF; in hfcmulti_dtmf()
1885 skb_put_data(skb, hc->chan[ch].coeff, 512); in hfcmulti_dtmf()
1891 hc->dtmf = dtmf; in hfcmulti_dtmf()
1893 HFC_outb_nodebug(hc, R_DTMF, hc->hw.r_dtmf | V_RST_DTMF); in hfcmulti_dtmf()
1914 bch = hc->chan[ch].bch; in hfcmulti_tx()
1915 dch = hc->chan[ch].dch; in hfcmulti_tx()
1919 txpending = &hc->chan[ch].txpending; in hfcmulti_tx()
1920 slot_tx = hc->chan[ch].slot_tx; in hfcmulti_tx()
1922 if (!test_bit(FLG_ACTIVE, &dch->Flags)) in hfcmulti_tx()
1924 sp = &dch->tx_skb; in hfcmulti_tx()
1925 idxp = &dch->tx_idx; in hfcmulti_tx()
1927 if (!test_bit(FLG_ACTIVE, &bch->Flags)) in hfcmulti_tx()
1929 sp = &bch->tx_skb; in hfcmulti_tx()
1930 idxp = &bch->tx_idx; in hfcmulti_tx()
1933 len = (*sp)->len; in hfcmulti_tx()
1938 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in hfcmulti_tx()
1939 (hc->chan[ch].protocol == ISDN_P_B_RAW) && in hfcmulti_tx()
1940 (hc->chan[ch].slot_rx < 0) && in hfcmulti_tx()
1941 (hc->chan[ch].slot_tx < 0)) in hfcmulti_tx()
1955 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_tx()
1962 __func__, hc->id + 1, temp, f2); in hfcmulti_tx()
1965 Fspace = f2 - f1 - 1; in hfcmulti_tx()
1967 Fspace += hc->Flen; in hfcmulti_tx()
1974 if (test_bit(HFC_CHIP_REVISION0, &hc->chip)) { in hfcmulti_tx()
1980 /* one frame only for ST D-channels, to allow resending */ in hfcmulti_tx()
1981 if (hc->ctype != HFC_TYPE_E1 && dch) { in hfcmulti_tx()
1985 /* F-counter full condition */ in hfcmulti_tx()
1989 z1 = HFC_inw_nodebug(hc, A_Z1) - hc->Zmin; in hfcmulti_tx()
1990 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; in hfcmulti_tx()
1991 while (z2 != (temp = (HFC_inw_nodebug(hc, A_Z2) - hc->Zmin))) { in hfcmulti_tx()
1994 "%d!=%d\n", __func__, hc->id + 1, temp, z2); in hfcmulti_tx()
1997 hc->chan[ch].Zfill = z1 - z2; in hfcmulti_tx()
1998 if (hc->chan[ch].Zfill < 0) in hfcmulti_tx()
1999 hc->chan[ch].Zfill += hc->Zlen; in hfcmulti_tx()
2000 Zspace = z2 - z1; in hfcmulti_tx()
2002 Zspace += hc->Zlen; in hfcmulti_tx()
2003 Zspace -= 4; /* keep not too full, so pointers will not overrun */ in hfcmulti_tx()
2005 if (bch && test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcmulti_tx()
2006 Zspace = Zspace - hc->Zlen + hc->max_trans; in hfcmulti_tx()
2014 if (bch && (!test_bit(FLG_HDLC, &bch->Flags)) && in hfcmulti_tx()
2023 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2032 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2048 if (bch && test_bit(FLG_FILLEMPTY, &bch->Flags) in hfcmulti_tx()
2049 && !test_bit(FLG_HDLC, &bch->Flags) && z2 == z1) { in hfcmulti_tx()
2054 hc->write_fifo(hc, hc->silence_data, poll >> 1); in hfcmulti_tx()
2055 Zspace -= (poll >> 1); in hfcmulti_tx()
2059 if (bch && (!test_bit(FLG_HDLC, &bch->Flags)) && (!*txpending) in hfcmulti_tx()
2066 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2075 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2089 hc->activity_tx |= 1 << hc->chan[ch].port; in hfcmulti_tx()
2093 if (dch || test_bit(FLG_HDLC, &bch->Flags)) in hfcmulti_tx()
2098 d = (*sp)->data + i; in hfcmulti_tx()
2099 if (ii - i > Zspace) in hfcmulti_tx()
2104 __func__, hc->id + 1, ch, Zspace, z1, z2, ii-i, len-i, in hfcmulti_tx()
2108 hc->write_fifo(hc, d, ii - i); in hfcmulti_tx()
2109 hc->chan[ch].Zfill += ii - i; in hfcmulti_tx()
2119 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_tx()
2120 /* increment f-counter */ in hfcmulti_tx()
2125 tmp_len = (*sp)->len; in hfcmulti_tx()
2142 if (bch && test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcmulti_tx()
2143 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in hfcmulti_tx()
2160 bch = hc->chan[ch].bch; in hfcmulti_rx()
2162 if (!test_bit(FLG_ACTIVE, &bch->Flags)) in hfcmulti_rx()
2164 } else if (hc->chan[ch].dch) { in hfcmulti_rx()
2165 dch = hc->chan[ch].dch; in hfcmulti_rx()
2166 if (!test_bit(FLG_ACTIVE, &dch->Flags)) in hfcmulti_rx()
2174 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in hfcmulti_rx()
2175 (hc->chan[ch].protocol == ISDN_P_B_RAW) && in hfcmulti_rx()
2176 (hc->chan[ch].slot_rx < 0) && in hfcmulti_rx()
2177 (hc->chan[ch].slot_tx < 0)) in hfcmulti_rx()
2183 /* ignore if rx is off BUT change fifo (above) to start pending TX */ in hfcmulti_rx()
2184 if (hc->chan[ch].rx_off) { in hfcmulti_rx()
2186 bch->dropcnt += poll; /* not exact but fair enough */ in hfcmulti_rx()
2190 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_rx()
2196 __func__, hc->id + 1, temp, f1); in hfcmulti_rx()
2201 z1 = HFC_inw_nodebug(hc, A_Z1) - hc->Zmin; in hfcmulti_rx()
2202 while (z1 != (temp = (HFC_inw_nodebug(hc, A_Z1) - hc->Zmin))) { in hfcmulti_rx()
2205 "%d!=%d\n", __func__, hc->id + 1, temp, z2); in hfcmulti_rx()
2208 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; in hfcmulti_rx()
2209 Zsize = z1 - z2; in hfcmulti_rx()
2210 if ((dch || test_bit(FLG_HDLC, &bch->Flags)) && f1 != f2) in hfcmulti_rx()
2214 Zsize += hc->Zlen; in hfcmulti_rx()
2223 hc->id + 1, bch->nr, Zsize); in hfcmulti_rx()
2226 sp = &bch->rx_skb; in hfcmulti_rx()
2227 maxlen = bch->maxlen; in hfcmulti_rx()
2229 sp = &dch->rx_skb; in hfcmulti_rx()
2230 maxlen = dch->maxlen + 3; in hfcmulti_rx()
2235 hc->id + 1); in hfcmulti_rx()
2242 hc->activity_rx |= 1 << hc->chan[ch].port; in hfcmulti_rx()
2245 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_rx()
2249 "got=%d (again %d)\n", __func__, hc->id + 1, ch, in hfcmulti_rx()
2251 f1, f2, Zsize + (*sp)->len, again); in hfcmulti_rx()
2253 if ((Zsize + (*sp)->len) > maxlen) { in hfcmulti_rx()
2256 "%s(card %d): hdlc-frame too large.\n", in hfcmulti_rx()
2257 __func__, hc->id + 1); in hfcmulti_rx()
2264 hc->read_fifo(hc, skb_put(*sp, Zsize), Zsize); in hfcmulti_rx()
2267 /* increment Z2,F2-counter */ in hfcmulti_rx()
2271 if ((*sp)->len < 4) { in hfcmulti_rx()
2275 "size\n", __func__, hc->id + 1); in hfcmulti_rx()
2280 if ((*sp)->data[(*sp)->len - 1]) { in hfcmulti_rx()
2283 "%s: CRC-error\n", __func__); in hfcmulti_rx()
2287 skb_trim(*sp, (*sp)->len - 3); in hfcmulti_rx()
2288 if ((*sp)->len < MISDN_COPY_SIZE) { in hfcmulti_rx()
2290 *sp = mI_alloc_skb(skb->len, GFP_ATOMIC); in hfcmulti_rx()
2292 skb_put_data(*sp, skb->data, skb->len); in hfcmulti_rx()
2305 __func__, hc->id + 1); in hfcmulti_rx()
2307 while (temp < (*sp)->len) in hfcmulti_rx()
2308 printk(" %02x", (*sp)->data[temp++]); in hfcmulti_rx()
2322 hc->read_fifo(hc, skb_put(*sp, Zsize), Zsize); in hfcmulti_rx()
2327 __func__, hc->id + 1, ch, Zsize, z1, z2); in hfcmulti_rx()
2329 recv_Bchannel(bch, hc->chan[ch].Zfill, false); in hfcmulti_rx()
2363 if (hc->e1_resync) { in handle_timer_irq()
2366 if (hc->e1_resync & 1) { in handle_timer_irq()
2371 if (test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) in handle_timer_irq()
2374 if (hc->e1_resync & 2) { in handle_timer_irq()
2379 if (hc->e1_resync & 4) { in handle_timer_irq()
2382 "Enable QUARTZ for HFC-E1\n"); in handle_timer_irq()
2389 hc->e1_resync = 0; in handle_timer_irq()
2393 if (hc->ctype != HFC_TYPE_E1 || hc->e1_state == 1) in handle_timer_irq()
2395 if (hc->created[hc->chan[ch].port]) { in handle_timer_irq()
2397 /* fifo is started when switching to rx-fifo */ in handle_timer_irq()
2399 if (hc->chan[ch].dch && in handle_timer_irq()
2400 hc->chan[ch].nt_timer > -1) { in handle_timer_irq()
2401 dch = hc->chan[ch].dch; in handle_timer_irq()
2402 if (!(--hc->chan[ch].nt_timer)) { in handle_timer_irq()
2411 dch->state); in handle_timer_irq()
2416 if (hc->ctype == HFC_TYPE_E1 && hc->created[0]) { in handle_timer_irq()
2417 dch = hc->chan[hc->dnum[0]].dch; in handle_timer_irq()
2420 hc->chan[hc->dnum[0]].los = temp; in handle_timer_irq()
2421 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2422 if (!temp && hc->chan[hc->dnum[0]].los) in handle_timer_irq()
2425 if (temp && !hc->chan[hc->dnum[0]].los) in handle_timer_irq()
2429 if (test_bit(HFC_CFG_REPORT_AIS, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2432 if (!temp && hc->chan[hc->dnum[0]].ais) in handle_timer_irq()
2435 if (temp && !hc->chan[hc->dnum[0]].ais) in handle_timer_irq()
2438 hc->chan[hc->dnum[0]].ais = temp; in handle_timer_irq()
2440 if (test_bit(HFC_CFG_REPORT_SLIP, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2443 if (!temp && hc->chan[hc->dnum[0]].slip_rx) in handle_timer_irq()
2446 hc->chan[hc->dnum[0]].slip_rx = temp; in handle_timer_irq()
2448 if (!temp && hc->chan[hc->dnum[0]].slip_tx) in handle_timer_irq()
2450 " bit SLIP detected TX"); in handle_timer_irq()
2451 hc->chan[hc->dnum[0]].slip_tx = temp; in handle_timer_irq()
2453 if (test_bit(HFC_CFG_REPORT_RDI, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2456 if (!temp && hc->chan[hc->dnum[0]].rdi) in handle_timer_irq()
2459 if (temp && !hc->chan[hc->dnum[0]].rdi) in handle_timer_irq()
2462 hc->chan[hc->dnum[0]].rdi = temp; in handle_timer_irq()
2465 switch (hc->chan[hc->dnum[0]].sync) { in handle_timer_irq()
2472 __func__, hc->id); in handle_timer_irq()
2474 hc->chan[hc->dnum[0]].jitter | V_RX_INIT); in handle_timer_irq()
2476 hc->chan[hc->dnum[0]].jitter | V_RX_INIT); in handle_timer_irq()
2477 hc->chan[hc->dnum[0]].sync = 1; in handle_timer_irq()
2487 __func__, hc->id); in handle_timer_irq()
2488 hc->chan[hc->dnum[0]].sync = 0; in handle_timer_irq()
2498 __func__, hc->id); in handle_timer_irq()
2499 hc->chan[hc->dnum[0]].sync = 2; in handle_timer_irq()
2508 __func__, hc->id); in handle_timer_irq()
2509 hc->chan[hc->dnum[0]].sync = 0; in handle_timer_irq()
2518 __func__, hc->id); in handle_timer_irq()
2519 hc->chan[hc->dnum[0]].sync = 1; in handle_timer_irq()
2525 if (test_bit(HFC_CHIP_WATCHDOG, &hc->chip)) in handle_timer_irq()
2528 if (hc->leds) in handle_timer_irq()
2542 if (hc->chan[ch].dch) { in ph_state_irq()
2543 dch = hc->chan[ch].dch; in ph_state_irq()
2546 hc->chan[ch].port); in ph_state_irq()
2561 /* Speech Design TE-sync indication */ in ph_state_irq()
2562 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && in ph_state_irq()
2563 dch->dev.D.protocol == ISDN_P_TE_S0) { in ph_state_irq()
2565 hc->syncronized |= in ph_state_irq()
2566 (1 << hc->chan[ch].port); in ph_state_irq()
2568 hc->syncronized &= in ph_state_irq()
2569 ~(1 << hc->chan[ch].port); in ph_state_irq()
2571 dch->state = st_status & 0x0f; in ph_state_irq()
2572 if (dch->dev.D.protocol == ISDN_P_NT_S0) in ph_state_irq()
2576 if (dch->state == active) { in ph_state_irq()
2583 dch->tx_idx = 0; in ph_state_irq()
2589 __func__, dch->state, in ph_state_irq()
2590 hc->chan[ch].port); in ph_state_irq()
2595 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in ph_state_irq()
2611 dch = hc->chan[ch].dch; in fifo_irq()
2612 bch = hc->chan[ch].bch; in fifo_irq()
2613 if (((!dch) && (!bch)) || (!hc->created[hc->chan[ch].port])) { in fifo_irq()
2618 test_bit(FLG_ACTIVE, &dch->Flags)) { in fifo_irq()
2625 test_bit(FLG_ACTIVE, &bch->Flags)) { in fifo_irq()
2633 test_bit(FLG_ACTIVE, &dch->Flags)) { in fifo_irq()
2637 test_bit(FLG_ACTIVE, &bch->Flags)) { in fifo_irq()
2664 printk(KERN_ERR "HFC-multi: Spurious interrupt!\n"); in hfcmulti_interrupt()
2668 spin_lock(&hc->lock); in hfcmulti_interrupt()
2673 "card %d, this is no bug.\n", hc->id + 1, irqsem); in hfcmulti_interrupt()
2674 irqsem = hc->id + 1; in hfcmulti_interrupt()
2677 if (hc->immap->im_cpm.cp_pbdat & hc->pb_irqmsk) in hfcmulti_interrupt()
2680 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_interrupt()
2682 plx_acc = hc->plx_membase + PLX_INTCSR; in hfcmulti_interrupt()
2717 hc->irqcnt++; in hfcmulti_interrupt()
2719 if (hc->ctype != HFC_TYPE_E1) in hfcmulti_interrupt()
2729 r_irq_misc &= hc->hw.r_irqmsk_misc; /* ignore disabled irqs */ in hfcmulti_interrupt()
2731 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_interrupt()
2733 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_interrupt()
2735 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) in hfcmulti_interrupt()
2736 && hc->e1_getclock) { in hfcmulti_interrupt()
2738 hc->syncronized = 1; in hfcmulti_interrupt()
2740 hc->syncronized = 0; in hfcmulti_interrupt()
2756 __func__, hc->id, temp & 0x7); in hfcmulti_interrupt()
2757 for (i = 0; i < hc->ports; i++) { in hfcmulti_interrupt()
2758 dch = hc->chan[hc->dnum[i]].dch; in hfcmulti_interrupt()
2759 dch->state = temp & 0x7; in hfcmulti_interrupt()
2763 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in hfcmulti_interrupt()
2768 if (hc->iclock_on) in hfcmulti_interrupt()
2769 mISDN_clock_update(hc->iclock, poll, NULL); in hfcmulti_interrupt()
2779 printk(KERN_DEBUG "%s: got V_IRQ_PROC -" in hfcmulti_interrupt()
2796 spin_unlock(&hc->lock); in hfcmulti_interrupt()
2803 spin_unlock(&hc->lock); in hfcmulti_interrupt()
2809 * timer callback for D-chan busy resolution. Currently no function
2821 * configure B-channel with the given protocol
2822 * ch eqals to the HFC-channel (0-31)
2823 * ch is the number of channel (0-4,4-7,8-11,12-15,16-19,20-23,24-27,28-31
2824 * for S/T, 1-31 for E1)
2836 return -EINVAL; in mode_hfcmulti()
2837 oslot_tx = hc->chan[ch].slot_tx; in mode_hfcmulti()
2838 oslot_rx = hc->chan[ch].slot_rx; in mode_hfcmulti()
2839 conf = hc->chan[ch].conf; in mode_hfcmulti()
2844 "bank new=%d (TX) slot old=%d new=%d bank new=%d (RX)\n", in mode_hfcmulti()
2845 __func__, hc->id, ch, protocol, oslot_tx, slot_tx, in mode_hfcmulti()
2851 printk(KERN_DEBUG "%s: remove from slot %d (TX)\n", in mode_hfcmulti()
2853 if (hc->slot_owner[oslot_tx << 1] == ch) { in mode_hfcmulti()
2856 if (hc->ctype != HFC_TYPE_XHFC) in mode_hfcmulti()
2858 hc->slot_owner[oslot_tx << 1] = -1; in mode_hfcmulti()
2862 "%s: we are not owner of this tx slot " in mode_hfcmulti()
2864 __func__, hc->slot_owner[oslot_tx << 1]); in mode_hfcmulti()
2874 if (hc->slot_owner[(oslot_rx << 1) | 1] == ch) { in mode_hfcmulti()
2877 hc->slot_owner[(oslot_rx << 1) | 1] = -1; in mode_hfcmulti()
2884 hc->slot_owner[(oslot_rx << 1) | 1]); in mode_hfcmulti()
2889 flow_tx = 0x80; /* FIFO->ST */ in mode_hfcmulti()
2891 hc->chan[ch].slot_tx = -1; in mode_hfcmulti()
2892 hc->chan[ch].bank_tx = 0; in mode_hfcmulti()
2895 if (hc->chan[ch].txpending) in mode_hfcmulti()
2896 flow_tx = 0x80; /* FIFO->ST */ in mode_hfcmulti()
2898 flow_tx = 0xc0; /* PCM->ST */ in mode_hfcmulti()
2905 " %d flow %02x routing %02x conf %d (TX)\n", in mode_hfcmulti()
2910 if (hc->ctype != HFC_TYPE_XHFC) in mode_hfcmulti()
2913 hc->slot_owner[slot_tx << 1] = ch; in mode_hfcmulti()
2914 hc->chan[ch].slot_tx = slot_tx; in mode_hfcmulti()
2915 hc->chan[ch].bank_tx = bank_tx; in mode_hfcmulti()
2919 flow_rx = 0x80; /* ST->FIFO */ in mode_hfcmulti()
2920 hc->chan[ch].slot_rx = -1; in mode_hfcmulti()
2921 hc->chan[ch].bank_rx = 0; in mode_hfcmulti()
2924 if (hc->chan[ch].txpending) in mode_hfcmulti()
2925 flow_rx = 0x80; /* ST->FIFO */ in mode_hfcmulti()
2927 flow_rx = 0xc0; /* ST->(FIFO,PCM) */ in mode_hfcmulti()
2939 hc->slot_owner[(slot_rx << 1) | 1] = ch; in mode_hfcmulti()
2940 hc->chan[ch].slot_rx = slot_rx; in mode_hfcmulti()
2941 hc->chan[ch].bank_rx = bank_rx; in mode_hfcmulti()
2946 /* disable TX fifo */ in mode_hfcmulti()
2962 if (hc->chan[ch].bch && hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
2963 hc->hw.a_st_ctrl0[hc->chan[ch].port] &= in mode_hfcmulti()
2965 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
2969 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
2971 if (hc->chan[ch].bch) { in mode_hfcmulti()
2972 test_and_clear_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); in mode_hfcmulti()
2974 &hc->chan[ch].bch->Flags); in mode_hfcmulti()
2977 case (ISDN_P_B_RAW): /* B-channel */ in mode_hfcmulti()
2979 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in mode_hfcmulti()
2980 (hc->chan[ch].slot_rx < 0) && in mode_hfcmulti()
2981 (hc->chan[ch].slot_tx < 0)) { in mode_hfcmulti()
2984 "Setting B-channel %d to echo cancelable " in mode_hfcmulti()
2992 /* S/T -> PCM */ in mode_hfcmulti()
3000 /* PCM -> FIFO */ in mode_hfcmulti()
3006 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3014 /* tx path */ in mode_hfcmulti()
3015 /* PCM -> S/T */ in mode_hfcmulti()
3023 /* FIFO -> PCM */ in mode_hfcmulti()
3029 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3033 /* tx silence */ in mode_hfcmulti()
3034 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in mode_hfcmulti()
3039 /* enable TX fifo */ in mode_hfcmulti()
3042 if (hc->ctype == HFC_TYPE_XHFC) in mode_hfcmulti()
3051 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3055 /* tx silence */ in mode_hfcmulti()
3056 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in mode_hfcmulti()
3060 if (hc->ctype == HFC_TYPE_XHFC) in mode_hfcmulti()
3069 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3074 if (hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3075 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= in mode_hfcmulti()
3077 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3081 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3083 if (hc->chan[ch].bch) in mode_hfcmulti()
3085 &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3087 case (ISDN_P_B_HDLC): /* B-channel */ in mode_hfcmulti()
3088 case (ISDN_P_TE_S0): /* D-channel */ in mode_hfcmulti()
3092 /* enable TX fifo */ in mode_hfcmulti()
3095 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) { in mode_hfcmulti()
3096 /* E1 or B-channel */ in mode_hfcmulti()
3100 /* D-Channel without HDLC fill flags */ in mode_hfcmulti()
3111 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) in mode_hfcmulti()
3118 if (hc->chan[ch].bch) { in mode_hfcmulti()
3119 test_and_set_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3120 if (hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3121 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= in mode_hfcmulti()
3123 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3127 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3134 hc->chan[ch].protocol = ISDN_P_NONE; in mode_hfcmulti()
3135 return -ENOPROTOOPT; in mode_hfcmulti()
3137 hc->chan[ch].protocol = protocol; in mode_hfcmulti()
3152 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, -1, 0, -1, 0); in hfcmulti_pcm()
3157 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, slot_tx, bank_tx, in hfcmulti_pcm()
3169 hc->chan[ch].conf = num; in hfcmulti_conf()
3171 hc->chan[ch].conf = -1; in hfcmulti_conf()
3172 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, hc->chan[ch].slot_tx, in hfcmulti_conf()
3173 hc->chan[ch].bank_tx, hc->chan[ch].slot_rx, in hfcmulti_conf()
3174 hc->chan[ch].bank_rx); in hfcmulti_conf()
3190 struct hfc_multi *hc = dch->hw; in hfcm_l1callback()
3200 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3201 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3207 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3216 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3217 l1_event(dch->l1, HW_POWERUP_IND); in hfcm_l1callback()
3222 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3223 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3229 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3234 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcm_l1callback()
3235 hc->syncronized &= in hfcm_l1callback()
3236 ~(1 << hc->chan[dch->slot].port); in hfcm_l1callback()
3240 skb_queue_splice_init(&dch->squeue, &free_queue); in hfcm_l1callback()
3241 if (dch->tx_skb) { in hfcm_l1callback()
3242 __skb_queue_tail(&free_queue, dch->tx_skb); in hfcm_l1callback()
3243 dch->tx_skb = NULL; in hfcm_l1callback()
3245 dch->tx_idx = 0; in hfcm_l1callback()
3246 if (dch->rx_skb) { in hfcm_l1callback()
3247 __skb_queue_tail(&free_queue, dch->rx_skb); in hfcm_l1callback()
3248 dch->rx_skb = NULL; in hfcm_l1callback()
3250 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in hfcm_l1callback()
3251 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in hfcm_l1callback()
3252 del_timer(&dch->timer); in hfcm_l1callback()
3253 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3257 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3258 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3264 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3271 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3274 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in hfcm_l1callback()
3275 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfcm_l1callback()
3279 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in hfcm_l1callback()
3280 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfcm_l1callback()
3284 if (dch->debug & DEBUG_HW) in hfcm_l1callback()
3287 return -1; in hfcm_l1callback()
3293 * Layer2 -> Layer 1 Transfer
3301 struct hfc_multi *hc = dch->hw; in handle_dmsg()
3303 int ret = -EINVAL; in handle_dmsg()
3307 switch (hh->prim) { in handle_dmsg()
3309 if (skb->len < 1) in handle_dmsg()
3311 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3313 if (ret > 0) { /* direct TX */ in handle_dmsg()
3314 id = hh->id; /* skb can be freed */ in handle_dmsg()
3315 hfcmulti_tx(hc, dch->slot); in handle_dmsg()
3320 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3323 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3326 if (dch->dev.D.protocol != ISDN_P_TE_S0) { in handle_dmsg()
3327 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3332 __func__, hc->chan[dch->slot].port, in handle_dmsg()
3333 hc->ports - 1); in handle_dmsg()
3335 if (hc->ctype == HFC_TYPE_E1) { in handle_dmsg()
3340 __func__, dch->state); in handle_dmsg()
3343 hc->chan[dch->slot].port); in handle_dmsg()
3352 dch->state = 1; in handle_dmsg()
3354 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3356 ret = l1_event(dch->l1, hh->prim); in handle_dmsg()
3359 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); in handle_dmsg()
3360 if (dch->dev.D.protocol != ISDN_P_TE_S0) { in handle_dmsg()
3364 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3368 __func__, hc->chan[dch->slot].port, in handle_dmsg()
3369 hc->ports - 1); in handle_dmsg()
3371 if (hc->ctype == HFC_TYPE_E1) { in handle_dmsg()
3378 hc->chan[dch->slot].port); in handle_dmsg()
3383 dch->state = 1; in handle_dmsg()
3385 skb_queue_splice_init(&dch->squeue, &free_queue); in handle_dmsg()
3386 if (dch->tx_skb) { in handle_dmsg()
3387 __skb_queue_tail(&free_queue, dch->tx_skb); in handle_dmsg()
3388 dch->tx_skb = NULL; in handle_dmsg()
3390 dch->tx_idx = 0; in handle_dmsg()
3391 if (dch->rx_skb) { in handle_dmsg()
3392 __skb_queue_tail(&free_queue, dch->rx_skb); in handle_dmsg()
3393 dch->rx_skb = NULL; in handle_dmsg()
3395 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in handle_dmsg()
3396 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in handle_dmsg()
3397 del_timer(&dch->timer); in handle_dmsg()
3399 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) in handle_dmsg()
3400 dchannel_sched_event(&hc->dch, D_CLEARBUSY); in handle_dmsg()
3403 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3406 ret = l1_event(dch->l1, hh->prim); in handle_dmsg()
3417 struct hfc_multi *hc = bch->hw; in deactivate_bchannel()
3420 spin_lock_irqsave(&hc->lock, flags); in deactivate_bchannel()
3422 hc->chan[bch->slot].coeff_count = 0; in deactivate_bchannel()
3423 hc->chan[bch->slot].rx_off = 0; in deactivate_bchannel()
3424 hc->chan[bch->slot].conf = -1; in deactivate_bchannel()
3425 mode_hfcmulti(hc, bch->slot, ISDN_P_NONE, -1, 0, -1, 0); in deactivate_bchannel()
3426 spin_unlock_irqrestore(&hc->lock, flags); in deactivate_bchannel()
3433 struct hfc_multi *hc = bch->hw; in handle_bmsg()
3434 int ret = -EINVAL; in handle_bmsg()
3438 switch (hh->prim) { in handle_bmsg()
3440 if (!skb->len) in handle_bmsg()
3442 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3444 if (ret > 0) { /* direct TX */ in handle_bmsg()
3445 hfcmulti_tx(hc, bch->slot); in handle_bmsg()
3451 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3456 __func__, bch->slot); in handle_bmsg()
3457 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3458 /* activate B-channel if not already activated */ in handle_bmsg()
3459 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) { in handle_bmsg()
3460 hc->chan[bch->slot].txpending = 0; in handle_bmsg()
3461 ret = mode_hfcmulti(hc, bch->slot, in handle_bmsg()
3462 ch->protocol, in handle_bmsg()
3463 hc->chan[bch->slot].slot_tx, in handle_bmsg()
3464 hc->chan[bch->slot].bank_tx, in handle_bmsg()
3465 hc->chan[bch->slot].slot_rx, in handle_bmsg()
3466 hc->chan[bch->slot].bank_rx); in handle_bmsg()
3468 if (ch->protocol == ISDN_P_B_RAW && !hc->dtmf in handle_bmsg()
3469 && test_bit(HFC_CHIP_DTMF, &hc->chip)) { in handle_bmsg()
3471 hc->dtmf = 1; in handle_bmsg()
3476 HFC_outb(hc, R_DTMF, hc->hw.r_dtmf | in handle_bmsg()
3482 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3488 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3489 switch (hh->id) { in handle_bmsg()
3494 __func__, skb->len); in handle_bmsg()
3506 __func__, hh->id); in handle_bmsg()
3507 ret = -EINVAL; in handle_bmsg()
3509 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3531 (struct dsp_features *)(*((u_long *)&cq->p1)); in channel_bctrl()
3532 struct hfc_multi *hc = bch->hw; in channel_bctrl()
3539 switch (cq->op) { in channel_bctrl()
3542 cq->op |= MISDN_CTRL_HFC_OP | MISDN_CTRL_HW_FEATURES_OP; in channel_bctrl()
3546 hc->chan[bch->slot].rx_off = !!cq->p1; in channel_bctrl()
3547 if (!hc->chan[bch->slot].rx_off) { in channel_bctrl()
3549 HFC_outb_nodebug(hc, R_FIFO, (bch->slot << 1) | 1); in channel_bctrl()
3556 __func__, bch->nr, hc->chan[bch->slot].rx_off); in channel_bctrl()
3560 hc->silence = bch->fill[0]; in channel_bctrl()
3561 memset(hc->silence_data, hc->silence, sizeof(hc->silence_data)); in channel_bctrl()
3568 features->hfc_id = hc->id; in channel_bctrl()
3569 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) in channel_bctrl()
3570 features->hfc_dtmf = 1; in channel_bctrl()
3571 if (test_bit(HFC_CHIP_CONF, &hc->chip)) in channel_bctrl()
3572 features->hfc_conf = 1; in channel_bctrl()
3573 features->hfc_loops = 0; in channel_bctrl()
3574 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in channel_bctrl()
3575 features->hfc_echocanhw = 1; in channel_bctrl()
3577 features->pcm_id = hc->pcm; in channel_bctrl()
3578 features->pcm_slots = hc->slots; in channel_bctrl()
3579 features->pcm_banks = 2; in channel_bctrl()
3583 slot_tx = cq->p1 & 0xff; in channel_bctrl()
3584 bank_tx = cq->p1 >> 8; in channel_bctrl()
3585 slot_rx = cq->p2 & 0xff; in channel_bctrl()
3586 bank_rx = cq->p2 >> 8; in channel_bctrl()
3589 "%s: HFC_PCM_CONN slot %d bank %d (TX) " in channel_bctrl()
3593 if (slot_tx < hc->slots && bank_tx <= 2 && in channel_bctrl()
3594 slot_rx < hc->slots && bank_rx <= 2) in channel_bctrl()
3595 hfcmulti_pcm(hc, bch->slot, in channel_bctrl()
3599 "%s: HFC_PCM_CONN slot %d bank %d (TX) " in channel_bctrl()
3603 ret = -EINVAL; in channel_bctrl()
3610 hfcmulti_pcm(hc, bch->slot, -1, 0, -1, 0); in channel_bctrl()
3613 num = cq->p1 & 0xff; in channel_bctrl()
3618 hfcmulti_conf(hc, bch->slot, num); in channel_bctrl()
3623 ret = -EINVAL; in channel_bctrl()
3629 hfcmulti_conf(hc, bch->slot, -1); in channel_bctrl()
3634 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in channel_bctrl()
3635 vpm_echocan_on(hc, bch->slot, cq->p1); in channel_bctrl()
3637 ret = -EINVAL; in channel_bctrl()
3644 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in channel_bctrl()
3645 vpm_echocan_off(hc, bch->slot); in channel_bctrl()
3647 ret = -EINVAL; in channel_bctrl()
3660 struct hfc_multi *hc = bch->hw; in hfcm_bctrl()
3661 int err = -EINVAL; in hfcm_bctrl()
3664 if (bch->debug & DEBUG_HW) in hfcm_bctrl()
3669 test_and_clear_bit(FLG_OPEN, &bch->Flags); in hfcm_bctrl()
3671 ch->protocol = ISDN_P_NONE; in hfcm_bctrl()
3672 ch->peer = NULL; in hfcm_bctrl()
3677 spin_lock_irqsave(&hc->lock, flags); in hfcm_bctrl()
3679 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_bctrl()
3689 * handle D-channel events
3703 hc = dch->hw; in ph_state_change()
3704 ch = dch->slot; in ph_state_change()
3706 if (hc->ctype == HFC_TYPE_E1) { in ph_state_change()
3707 if (dch->dev.D.protocol == ISDN_P_TE_E1) { in ph_state_change()
3711 __func__, hc->id, dch->state); in ph_state_change()
3716 __func__, hc->id, dch->state); in ph_state_change()
3718 switch (dch->state) { in ph_state_change()
3720 if (hc->e1_state != 1) { in ph_state_change()
3731 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3732 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in ph_state_change()
3737 if (hc->e1_state != 1) in ph_state_change()
3739 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3740 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, in ph_state_change()
3743 hc->e1_state = dch->state; in ph_state_change()
3745 if (dch->dev.D.protocol == ISDN_P_TE_S0) { in ph_state_change()
3749 __func__, dch->state); in ph_state_change()
3750 switch (dch->state) { in ph_state_change()
3752 l1_event(dch->l1, HW_RESET_IND); in ph_state_change()
3755 l1_event(dch->l1, HW_DEACT_IND); in ph_state_change()
3759 l1_event(dch->l1, ANYSIGNAL); in ph_state_change()
3762 l1_event(dch->l1, INFO2); in ph_state_change()
3765 l1_event(dch->l1, INFO4_P8); in ph_state_change()
3771 __func__, dch->state); in ph_state_change()
3772 switch (dch->state) { in ph_state_change()
3774 if (hc->chan[ch].nt_timer == 0) { in ph_state_change()
3775 hc->chan[ch].nt_timer = -1; in ph_state_change()
3777 hc->chan[ch].port); in ph_state_change()
3784 dch->state = 4; in ph_state_change()
3787 hc->chan[ch].nt_timer = in ph_state_change()
3790 hc->chan[ch].port); in ph_state_change()
3793 /* allow G2 -> G3 transition */ in ph_state_change()
3799 hc->chan[ch].nt_timer = -1; in ph_state_change()
3800 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3801 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, in ph_state_change()
3805 hc->chan[ch].nt_timer = -1; in ph_state_change()
3808 hc->chan[ch].nt_timer = -1; in ph_state_change()
3809 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3810 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in ph_state_change()
3825 struct hfc_multi *hc = dch->hw; in hfcmulti_initmode()
3832 i = dch->slot; in hfcmulti_initmode()
3833 pt = hc->chan[i].port; in hfcmulti_initmode()
3834 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_initmode()
3836 hc->chan[hc->dnum[pt]].slot_tx = -1; in hfcmulti_initmode()
3837 hc->chan[hc->dnum[pt]].slot_rx = -1; in hfcmulti_initmode()
3838 hc->chan[hc->dnum[pt]].conf = -1; in hfcmulti_initmode()
3839 if (hc->dnum[pt]) { in hfcmulti_initmode()
3840 mode_hfcmulti(hc, dch->slot, dch->dev.D.protocol, in hfcmulti_initmode()
3841 -1, 0, -1, 0); in hfcmulti_initmode()
3842 timer_setup(&dch->timer, hfcmulti_dbusy_timer, 0); in hfcmulti_initmode()
3845 if (!((1 << i) & hc->bmask[pt])) /* skip unused chan */ in hfcmulti_initmode()
3847 hc->chan[i].slot_tx = -1; in hfcmulti_initmode()
3848 hc->chan[i].slot_rx = -1; in hfcmulti_initmode()
3849 hc->chan[i].conf = -1; in hfcmulti_initmode()
3850 mode_hfcmulti(hc, i, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3853 if (hc->ctype == HFC_TYPE_E1 && pt == 0) { in hfcmulti_initmode()
3855 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_initmode()
3856 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dnum[0]].cfg)) { in hfcmulti_initmode()
3860 if (test_bit(HFC_CFG_OPTICAL, &hc->chan[hc->dnum[0]].cfg)) { in hfcmulti_initmode()
3862 hc->hw.r_tx0 = 0 | V_OUT_EN; in hfcmulti_initmode()
3865 hc->hw.r_tx0 = 1 | V_OUT_EN; in hfcmulti_initmode()
3867 hc->hw.r_tx1 = V_ATX | V_NTRI; in hfcmulti_initmode()
3868 HFC_outb(hc, R_TX0, hc->hw.r_tx0); in hfcmulti_initmode()
3869 HFC_outb(hc, R_TX1, hc->hw.r_tx1); in hfcmulti_initmode()
3873 if (test_bit(HFC_CFG_CRC4, &hc->chan[hc->dnum[0]].cfg)) in hfcmulti_initmode()
3878 if (test_bit(HFC_CFG_CRC4, &hc->chan[hc->dnum[0]].cfg)) in hfcmulti_initmode()
3881 if (dch->dev.D.protocol == ISDN_P_NT_E1) { in hfcmulti_initmode()
3883 printk(KERN_DEBUG "%s: E1 port is NT-mode\n", in hfcmulti_initmode()
3886 hc->e1_getclock = 0; in hfcmulti_initmode()
3889 printk(KERN_DEBUG "%s: E1 port is TE-mode\n", in hfcmulti_initmode()
3892 hc->e1_getclock = 1; in hfcmulti_initmode()
3894 if (test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) in hfcmulti_initmode()
3898 if (test_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip)) in hfcmulti_initmode()
3899 hc->e1_getclock = 1; in hfcmulti_initmode()
3900 if (test_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip)) in hfcmulti_initmode()
3901 hc->e1_getclock = 0; in hfcmulti_initmode()
3902 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in hfcmulti_initmode()
3910 if (hc->e1_getclock) { in hfcmulti_initmode()
3937 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_initmode()
3938 hc->syncronized = 0; in hfcmulti_initmode()
3942 if (hc->ctype != HFC_TYPE_E1) { in hfcmulti_initmode()
3944 hc->chan[i].slot_tx = -1; in hfcmulti_initmode()
3945 hc->chan[i].slot_rx = -1; in hfcmulti_initmode()
3946 hc->chan[i].conf = -1; in hfcmulti_initmode()
3947 mode_hfcmulti(hc, i, dch->dev.D.protocol, -1, 0, -1, 0); in hfcmulti_initmode()
3948 timer_setup(&dch->timer, hfcmulti_dbusy_timer, 0); in hfcmulti_initmode()
3949 hc->chan[i - 2].slot_tx = -1; in hfcmulti_initmode()
3950 hc->chan[i - 2].slot_rx = -1; in hfcmulti_initmode()
3951 hc->chan[i - 2].conf = -1; in hfcmulti_initmode()
3952 mode_hfcmulti(hc, i - 2, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3953 hc->chan[i - 1].slot_tx = -1; in hfcmulti_initmode()
3954 hc->chan[i - 1].slot_rx = -1; in hfcmulti_initmode()
3955 hc->chan[i - 1].conf = -1; in hfcmulti_initmode()
3956 mode_hfcmulti(hc, i - 1, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3961 if (dch->dev.D.protocol == ISDN_P_NT_S0) { in hfcmulti_initmode()
3964 "%s: ST port %d is NT-mode\n", in hfcmulti_initmode()
3969 hc->hw.a_st_ctrl0[pt] = V_ST_MD; in hfcmulti_initmode()
3973 "%s: ST port %d is TE-mode\n", in hfcmulti_initmode()
3978 hc->hw.a_st_ctrl0[pt] = 0; in hfcmulti_initmode()
3980 if (!test_bit(HFC_CFG_NONCAP_TX, &hc->chan[i].cfg)) in hfcmulti_initmode()
3981 hc->hw.a_st_ctrl0[pt] |= V_TX_LI; in hfcmulti_initmode()
3982 if (hc->ctype == HFC_TYPE_XHFC) { in hfcmulti_initmode()
3983 hc->hw.a_st_ctrl0[pt] |= 0x40 /* V_ST_PU_CTRL */; in hfcmulti_initmode()
3988 HFC_outb(hc, A_ST_CTRL0, hc->hw.a_st_ctrl0[pt]); in hfcmulti_initmode()
3989 /* disable E-channel */ in hfcmulti_initmode()
3990 if ((dch->dev.D.protocol == ISDN_P_NT_S0) || in hfcmulti_initmode()
3991 test_bit(HFC_CFG_DIS_ECHANNEL, &hc->chan[i].cfg)) in hfcmulti_initmode()
3995 /* enable B-channel receive */ in hfcmulti_initmode()
4001 hc->hw.r_sci_msk |= 1 << pt; in hfcmulti_initmode()
4003 HFC_outb(hc, R_SCI_MSK, hc->hw.r_sci_msk); in hfcmulti_initmode()
4005 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_initmode()
4006 hc->syncronized &= in hfcmulti_initmode()
4007 ~(1 << hc->chan[dch->slot].port); in hfcmulti_initmode()
4025 dch->dev.id, __builtin_return_address(0)); in open_dchannel()
4026 if (rq->protocol == ISDN_P_NONE) in open_dchannel()
4027 return -EINVAL; in open_dchannel()
4028 if ((dch->dev.D.protocol != ISDN_P_NONE) && in open_dchannel()
4029 (dch->dev.D.protocol != rq->protocol)) { in open_dchannel()
4032 __func__, dch->dev.D.protocol, rq->protocol); in open_dchannel()
4034 if ((dch->dev.D.protocol == ISDN_P_TE_S0) && in open_dchannel()
4035 (rq->protocol != ISDN_P_TE_S0)) in open_dchannel()
4036 l1_event(dch->l1, CLOSE_CHANNEL); in open_dchannel()
4037 if (dch->dev.D.protocol != rq->protocol) { in open_dchannel()
4038 if (rq->protocol == ISDN_P_TE_S0) { in open_dchannel()
4043 dch->dev.D.protocol = rq->protocol; in open_dchannel()
4044 spin_lock_irqsave(&hc->lock, flags); in open_dchannel()
4046 spin_unlock_irqrestore(&hc->lock, flags); in open_dchannel()
4048 if (test_bit(FLG_ACTIVE, &dch->Flags)) in open_dchannel()
4049 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, MISDN_ID_ANY, in open_dchannel()
4051 rq->ch = &dch->dev.D; in open_dchannel()
4064 if (!test_channelmap(rq->adr.channel, dch->dev.channelmap)) in open_bchannel()
4065 return -EINVAL; in open_bchannel()
4066 if (rq->protocol == ISDN_P_NONE) in open_bchannel()
4067 return -EINVAL; in open_bchannel()
4068 if (hc->ctype == HFC_TYPE_E1) in open_bchannel()
4069 ch = rq->adr.channel; in open_bchannel()
4071 ch = (rq->adr.channel - 1) + (dch->slot - 2); in open_bchannel()
4072 bch = hc->chan[ch].bch; in open_bchannel()
4076 return -EINVAL; in open_bchannel()
4078 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) in open_bchannel()
4079 return -EBUSY; /* b-channel can be only open once */ in open_bchannel()
4080 bch->ch.protocol = rq->protocol; in open_bchannel()
4081 hc->chan[ch].rx_off = 0; in open_bchannel()
4082 rq->ch = &bch->ch; in open_bchannel()
4094 struct hfc_multi *hc = dch->hw; in channel_dctrl()
4098 switch (cq->op) { in channel_dctrl()
4100 cq->op = MISDN_CTRL_HFC_OP | MISDN_CTRL_L1_TIMER3; in channel_dctrl()
4103 wd_cnt = cq->p1 & 0xf; in channel_dctrl()
4104 wd_mode = !!(cq->p1 >> 4); in channel_dctrl()
4111 hc->hw.r_bert_wd_md = (wd_mode ? V_AUTO_WD_RES : 0); in channel_dctrl()
4112 if (hc->ctype == HFC_TYPE_XHFC) in channel_dctrl()
4113 hc->hw.r_bert_wd_md |= 0x40 /* V_WD_EN */; in channel_dctrl()
4115 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); in channel_dctrl()
4116 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in channel_dctrl()
4117 /* enable the watchdog output for Speech-Design */ in channel_dctrl()
4128 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); in channel_dctrl()
4131 ret = l1_event(dch->l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); in channel_dctrl()
4135 __func__, cq->op); in channel_dctrl()
4136 ret = -EINVAL; in channel_dctrl()
4147 struct hfc_multi *hc = dch->hw; in hfcm_dctrl()
4152 if (dch->debug & DEBUG_HW) in hfcm_dctrl()
4158 switch (rq->protocol) { in hfcm_dctrl()
4161 if (hc->ctype == HFC_TYPE_E1) { in hfcm_dctrl()
4162 err = -EINVAL; in hfcm_dctrl()
4169 if (hc->ctype != HFC_TYPE_E1) { in hfcm_dctrl()
4170 err = -EINVAL; in hfcm_dctrl()
4176 spin_lock_irqsave(&hc->lock, flags); in hfcm_dctrl()
4178 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_dctrl()
4184 __func__, dch->dev.id, in hfcm_dctrl()
4189 spin_lock_irqsave(&hc->lock, flags); in hfcm_dctrl()
4191 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_dctrl()
4194 if (dch->debug & DEBUG_HW) in hfcm_dctrl()
4197 err = -EINVAL; in hfcm_dctrl()
4207 hc->iclock_on = enable; in clockctl()
4222 int err = -EIO; in init_card()
4230 spin_lock_irqsave(&hc->lock, flags); in init_card()
4232 hc->hw.r_irq_ctrl = V_FIFO_IRQ; in init_card()
4234 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4236 if (request_irq(hc->irq, hfcmulti_interrupt, IRQF_SHARED, in init_card()
4237 "HFC-multi", hc)) { in init_card()
4239 hc->irq); in init_card()
4240 hc->irq = 0; in init_card()
4241 return -EIO; in init_card()
4244 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_card()
4246 plx_acc = hc->plx_membase + PLX_INTCSR; in init_card()
4254 __func__, hc->irq, hc->irqcnt); in init_card()
4263 spin_lock_irqsave(&hc->lock, flags); in init_card()
4265 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4270 spin_lock_irqsave(&hc->lock, flags); in init_card()
4272 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4275 __func__, hc->irq, hc->irqcnt); in init_card()
4276 if (hc->irqcnt) { in init_card()
4282 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_card()
4288 hc->irq); in init_card()
4290 err = -EIO; in init_card()
4293 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_card()
4295 plx_acc = hc->plx_membase + PLX_INTCSR; in init_card()
4301 printk(KERN_DEBUG "%s: free irq %d\n", __func__, hc->irq); in init_card()
4302 if (hc->irq) { in init_card()
4303 free_irq(hc->irq, hc); in init_card()
4304 hc->irq = 0; in init_card()
4320 struct hm_map *m = (struct hm_map *)ent->driver_data; in setup_pci()
4323 "HFC-multi: card manufacturer: '%s' card name: '%s' clock: %s\n", in setup_pci()
4324 m->vendor_name, m->card_name, m->clock2 ? "double" : "normal"); in setup_pci()
4326 hc->pci_dev = pdev; in setup_pci()
4327 if (m->clock2) in setup_pci()
4328 test_and_set_bit(HFC_CHIP_CLOCK2, &hc->chip); in setup_pci()
4330 if (ent->vendor == PCI_VENDOR_ID_DIGIUM && in setup_pci()
4331 ent->device == PCI_DEVICE_ID_DIGIUM_HFC4S) { in setup_pci()
4332 test_and_set_bit(HFC_CHIP_B410P, &hc->chip); in setup_pci()
4333 test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); in setup_pci()
4334 test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in setup_pci()
4335 hc->slots = 32; in setup_pci()
4338 if (hc->pci_dev->irq <= 0) { in setup_pci()
4339 printk(KERN_WARNING "HFC-multi: No IRQ for PCI card found.\n"); in setup_pci()
4340 return -EIO; in setup_pci()
4342 if (pci_enable_device(hc->pci_dev)) { in setup_pci()
4343 printk(KERN_WARNING "HFC-multi: Error enabling PCI card.\n"); in setup_pci()
4344 return -EIO; in setup_pci()
4346 hc->leds = m->leds; in setup_pci()
4347 hc->ledstate = 0xAFFEAFFE; in setup_pci()
4348 hc->opticalsupport = m->opticalsupport; in setup_pci()
4350 hc->pci_iobase = 0; in setup_pci()
4351 hc->pci_membase = NULL; in setup_pci()
4352 hc->plx_membase = NULL; in setup_pci()
4355 if (m->io_mode) /* use mode from card config */ in setup_pci()
4356 hc->io_mode = m->io_mode; in setup_pci()
4357 switch (hc->io_mode) { in setup_pci()
4359 test_and_set_bit(HFC_CHIP_PLXSD, &hc->chip); in setup_pci()
4360 hc->slots = 128; /* required */ in setup_pci()
4361 hc->HFC_outb = HFC_outb_pcimem; in setup_pci()
4362 hc->HFC_inb = HFC_inb_pcimem; in setup_pci()
4363 hc->HFC_inw = HFC_inw_pcimem; in setup_pci()
4364 hc->HFC_wait = HFC_wait_pcimem; in setup_pci()
4365 hc->read_fifo = read_fifo_pcimem; in setup_pci()
4366 hc->write_fifo = write_fifo_pcimem; in setup_pci()
4367 hc->plx_origmembase = hc->pci_dev->resource[0].start; in setup_pci()
4370 if (!hc->plx_origmembase) { in setup_pci()
4372 "HFC-multi: No IO-Memory for PCI PLX bridge found\n"); in setup_pci()
4373 pci_disable_device(hc->pci_dev); in setup_pci()
4374 return -EIO; in setup_pci()
4377 hc->plx_membase = ioremap(hc->plx_origmembase, 0x80); in setup_pci()
4378 if (!hc->plx_membase) { in setup_pci()
4380 "HFC-multi: failed to remap plx address space. " in setup_pci()
4382 pci_disable_device(hc->pci_dev); in setup_pci()
4383 return -EIO; in setup_pci()
4386 "HFC-multi: plx_membase:%#lx plx_origmembase:%#lx\n", in setup_pci()
4387 (u_long)hc->plx_membase, hc->plx_origmembase); in setup_pci()
4389 hc->pci_origmembase = hc->pci_dev->resource[2].start; in setup_pci()
4391 if (!hc->pci_origmembase) { in setup_pci()
4393 "HFC-multi: No IO-Memory for PCI card found\n"); in setup_pci()
4394 pci_disable_device(hc->pci_dev); in setup_pci()
4395 return -EIO; in setup_pci()
4398 hc->pci_membase = ioremap(hc->pci_origmembase, 0x400); in setup_pci()
4399 if (!hc->pci_membase) { in setup_pci()
4400 printk(KERN_WARNING "HFC-multi: failed to remap io " in setup_pci()
4402 pci_disable_device(hc->pci_dev); in setup_pci()
4403 return -EIO; in setup_pci()
4408 "leds-type %d\n", in setup_pci()
4409 hc->id, (u_long)hc->pci_membase, hc->pci_origmembase, in setup_pci()
4410 hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4411 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_pci()
4414 hc->HFC_outb = HFC_outb_pcimem; in setup_pci()
4415 hc->HFC_inb = HFC_inb_pcimem; in setup_pci()
4416 hc->HFC_inw = HFC_inw_pcimem; in setup_pci()
4417 hc->HFC_wait = HFC_wait_pcimem; in setup_pci()
4418 hc->read_fifo = read_fifo_pcimem; in setup_pci()
4419 hc->write_fifo = write_fifo_pcimem; in setup_pci()
4420 hc->pci_origmembase = hc->pci_dev->resource[1].start; in setup_pci()
4421 if (!hc->pci_origmembase) { in setup_pci()
4423 "HFC-multi: No IO-Memory for PCI card found\n"); in setup_pci()
4424 pci_disable_device(hc->pci_dev); in setup_pci()
4425 return -EIO; in setup_pci()
4428 hc->pci_membase = ioremap(hc->pci_origmembase, 256); in setup_pci()
4429 if (!hc->pci_membase) { in setup_pci()
4431 "HFC-multi: failed to remap io address space. " in setup_pci()
4433 pci_disable_device(hc->pci_dev); in setup_pci()
4434 return -EIO; in setup_pci()
4437 "%d HZ %d leds-type %d\n", hc->id, (u_long)hc->pci_membase, in setup_pci()
4438 hc->pci_origmembase, hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4439 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_pci()
4442 hc->HFC_outb = HFC_outb_regio; in setup_pci()
4443 hc->HFC_inb = HFC_inb_regio; in setup_pci()
4444 hc->HFC_inw = HFC_inw_regio; in setup_pci()
4445 hc->HFC_wait = HFC_wait_regio; in setup_pci()
4446 hc->read_fifo = read_fifo_regio; in setup_pci()
4447 hc->write_fifo = write_fifo_regio; in setup_pci()
4448 hc->pci_iobase = (u_int) hc->pci_dev->resource[0].start; in setup_pci()
4449 if (!hc->pci_iobase) { in setup_pci()
4451 "HFC-multi: No IO for PCI card found\n"); in setup_pci()
4452 pci_disable_device(hc->pci_dev); in setup_pci()
4453 return -EIO; in setup_pci()
4456 if (!request_region(hc->pci_iobase, 8, "hfcmulti")) { in setup_pci()
4457 printk(KERN_WARNING "HFC-multi: failed to request " in setup_pci()
4459 hc->pci_iobase); in setup_pci()
4460 pci_disable_device(hc->pci_dev); in setup_pci()
4461 return -EIO; in setup_pci()
4465 "%s %s: defined at IOBASE %#x IRQ %d HZ %d leds-type %d\n", in setup_pci()
4466 m->vendor_name, m->card_name, (u_int) hc->pci_iobase, in setup_pci()
4467 hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4468 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_REGIO); in setup_pci()
4471 printk(KERN_WARNING "HFC-multi: Invalid IO mode.\n"); in setup_pci()
4472 pci_disable_device(hc->pci_dev); in setup_pci()
4473 return -EIO; in setup_pci()
4476 pci_set_drvdata(hc->pci_dev, hc); in setup_pci()
4495 ci = dch->slot; in release_port()
4496 pt = hc->chan[ci].port; in release_port()
4502 if (pt >= hc->ports) { in release_port()
4512 if (dch->dev.D.protocol == ISDN_P_TE_S0) in release_port()
4513 l1_event(dch->l1, CLOSE_CHANNEL); in release_port()
4515 hc->chan[ci].dch = NULL; in release_port()
4517 if (hc->created[pt]) { in release_port()
4518 hc->created[pt] = 0; in release_port()
4519 mISDN_unregister_device(&dch->dev); in release_port()
4522 spin_lock_irqsave(&hc->lock, flags); in release_port()
4524 if (dch->timer.function) { in release_port()
4525 del_timer(&dch->timer); in release_port()
4526 dch->timer.function = NULL; in release_port()
4529 if (hc->ctype == HFC_TYPE_E1) { /* E1 */ in release_port()
4531 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in release_port()
4532 hc->syncronized = 0; in release_port()
4537 if (!((1 << i) & hc->bmask[pt])) /* skip unused chan */ in release_port()
4539 if (hc->chan[i].bch) { in release_port()
4543 __func__, hc->chan[i].port + 1, i); in release_port()
4544 pb = hc->chan[i].bch; in release_port()
4545 hc->chan[i].bch = NULL; in release_port()
4546 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4549 kfree(hc->chan[i].coeff); in release_port()
4550 spin_lock_irqsave(&hc->lock, flags); in release_port()
4555 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in release_port()
4556 hc->syncronized &= in release_port()
4557 ~(1 << hc->chan[ci].port); in release_port()
4561 if (hc->chan[ci - 2].bch) { in release_port()
4565 __func__, hc->chan[ci - 2].port + 1, in release_port()
4566 ci - 2); in release_port()
4567 pb = hc->chan[ci - 2].bch; in release_port()
4568 hc->chan[ci - 2].bch = NULL; in release_port()
4569 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4572 kfree(hc->chan[ci - 2].coeff); in release_port()
4573 spin_lock_irqsave(&hc->lock, flags); in release_port()
4575 if (hc->chan[ci - 1].bch) { in release_port()
4579 __func__, hc->chan[ci - 1].port + 1, in release_port()
4580 ci - 1); in release_port()
4581 pb = hc->chan[ci - 1].bch; in release_port()
4582 hc->chan[ci - 1].bch = NULL; in release_port()
4583 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4586 kfree(hc->chan[ci - 1].coeff); in release_port()
4587 spin_lock_irqsave(&hc->lock, flags); in release_port()
4591 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4611 __func__, hc->id); in release_card()
4614 if (hc->iclock) in release_card()
4615 mISDN_unregister_clock(hc->iclock); in release_card()
4618 spin_lock_irqsave(&hc->lock, flags); in release_card()
4620 spin_unlock_irqrestore(&hc->lock, flags); in release_card()
4622 if (hc->irq) { in release_card()
4625 __func__, hc->irq, hc); in release_card()
4626 free_irq(hc->irq, hc); in release_card()
4627 hc->irq = 0; in release_card()
4631 /* disable D-channels & B-channels */ in release_card()
4636 if (hc->chan[ch].dch) in release_card()
4637 release_port(hc, hc->chan[ch].dch); in release_card()
4641 if (hc->leds) in release_card()
4650 list_del(&hc->list); in release_card()
4667 if (!m->opticalsupport) { in init_e1_port_hw()
4680 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4690 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4699 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4709 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4719 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4721 /* set CRC-4 Mode */ in init_e1_port_hw()
4728 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4741 test_and_set_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip); in init_e1_port_hw()
4748 test_and_set_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip); in init_e1_port_hw()
4756 test_and_set_bit(HFC_CHIP_RX_SYNC, &hc->chip); in init_e1_port_hw()
4760 hc->chan[hc->dnum[0]].jitter = (port[Port_cnt]>>12) & 0x3; in init_e1_port_hw()
4765 __func__, hc->chan[hc->dnum[0]].jitter, in init_e1_port_hw()
4768 hc->chan[hc->dnum[0]].jitter = 2; /* default */ in init_e1_port_hw()
4782 return -ENOMEM; in init_e1_port()
4783 dch->debug = debug; in init_e1_port()
4785 dch->hw = hc; in init_e1_port()
4786 dch->dev.Dprotocols = (1 << ISDN_P_TE_E1) | (1 << ISDN_P_NT_E1); in init_e1_port()
4787 dch->dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | in init_e1_port()
4789 dch->dev.D.send = handle_dmsg; in init_e1_port()
4790 dch->dev.D.ctrl = hfcm_dctrl; in init_e1_port()
4791 dch->slot = hc->dnum[pt]; in init_e1_port()
4792 hc->chan[hc->dnum[pt]].dch = dch; in init_e1_port()
4793 hc->chan[hc->dnum[pt]].port = pt; in init_e1_port()
4794 hc->chan[hc->dnum[pt]].nt_timer = -1; in init_e1_port()
4796 if (!((1 << ch) & hc->bmask[pt])) /* skip unused channel */ in init_e1_port()
4802 ret = -ENOMEM; in init_e1_port()
4805 hc->chan[ch].coeff = kzalloc(512, GFP_KERNEL); in init_e1_port()
4806 if (!hc->chan[ch].coeff) { in init_e1_port()
4809 ret = -ENOMEM; in init_e1_port()
4813 bch->nr = ch; in init_e1_port()
4814 bch->slot = ch; in init_e1_port()
4815 bch->debug = debug; in init_e1_port()
4817 bch->hw = hc; in init_e1_port()
4818 bch->ch.send = handle_bmsg; in init_e1_port()
4819 bch->ch.ctrl = hfcm_bctrl; in init_e1_port()
4820 bch->ch.nr = ch; in init_e1_port()
4821 list_add(&bch->ch.list, &dch->dev.bchannels); in init_e1_port()
4822 hc->chan[ch].bch = bch; in init_e1_port()
4823 hc->chan[ch].port = pt; in init_e1_port()
4824 set_channelmap(bch->nr, dch->dev.channelmap); in init_e1_port()
4827 dch->dev.nrbchan = bcount; in init_e1_port()
4830 if (hc->ports > 1) in init_e1_port()
4831 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d-%d", in init_e1_port()
4834 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d", HFC_cnt + 1); in init_e1_port()
4835 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); in init_e1_port()
4838 hc->created[pt] = 1; in init_e1_port()
4855 return -ENOMEM; in init_multi_port()
4856 dch->debug = debug; in init_multi_port()
4858 dch->hw = hc; in init_multi_port()
4859 dch->dev.Dprotocols = (1 << ISDN_P_TE_S0) | (1 << ISDN_P_NT_S0); in init_multi_port()
4860 dch->dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | in init_multi_port()
4862 dch->dev.D.send = handle_dmsg; in init_multi_port()
4863 dch->dev.D.ctrl = hfcm_dctrl; in init_multi_port()
4864 dch->dev.nrbchan = 2; in init_multi_port()
4866 dch->slot = i + 2; in init_multi_port()
4867 hc->chan[i + 2].dch = dch; in init_multi_port()
4868 hc->chan[i + 2].port = pt; in init_multi_port()
4869 hc->chan[i + 2].nt_timer = -1; in init_multi_port()
4870 for (ch = 0; ch < dch->dev.nrbchan; ch++) { in init_multi_port()
4875 ret = -ENOMEM; in init_multi_port()
4878 hc->chan[i + ch].coeff = kzalloc(512, GFP_KERNEL); in init_multi_port()
4879 if (!hc->chan[i + ch].coeff) { in init_multi_port()
4882 ret = -ENOMEM; in init_multi_port()
4886 bch->nr = ch + 1; in init_multi_port()
4887 bch->slot = i + ch; in init_multi_port()
4888 bch->debug = debug; in init_multi_port()
4890 bch->hw = hc; in init_multi_port()
4891 bch->ch.send = handle_bmsg; in init_multi_port()
4892 bch->ch.ctrl = hfcm_bctrl; in init_multi_port()
4893 bch->ch.nr = ch + 1; in init_multi_port()
4894 list_add(&bch->ch.list, &dch->dev.bchannels); in init_multi_port()
4895 hc->chan[i + ch].bch = bch; in init_multi_port()
4896 hc->chan[i + ch].port = pt; in init_multi_port()
4897 set_channelmap(bch->nr, dch->dev.channelmap); in init_multi_port()
4906 if (dch->dev.D.protocol != ISDN_P_TE_S0) { in init_multi_port()
4909 " possible with TE-mode\n", in init_multi_port()
4911 ret = -EINVAL; in init_multi_port()
4914 if (hc->masterclk >= 0) { in init_multi_port()
4918 pt + 1, HFC_cnt + 1, hc->masterclk + 1); in init_multi_port()
4919 ret = -EINVAL; in init_multi_port()
4922 hc->masterclk = pt; in init_multi_port()
4932 &hc->chan[i + 2].cfg); in init_multi_port()
4934 /* disable E-channel */ in init_multi_port()
4938 "%s: PROTOCOL disable E-channel: " in init_multi_port()
4942 &hc->chan[i + 2].cfg); in init_multi_port()
4944 if (hc->ctype == HFC_TYPE_XHFC) { in init_multi_port()
4945 snprintf(name, MISDN_MAX_IDLEN - 1, "xhfc.%d-%d", in init_multi_port()
4947 ret = mISDN_register_device(&dch->dev, NULL, name); in init_multi_port()
4949 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-%ds.%d-%d", in init_multi_port()
4950 hc->ctype, HFC_cnt + 1, pt + 1); in init_multi_port()
4951 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); in init_multi_port()
4955 hc->created[pt] = 1; in init_multi_port()
4977 return -EINVAL; in hfcmulti_init()
4979 if ((type[HFC_cnt] & 0xff) && (type[HFC_cnt] & 0xff) != m->type) { in hfcmulti_init()
4980 printk(KERN_WARNING "HFC-MULTI: Card '%s:%s' type %d found but " in hfcmulti_init()
4982 m->vendor_name, m->card_name, m->type, HFC_cnt, in hfcmulti_init()
4984 printk(KERN_WARNING "HFC-MULTI: Load module without parameters " in hfcmulti_init()
4986 return -EINVAL; in hfcmulti_init()
4990 __func__, m->vendor_name, m->card_name, m->type, in hfcmulti_init()
4996 printk(KERN_ERR "No kmem for HFC-Multi card\n"); in hfcmulti_init()
4997 return -ENOMEM; in hfcmulti_init()
4999 spin_lock_init(&hc->lock); in hfcmulti_init()
5000 hc->mtyp = m; in hfcmulti_init()
5001 hc->ctype = m->type; in hfcmulti_init()
5002 hc->ports = m->ports; in hfcmulti_init()
5003 hc->id = HFC_cnt; in hfcmulti_init()
5004 hc->pcm = pcm[HFC_cnt]; in hfcmulti_init()
5005 hc->io_mode = iomode[HFC_cnt]; in hfcmulti_init()
5006 if (hc->ctype == HFC_TYPE_E1 && dmask[E1_cnt]) { in hfcmulti_init()
5013 hc->dnum[pt] = ch; in hfcmulti_init()
5014 hc->bmask[pt] = bmask[bmask_cnt++]; in hfcmulti_init()
5015 if ((maskcheck & hc->bmask[pt]) in hfcmulti_init()
5016 || (dmask[E1_cnt] & hc->bmask[pt])) { in hfcmulti_init()
5018 "HFC-E1 #%d has overlapping B-channels on fragment #%d\n", in hfcmulti_init()
5021 return -EINVAL; in hfcmulti_init()
5023 maskcheck |= hc->bmask[pt]; in hfcmulti_init()
5025 "HFC-E1 #%d uses D-channel on slot %d and a B-channel map of 0x%08x\n", in hfcmulti_init()
5026 E1_cnt + 1, ch, hc->bmask[pt]); in hfcmulti_init()
5029 hc->ports = pt; in hfcmulti_init()
5031 if (hc->ctype == HFC_TYPE_E1 && !dmask[E1_cnt]) { in hfcmulti_init()
5033 hc->dnum[0] = 16; in hfcmulti_init()
5034 hc->bmask[0] = 0xfffefffe; in hfcmulti_init()
5035 hc->ports = 1; in hfcmulti_init()
5039 hc->masterclk = -1; in hfcmulti_init()
5041 test_and_set_bit(HFC_CHIP_ULAW, &hc->chip); in hfcmulti_init()
5042 hc->silence = 0xff; /* ulaw silence */ in hfcmulti_init()
5044 hc->silence = 0x2a; /* alaw silence */ in hfcmulti_init()
5045 if ((poll >> 1) > sizeof(hc->silence_data)) { in hfcmulti_init()
5047 "please fix\n"); in hfcmulti_init()
5049 return -EINVAL; in hfcmulti_init()
5052 hc->silence_data[i] = hc->silence; in hfcmulti_init()
5054 if (hc->ctype != HFC_TYPE_XHFC) { in hfcmulti_init()
5056 test_and_set_bit(HFC_CHIP_DTMF, &hc->chip); in hfcmulti_init()
5057 test_and_set_bit(HFC_CHIP_CONF, &hc->chip); in hfcmulti_init()
5061 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in hfcmulti_init()
5063 test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); in hfcmulti_init()
5064 test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in hfcmulti_init()
5067 test_and_set_bit(HFC_CHIP_EXRAM_128, &hc->chip); in hfcmulti_init()
5069 test_and_set_bit(HFC_CHIP_EXRAM_512, &hc->chip); in hfcmulti_init()
5070 hc->slots = 32; in hfcmulti_init()
5072 hc->slots = 64; in hfcmulti_init()
5074 hc->slots = 128; in hfcmulti_init()
5076 test_and_set_bit(HFC_CHIP_WATCHDOG, &hc->chip); in hfcmulti_init()
5077 hc->wdcount = 0; in hfcmulti_init()
5078 hc->wdbyte = V_GPIO_OUT2; in hfcmulti_init()
5083 /* setup pci, hc->slots may change due to PLXSD */ in hfcmulti_init()
5091 ret_err = -EIO; in hfcmulti_init()
5101 hc->HFC_outb_nodebug = hc->HFC_outb; in hfcmulti_init()
5102 hc->HFC_inb_nodebug = hc->HFC_inb; in hfcmulti_init()
5103 hc->HFC_inw_nodebug = hc->HFC_inw; in hfcmulti_init()
5104 hc->HFC_wait_nodebug = hc->HFC_wait; in hfcmulti_init()
5106 hc->HFC_outb = HFC_outb_debug; in hfcmulti_init()
5107 hc->HFC_inb = HFC_inb_debug; in hfcmulti_init()
5108 hc->HFC_inw = HFC_inw_debug; in hfcmulti_init()
5109 hc->HFC_wait = HFC_wait_debug; in hfcmulti_init()
5112 for (pt = 0; pt < hc->ports; pt++) { in hfcmulti_init()
5116 ret_err = -EINVAL; in hfcmulti_init()
5119 if (hc->ctype == HFC_TYPE_E1) in hfcmulti_init()
5125 "%s: Registering D-channel, card(%d) port(%d) " in hfcmulti_init()
5131 pt--; in hfcmulti_init()
5132 if (hc->ctype == HFC_TYPE_E1) in hfcmulti_init()
5134 hc->chan[hc->dnum[pt]].dch); in hfcmulti_init()
5137 hc->chan[(pt << 2) + 2].dch); in hfcmulti_init()
5141 if (hc->ctype != HFC_TYPE_E1) in hfcmulti_init()
5144 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_init()
5150 switch (m->dip_type) { in hfcmulti_init()
5164 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in hfcmulti_init()
5168 m->vendor_name, m->card_name, dips, pmj); in hfcmulti_init()
5177 outw(0x4000, hc->pci_iobase + 4); in hfcmulti_init()
5182 dips = inb(hc->pci_iobase); in hfcmulti_init()
5183 dips = inb(hc->pci_iobase); in hfcmulti_init()
5184 dips = inb(hc->pci_iobase); in hfcmulti_init()
5185 dips = ~inb(hc->pci_iobase) & 0x3F; in hfcmulti_init()
5186 outw(0x0, hc->pci_iobase + 4); in hfcmulti_init()
5190 m->vendor_name, m->card_name, dips); in hfcmulti_init()
5199 m->vendor_name, m->card_name, dips); in hfcmulti_init()
5205 list_add_tail(&hc->list, &HFClist); in hfcmulti_init()
5210 hc->iclock = mISDN_register_clock("HFCMulti", 0, clockctl, hc); in hfcmulti_init()
5213 hc->irq = (m->irq) ? : hc->pci_dev->irq; in hfcmulti_init()
5222 spin_lock_irqsave(&hc->lock, flags); in hfcmulti_init()
5224 spin_unlock_irqrestore(&hc->lock, flags); in hfcmulti_init()
5243 pdev->vendor, pdev->device, in hfc_remove_pci()
5244 pdev->subsystem_vendor, pdev->subsystem_device); in hfc_remove_pci()
5264 /*0*/ {VENDOR_BN, "HFC-1S Card (mini PCI)", 4, 1, 1, 3, 0, DIP_4S, 0, 0},
5265 /*1*/ {VENDOR_BN, "HFC-2S Card", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5266 /*2*/ {VENDOR_BN, "HFC-2S Card (mini PCI)", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5267 /*3*/ {VENDOR_BN, "HFC-4S Card", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5268 /*4*/ {VENDOR_BN, "HFC-4S Card (mini PCI)", 4, 4, 1, 2, 0, 0, 0, 0},
5269 /*5*/ {VENDOR_CCD, "HFC-4S Eval (old)", 4, 4, 0, 0, 0, 0, 0, 0},
5270 /*6*/ {VENDOR_CCD, "HFC-4S IOB4ST", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5271 /*7*/ {VENDOR_CCD, "HFC-4S", 4, 4, 1, 2, 0, 0, 0, 0},
5272 /*8*/ {VENDOR_DIG, "HFC-4S Card", 4, 4, 0, 2, 0, 0, HFC_IO_MODE_REGIO, 0},
5273 /*9*/ {VENDOR_CCD, "HFC-4S Swyx 4xS0 SX2 QuadBri", 4, 4, 1, 2, 0, 0, 0, 0},
5274 /*10*/ {VENDOR_JH, "HFC-4S (junghanns 2.0)", 4, 4, 1, 2, 0, 0, 0, 0},
5275 /*11*/ {VENDOR_PRIM, "HFC-2S Primux Card", 4, 2, 0, 0, 0, 0, 0, 0},
5277 /*12*/ {VENDOR_BN, "HFC-8S Card", 8, 8, 1, 0, 0, 0, 0, 0},
5278 /*13*/ {VENDOR_BN, "HFC-8S Card (+)", 8, 8, 1, 8, 0, DIP_8S,
5280 /*14*/ {VENDOR_CCD, "HFC-8S Eval (old)", 8, 8, 0, 0, 0, 0, 0, 0},
5281 /*15*/ {VENDOR_CCD, "HFC-8S IOB4ST Recording", 8, 8, 1, 0, 0, 0, 0, 0},
5283 /*16*/ {VENDOR_CCD, "HFC-8S IOB8ST", 8, 8, 1, 0, 0, 0, 0, 0},
5284 /*17*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0},
5285 /*18*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0},
5287 /*19*/ {VENDOR_BN, "HFC-E1 Card", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5288 /*20*/ {VENDOR_BN, "HFC-E1 Card (mini PCI)", 1, 1, 0, 1, 0, 0, 0, 0},
5289 /*21*/ {VENDOR_BN, "HFC-E1+ Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5290 /*22*/ {VENDOR_BN, "HFC-E1 Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5292 /*23*/ {VENDOR_CCD, "HFC-E1 Eval (old)", 1, 1, 0, 0, 0, 0, 0, 0},
5293 /*24*/ {VENDOR_CCD, "HFC-E1 IOB1E1", 1, 1, 0, 1, 0, 0, 0, 0},
5294 /*25*/ {VENDOR_CCD, "HFC-E1", 1, 1, 0, 1, 0, 0, 0, 0},
5296 /*26*/ {VENDOR_CCD, "HFC-4S Speech Design", 4, 4, 0, 0, 0, 0,
5298 /*27*/ {VENDOR_CCD, "HFC-E1 Speech Design", 1, 1, 0, 0, 0, 0,
5300 /*28*/ {VENDOR_CCD, "HFC-4S OpenVox", 4, 4, 1, 0, 0, 0, 0, 0},
5301 /*29*/ {VENDOR_CCD, "HFC-2S OpenVox", 4, 2, 1, 0, 0, 0, 0, 0},
5302 /*30*/ {VENDOR_CCD, "HFC-8S OpenVox", 8, 8, 1, 0, 0, 0, 0, 0},
5303 /*31*/ {VENDOR_CCD, "XHFC-4S Speech Design", 5, 4, 0, 0, 0, 0,
5305 /*32*/ {VENDOR_JH, "HFC-8S (junghanns)", 8, 8, 1, 0, 0, 0, 0, 0},
5306 /*33*/ {VENDOR_BN, "HFC-2S Beronet Card PCIe", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5307 /*34*/ {VENDOR_BN, "HFC-4S Beronet Card PCIe", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5314 /* Cards with HFC-4S Chip */
5348 /* Cards with HFC-8S Chip */
5369 /* Cards with HFC-E1 Chip */
5406 struct hm_map *m = (struct hm_map *)ent->driver_data; in hfcmulti_probe()
5409 if (m == NULL && ent->vendor == PCI_VENDOR_ID_CCD && ( in hfcmulti_probe()
5410 ent->device == PCI_DEVICE_ID_CCD_HFC4S || in hfcmulti_probe()
5411 ent->device == PCI_DEVICE_ID_CCD_HFC8S || in hfcmulti_probe()
5412 ent->device == PCI_DEVICE_ID_CCD_HFCE1)) { in hfcmulti_probe()
5415 "subvendor:%04x subdevice:%04x)\n", pdev->vendor, in hfcmulti_probe()
5416 pdev->device, pdev->subsystem_vendor, in hfcmulti_probe()
5417 pdev->subsystem_device); in hfcmulti_probe()
5420 return -ENODEV; in hfcmulti_probe()
5455 printk(KERN_INFO "mISDN: HFC-multi driver %s\n", HFC_MULTI_VERSION); in HFCmulti_init()
5490 err = -EINVAL; in HFCmulti_init()