1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
38 /* Notable PDC versions */
47 #define pin_to_hwirq(r, p)	((r)->parent_base + (p) - (r)->pin_base)
79 		/* Use previous DRV (client) region and shift to bank 3-4 */  in pdc_x1e_irq_enable_write()
84 		/* Use our own region and shift to bank 0-2 */  in pdc_x1e_irq_enable_write()
86 		bank -= 2;  in pdc_x1e_irq_enable_write()
129 	__pdc_enable_intr(d->hwirq, on);  in pdc_enable_intr()
147  * active low interrupts to be handled at GIC, PDC has an inverter that inverts
169  * qcom_pdc_gic_set_type: Configure PDC for the interrupt
174  * If @type is edge triggered, forward that as Rising edge as PDC
176  * If @type is level, then forward that as level high as PDC
206 		return -EINVAL;  in qcom_pdc_gic_set_type()
209 	old_pdc_type = pdc_reg_read(IRQ_i_CFG, d->hwirq);  in qcom_pdc_gic_set_type()
211 	pdc_reg_write(IRQ_i_CFG, d->hwirq, pdc_type);  in qcom_pdc_gic_set_type()
218 	 * When we change types the PDC can give a phantom interrupt.  in qcom_pdc_gic_set_type()
233 	.name			= "PDC",
288 		return irq_domain_disconnect_hierarchy(domain->parent, virq);  in qcom_pdc_alloc()
296 	parent_fwspec.fwnode      = domain->parent->fwnode;  in qcom_pdc_alloc()
316 	n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32));  in pdc_setup_pin_mapping()
318 		return -EINVAL;  in pdc_setup_pin_mapping()
324 		return -ENOMEM;  in pdc_setup_pin_mapping()
328 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
333 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
338 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
360 	/* compat with old sm8150 DT which had very small region for PDC */  in qcom_pdc_init()
362 		return -EINVAL;  in qcom_pdc_init()
369 	 * PDC has multiple DRV regions, each one provides the same set of  in qcom_pdc_init()
376 	if (of_device_is_compatible(node, "qcom,x1e80100-pdc")) {  in qcom_pdc_init()
377 		pdc_prev_base = ioremap(res.start - PDC_DRV_OFFSET, IRQ_ENABLE_BANK_MAX);  in qcom_pdc_init()
379 			pr_err("%pOF: unable to map previous PDC DRV region\n", node);  in qcom_pdc_init()
380 			return -ENXIO;  in qcom_pdc_init()
388 		pr_err("%pOF: unable to map PDC registers\n", node);  in qcom_pdc_init()
389 		ret = -ENXIO;  in qcom_pdc_init()
397 		pr_err("%pOF: unable to find PDC's parent domain\n", node);  in qcom_pdc_init()
398 		ret = -ENXIO;  in qcom_pdc_init()
404 		pr_err("%pOF: failed to init PDC pin-hwirq mapping\n", node);  in qcom_pdc_init()
414 		pr_err("%pOF: PDC domain add failed\n", node);  in qcom_pdc_init()
415 		ret = -ENOMEM;  in qcom_pdc_init()
431 IRQCHIP_MATCH("qcom,pdc", qcom_pdc_init)