30 static inline void ab_irqctl_writereg(struct irq_chip_generic *gc, u32 reg,  in ab_irqctl_writereg()  argument
33 	irq_reg_writel(gc, val, reg);  in ab_irqctl_writereg()
36 static inline u32 ab_irqctl_readreg(struct irq_chip_generic *gc, u32 reg)  in ab_irqctl_readreg()  argument
38 	return irq_reg_readl(gc, reg);  in ab_irqctl_readreg()
43 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);  in tb10x_irq_set_type()  local
46 	guard(raw_spinlock)(&gc->lock);  in tb10x_irq_set_type()
48 	mod = ab_irqctl_readreg(gc, AB_IRQCTL_SRC_MODE) | im;  in tb10x_irq_set_type()
49 	pol = ab_irqctl_readreg(gc, AB_IRQCTL_SRC_POLARITY) | im;  in tb10x_irq_set_type()
75 	ab_irqctl_writereg(gc, AB_IRQCTL_SRC_MODE, mod);  in tb10x_irq_set_type()
76 	ab_irqctl_writereg(gc, AB_IRQCTL_SRC_POLARITY, pol);  in tb10x_irq_set_type()
77 	ab_irqctl_writereg(gc, AB_IRQCTL_INT_STATUS, im);  in tb10x_irq_set_type()
94 	struct irq_chip_generic *gc;  in of_tb10x_init_irq()  local
136 	gc = domain->gc->gc[0];  in of_tb10x_init_irq()
137 	gc->reg_base                         = reg_base;  in of_tb10x_init_irq()
139 	gc->chip_types[0].type               = IRQ_TYPE_LEVEL_MASK;  in of_tb10x_init_irq()
140 	gc->chip_types[0].chip.irq_mask      = irq_gc_mask_clr_bit;  in of_tb10x_init_irq()
141 	gc->chip_types[0].chip.irq_unmask    = irq_gc_mask_set_bit;  in of_tb10x_init_irq()
142 	gc->chip_types[0].chip.irq_set_type  = tb10x_irq_set_type;  in of_tb10x_init_irq()
143 	gc->chip_types[0].regs.mask          = AB_IRQCTL_INT_ENABLE;  in of_tb10x_init_irq()
145 	gc->chip_types[1].type               = IRQ_TYPE_EDGE_BOTH;  in of_tb10x_init_irq()
146 	gc->chip_types[1].chip.irq_ack       = irq_gc_ack_set_bit;  in of_tb10x_init_irq()
147 	gc->chip_types[1].chip.irq_mask      = irq_gc_mask_clr_bit;  in of_tb10x_init_irq()
148 	gc->chip_types[1].chip.irq_unmask    = irq_gc_mask_set_bit;  in of_tb10x_init_irq()
149 	gc->chip_types[1].chip.irq_set_type  = tb10x_irq_set_type;  in of_tb10x_init_irq()
150 	gc->chip_types[1].regs.ack           = AB_IRQCTL_INT_STATUS;  in of_tb10x_init_irq()
151 	gc->chip_types[1].regs.mask          = AB_IRQCTL_INT_ENABLE;  in of_tb10x_init_irq()
152 	gc->chip_types[1].handler            = handle_edge_irq;  in of_tb10x_init_irq()
161 	ab_irqctl_writereg(gc, AB_IRQCTL_INT_ENABLE, 0);  in of_tb10x_init_irq()
162 	ab_irqctl_writereg(gc, AB_IRQCTL_INT_MODE, 0);  in of_tb10x_init_irq()
163 	ab_irqctl_writereg(gc, AB_IRQCTL_INT_POLARITY, 0);  in of_tb10x_init_irq()
164 	ab_irqctl_writereg(gc, AB_IRQCTL_INT_STATUS, ~0UL);  in of_tb10x_init_irq()