108 static unsigned long stm32_exti_pending(struct irq_chip_generic *gc)  in stm32_exti_pending()  argument
110 	struct stm32_exti_chip_data *chip_data = gc->private;  in stm32_exti_pending()
113 	return irq_reg_readl(gc, stm32_bank->rpr_ofst);  in stm32_exti_pending()
120 	unsigned int nbanks = domain->gc->num_chips;  in stm32_irq_handler()
121 	struct irq_chip_generic *gc;  in stm32_irq_handler()  local
128 		gc = irq_get_domain_generic_chip(domain, irq_base);  in stm32_irq_handler()
130 		while ((pending = stm32_exti_pending(gc))) {  in stm32_irq_handler()
166 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in stm32_irq_set_type()  local
167 	struct stm32_exti_chip_data *chip_data = gc->private;  in stm32_irq_set_type()
172 	irq_gc_lock(gc);  in stm32_irq_set_type()
174 	rtsr = irq_reg_readl(gc, stm32_bank->rtsr_ofst);  in stm32_irq_set_type()
175 	ftsr = irq_reg_readl(gc, stm32_bank->ftsr_ofst);  in stm32_irq_set_type()
181 	irq_reg_writel(gc, rtsr, stm32_bank->rtsr_ofst);  in stm32_irq_set_type()
182 	irq_reg_writel(gc, ftsr, stm32_bank->ftsr_ofst);  in stm32_irq_set_type()
185 	irq_gc_unlock(gc);  in stm32_irq_set_type()
216 static void stm32_irq_suspend(struct irq_chip_generic *gc)  in stm32_irq_suspend()  argument
218 	struct stm32_exti_chip_data *chip_data = gc->private;  in stm32_irq_suspend()
220 	irq_gc_lock(gc);  in stm32_irq_suspend()
221 	stm32_chip_suspend(chip_data, gc->wake_active);  in stm32_irq_suspend()
222 	irq_gc_unlock(gc);  in stm32_irq_suspend()
225 static void stm32_irq_resume(struct irq_chip_generic *gc)  in stm32_irq_resume()  argument
227 	struct stm32_exti_chip_data *chip_data = gc->private;  in stm32_irq_resume()
229 	irq_gc_lock(gc);  in stm32_irq_resume()
230 	stm32_chip_resume(chip_data, gc->mask_cache);  in stm32_irq_resume()
231 	irq_gc_unlock(gc);  in stm32_irq_resume()
264 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in stm32_irq_ack()  local
265 	struct stm32_exti_chip_data *chip_data = gc->private;  in stm32_irq_ack()
268 	irq_gc_lock(gc);  in stm32_irq_ack()
270 	irq_reg_writel(gc, d->mask, stm32_bank->rpr_ofst);  in stm32_irq_ack()
272 	irq_gc_unlock(gc);  in stm32_irq_ack()
340 	struct irq_chip_generic *gc;  in stm32_exti_init()  local
371 		gc = irq_get_domain_generic_chip(domain, i * IRQS_PER_BANK);  in stm32_exti_init()
373 		gc->reg_base = host_data->base;  in stm32_exti_init()
374 		gc->chip_types->type = IRQ_TYPE_EDGE_BOTH;  in stm32_exti_init()
375 		gc->chip_types->chip.irq_ack = stm32_irq_ack;  in stm32_exti_init()
376 		gc->chip_types->chip.irq_mask = irq_gc_mask_clr_bit;  in stm32_exti_init()
377 		gc->chip_types->chip.irq_unmask = irq_gc_mask_set_bit;  in stm32_exti_init()
378 		gc->chip_types->chip.irq_set_type = stm32_irq_set_type;  in stm32_exti_init()
379 		gc->chip_types->chip.irq_set_wake = irq_gc_set_wake;  in stm32_exti_init()
380 		gc->suspend = stm32_irq_suspend;  in stm32_exti_init()
381 		gc->resume = stm32_irq_resume;  in stm32_exti_init()
382 		gc->wake_enabled = IRQ_MSK(IRQS_PER_BANK);  in stm32_exti_init()
384 		gc->chip_types->regs.mask = stm32_bank->imr_ofst;  in stm32_exti_init()
385 		gc->private = (void *)chip_data;  in stm32_exti_init()