Lines Matching +full:rz +full:- +full:dmac
1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas RZ/V2H(P) ICU Driver
5 * Based on irq-renesas-rzg2l.c
17 #include <linux/irqchip/irq-renesas-rzv2h.h>
71 ICU_TSSR_TSSEL_PREP((GENMASK(((_field_width) - 2), 0)), (n), _field_width); \
77 BIT((_field_width) - 1) << ((n) * (_field_width)); \
93 * struct rzv2h_hw_info - Interrupt Control Unit controller hardware info structure.
106 /* DMAC */
116 * struct rzv2h_icu_priv - Interrupt Control Unit controller private data structure.
142 guard(raw_spinlock_irqsave)(&priv->lock); in rzv2h_icu_register_dma_req()
144 icu_dmksely = readl(priv->base + ICU_DMkSELy(dmac_index, y)); in rzv2h_icu_register_dma_req()
146 writel(icu_dmksely, priv->base + ICU_DMkSELy(dmac_index, y)); in rzv2h_icu_register_dma_req()
152 return data->domain->host_data; in irq_data_to_priv()
162 scoped_guard(raw_spinlock, &priv->lock) { in rzv2h_icu_eoi()
164 tintirq_nr = hw_irq - ICU_TINT_START; in rzv2h_icu_eoi()
167 writel_relaxed(bit, priv->base + priv->info->t_offs + ICU_TSCLR); in rzv2h_icu_eoi()
169 tintirq_nr = hw_irq - ICU_IRQ_START; in rzv2h_icu_eoi()
172 writel_relaxed(bit, priv->base + ICU_ISCLR); in rzv2h_icu_eoi()
174 writel_relaxed(ICU_NSCLR_NCLR, priv->base + ICU_NSCLR); in rzv2h_icu_eoi()
191 tint_nr = hw_irq - ICU_TINT_START; in rzv2h_tint_irq_endisable()
192 nr_tint = 32 / priv->info->field_width; in rzv2h_tint_irq_endisable()
196 guard(raw_spinlock)(&priv->lock); in rzv2h_tint_irq_endisable()
197 tssr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TSSR(k)); in rzv2h_tint_irq_endisable()
199 tssr |= ICU_TSSR_TIEN(tssel_n, priv->info->field_width); in rzv2h_tint_irq_endisable()
201 tssr &= ~ICU_TSSR_TIEN(tssel_n, priv->info->field_width); in rzv2h_tint_irq_endisable()
202 writel_relaxed(tssr, priv->base + priv->info->t_offs + ICU_TSSR(k)); in rzv2h_tint_irq_endisable()
210 writel_relaxed(BIT(tint_nr), priv->base + priv->info->t_offs + ICU_TSCLR); in rzv2h_tint_irq_endisable()
240 return -EINVAL; in rzv2h_nmi_set_type()
243 writel_relaxed(sense, priv->base + ICU_NITSR); in rzv2h_nmi_set_type()
250 unsigned int irq_nr = hwirq - ICU_IRQ_START; in rzv2h_clear_irq_int()
254 isctr = readl_relaxed(priv->base + ICU_ISCTR); in rzv2h_clear_irq_int()
255 iitsr = readl_relaxed(priv->base + ICU_IITSR); in rzv2h_clear_irq_int()
260 * interrupt signal is de-asserted by the source of the interrupt request, therefore clear in rzv2h_clear_irq_int()
264 writel_relaxed(bit, priv->base + ICU_ISCLR); in rzv2h_clear_irq_int()
271 u32 irq_nr = hwirq - ICU_IRQ_START; in rzv2h_irq_set_type()
292 return -EINVAL; in rzv2h_irq_set_type()
295 guard(raw_spinlock)(&priv->lock); in rzv2h_irq_set_type()
296 iitsr = readl_relaxed(priv->base + ICU_IITSR); in rzv2h_irq_set_type()
300 writel_relaxed(iitsr, priv->base + ICU_IITSR); in rzv2h_irq_set_type()
307 unsigned int tint_nr = hwirq - ICU_TINT_START; in rzv2h_clear_tint_int()
313 tsctr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TSCTR); in rzv2h_clear_tint_int()
314 titsr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TITSR(k)); in rzv2h_clear_tint_int()
323 writel_relaxed(bit, priv->base + priv->info->t_offs + ICU_TSCLR); in rzv2h_clear_tint_int()
354 return -EINVAL; in rzv2h_tint_set_type()
359 if (tint > priv->info->max_tssel) in rzv2h_tint_set_type()
360 return -EINVAL; in rzv2h_tint_set_type()
362 if (priv->info->tssel_lut) in rzv2h_tint_set_type()
363 tint = priv->info->tssel_lut[tint]; in rzv2h_tint_set_type()
366 tint_nr = hwirq - ICU_TINT_START; in rzv2h_tint_set_type()
368 nr_tint = 32 / priv->info->field_width; in rzv2h_tint_set_type()
371 tien = ICU_TSSR_TIEN(tssel_n, priv->info->field_width); in rzv2h_tint_set_type()
376 guard(raw_spinlock)(&priv->lock); in rzv2h_tint_set_type()
378 tssr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TSSR(tssr_k)); in rzv2h_tint_set_type()
379 tssr &= ~(ICU_TSSR_TSSEL_MASK(tssel_n, priv->info->field_width) | tien); in rzv2h_tint_set_type()
380 tssr |= ICU_TSSR_TSSEL_PREP(tint, tssel_n, priv->info->field_width); in rzv2h_tint_set_type()
382 writel_relaxed(tssr, priv->base + priv->info->t_offs + ICU_TSSR(tssr_k)); in rzv2h_tint_set_type()
384 titsr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TITSR(titsr_k)); in rzv2h_tint_set_type()
388 writel_relaxed(titsr, priv->base + priv->info->t_offs + ICU_TITSR(titsr_k)); in rzv2h_tint_set_type()
392 writel_relaxed(tssr | tien, priv->base + priv->info->t_offs + ICU_TSSR(tssr_k)); in rzv2h_tint_set_type()
416 .name = "rzv2h-icu",
435 struct rzv2h_icu_priv *priv = domain->host_data; in rzv2h_icu_alloc()
447 * fwspec->param[0]. in rzv2h_icu_alloc()
448 * hwirq is embedded in bits 0-15. in rzv2h_icu_alloc()
449 * TINT is embedded in bits 16-31. in rzv2h_icu_alloc()
456 return -EINVAL; in rzv2h_icu_alloc()
459 if (hwirq > (ICU_NUM_IRQ - 1)) in rzv2h_icu_alloc()
460 return -EINVAL; in rzv2h_icu_alloc()
467 return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &priv->fwspec[hwirq]); in rzv2h_icu_alloc()
487 of_phandle_args_to_fwspec(np, map.args, map.args_count, &priv->fwspec[i]); in rzv2h_icu_parse_interrupts()
509 return -ENODEV; in rzv2h_icu_init_common()
511 ret = devm_add_action_or_reset(&pdev->dev, rzv2h_icu_put_device, in rzv2h_icu_init_common()
512 &pdev->dev); in rzv2h_icu_init_common()
518 dev_err(&pdev->dev, "cannot find parent domain\n"); in rzv2h_icu_init_common()
519 return -ENODEV; in rzv2h_icu_init_common()
522 rzv2h_icu_data = devm_kzalloc(&pdev->dev, sizeof(*rzv2h_icu_data), GFP_KERNEL); in rzv2h_icu_init_common()
524 return -ENOMEM; in rzv2h_icu_init_common()
528 rzv2h_icu_data->base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 0, NULL); in rzv2h_icu_init_common()
529 if (IS_ERR(rzv2h_icu_data->base)) in rzv2h_icu_init_common()
530 return PTR_ERR(rzv2h_icu_data->base); in rzv2h_icu_init_common()
534 dev_err(&pdev->dev, "cannot parse interrupts: %d\n", ret); in rzv2h_icu_init_common()
538 resetn = devm_reset_control_get_exclusive_deasserted(&pdev->dev, NULL); in rzv2h_icu_init_common()
541 dev_err(&pdev->dev, "failed to acquire deasserted reset: %d\n", ret); in rzv2h_icu_init_common()
545 ret = devm_pm_runtime_enable(&pdev->dev); in rzv2h_icu_init_common()
547 dev_err(&pdev->dev, "devm_pm_runtime_enable failed, %d\n", ret); in rzv2h_icu_init_common()
551 ret = pm_runtime_resume_and_get(&pdev->dev); in rzv2h_icu_init_common()
553 dev_err(&pdev->dev, "pm_runtime_resume_and_get failed: %d\n", ret); in rzv2h_icu_init_common()
557 raw_spin_lock_init(&rzv2h_icu_data->lock); in rzv2h_icu_init_common()
560 dev_fwnode(&pdev->dev), &rzv2h_icu_domain_ops, in rzv2h_icu_init_common()
563 dev_err(&pdev->dev, "failed to add irq domain\n"); in rzv2h_icu_init_common()
564 ret = -ENOMEM; in rzv2h_icu_init_common()
568 rzv2h_icu_data->info = hw_info; in rzv2h_icu_init_common()
572 * positive. We still need &pdev->dev after successfully returning from this function. in rzv2h_icu_init_common()
577 pm_runtime_put(&pdev->dev); in rzv2h_icu_init_common()
582 /* Mapping based on port index on Table 4.2-6 and TSSEL bits on Table 4.6-4 */
584 81, 82, 83, 84, 85, 86, 87, 88, /* P00-P07 */
585 89, 90, 91, 92, 93, 94, 95, 96, /* P10-P17 */
586 111, 112, /* P20-P21 */
587 97, 98, 99, 100, 101, 102, 103, 104, /* P30-P37 */
588 105, 106, 107, 108, 109, 110, /* P40-P45 */
589 113, 114, 115, 116, 117, 118, 119, /* P50-P56 */
590 120, 121, 122, 123, 124, 125, 126, /* P60-P66 */
591 127, 128, 129, 130, 131, 132, 133, 134, /* P70-P77 */
592 135, 136, 137, 138, 139, 140, /* P80-P85 */
593 43, 44, 45, 46, 47, 48, 49, 50, /* PA0-PA7 */
594 51, 52, 53, 54, 55, 56, 57, 58, /* PB0-PB7 */
595 59, 60, 61, /* PC0-PC2 */
596 62, 63, 64, 65, 66, 67, 68, 69, /* PD0-PD7 */
597 70, 71, 72, 73, 74, 75, 76, 77, /* PE0-PE7 */
598 78, 79, 80, /* PF0-PF2 */
599 25, 26, 27, 28, 29, 30, 31, 32, /* PG0-PG7 */
600 33, 34, 35, 36, 37, 38, /* PH0-PH5 */
601 4, 5, 6, 7, 8, /* PJ0-PJ4 */
602 39, 40, 41, 42, /* PK0-PK3 */
603 9, 10, 11, 12, 21, 22, 23, 24, /* PL0-PL7 */
604 13, 14, 15, 16, 17, 18, 19, 20, /* PM0-PM7 */
605 0, 1, 2, 3 /* PS0-PS3 */
632 IRQCHIP_MATCH("renesas,r9a09g047-icu", rzg3e_icu_init)
633 IRQCHIP_MATCH("renesas,r9a09g057-icu", rzv2h_icu_init)
636 MODULE_DESCRIPTION("Renesas RZ/V2H(P) ICU Driver");