Lines Matching +full:or1k +full:- +full:pic +full:- +full:level
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
13 /* OR1K PIC implementation */
28 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_mask()
33 mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->hwirq)); in or1k_pic_unmask()
38 mtspr(SPR_PICSR, (1UL << data->hwirq)); in or1k_pic_ack()
43 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_mask_ack()
44 mtspr(SPR_PICSR, (1UL << data->hwirq)); in or1k_pic_mask_ack()
48 * There are two oddities with the OR1200 PIC implementation:
49 * i) LEVEL-triggered interrupts are latched and need to be cleared
55 mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); in or1k_pic_or1200_ack()
60 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_or1200_mask_ack()
61 mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); in or1k_pic_or1200_mask_ack()
66 .name = "or1k-PIC-level",
76 .name = "or1k-PIC-edge",
88 .name = "or1200-PIC",
108 hwirq = hwirq + first - 1; in pic_get_irq()
115 int irq = -1; in or1k_pic_handle_irq()
123 struct or1k_pic_dev *pic = d->host_data; in or1k_map() local
125 irq_set_chip_and_handler(irq, &pic->chip, pic->handle); in or1k_map()
126 irq_set_status_flags(irq, pic->flags); in or1k_map()
137 * This sets up the IRQ domain for the PIC built in to the OpenRISC
142 struct or1k_pic_dev *pic) in or1k_pic_init() argument
148 pic); in or1k_pic_init()
160 IRQCHIP_DECLARE(or1k_pic_or1200, "opencores,or1200-pic", or1k_pic_or1200_init);
161 IRQCHIP_DECLARE(or1k_pic, "opencores,or1k-pic", or1k_pic_or1200_init);
168 IRQCHIP_DECLARE(or1k_pic_level, "opencores,or1k-pic-level",
176 IRQCHIP_DECLARE(or1k_pic_edge, "opencores,or1k-pic-edge", or1k_pic_edge_init);