Lines Matching refs:sei

60 	struct mvebu_sei *sei = irq_data_get_irq_chip_data(d);  in mvebu_sei_ack_irq()  local
64 sei->base + GICP_SECR(reg_idx)); in mvebu_sei_ack_irq()
69 struct mvebu_sei *sei = irq_data_get_irq_chip_data(d); in mvebu_sei_mask_irq() local
74 raw_spin_lock_irqsave(&sei->mask_lock, flags); in mvebu_sei_mask_irq()
75 reg = readl_relaxed(sei->base + GICP_SEMR(reg_idx)); in mvebu_sei_mask_irq()
77 writel_relaxed(reg, sei->base + GICP_SEMR(reg_idx)); in mvebu_sei_mask_irq()
78 raw_spin_unlock_irqrestore(&sei->mask_lock, flags); in mvebu_sei_mask_irq()
83 struct mvebu_sei *sei = irq_data_get_irq_chip_data(d); in mvebu_sei_unmask_irq() local
88 raw_spin_lock_irqsave(&sei->mask_lock, flags); in mvebu_sei_unmask_irq()
89 reg = readl_relaxed(sei->base + GICP_SEMR(reg_idx)); in mvebu_sei_unmask_irq()
91 writel_relaxed(reg, sei->base + GICP_SEMR(reg_idx)); in mvebu_sei_unmask_irq()
92 raw_spin_unlock_irqrestore(&sei->mask_lock, flags); in mvebu_sei_unmask_irq()
143 struct mvebu_sei *sei = data->chip_data; in mvebu_sei_cp_compose_msi_msg() local
144 phys_addr_t set = sei->res->start + GICP_SET_SEI_OFFSET; in mvebu_sei_cp_compose_msi_msg()
146 msg->data = data->hwirq + sei->caps->cp_range.first; in mvebu_sei_cp_compose_msi_msg()
172 struct mvebu_sei *sei = domain->host_data; in mvebu_sei_domain_alloc() local
177 &mvebu_sei_irq_chip, sei); in mvebu_sei_domain_alloc()
214 struct mvebu_sei *sei = domain->host_data; in mvebu_sei_ap_alloc() local
224 fwspec.param[0] = hwirq + sei->caps->ap_range.first; in mvebu_sei_ap_alloc()
231 &mvebu_sei_ap_irq_chip, sei, in mvebu_sei_ap_alloc()
244 static void mvebu_sei_cp_release_irq(struct mvebu_sei *sei, unsigned long hwirq) in mvebu_sei_cp_release_irq() argument
246 mutex_lock(&sei->cp_msi_lock); in mvebu_sei_cp_release_irq()
247 clear_bit(hwirq, sei->cp_msi_bitmap); in mvebu_sei_cp_release_irq()
248 mutex_unlock(&sei->cp_msi_lock); in mvebu_sei_cp_release_irq()
255 struct mvebu_sei *sei = domain->host_data; in mvebu_sei_cp_domain_alloc() local
264 mutex_lock(&sei->cp_msi_lock); in mvebu_sei_cp_domain_alloc()
265 hwirq = find_first_zero_bit(sei->cp_msi_bitmap, in mvebu_sei_cp_domain_alloc()
266 sei->caps->cp_range.size); in mvebu_sei_cp_domain_alloc()
267 if (hwirq < sei->caps->cp_range.size) in mvebu_sei_cp_domain_alloc()
268 set_bit(hwirq, sei->cp_msi_bitmap); in mvebu_sei_cp_domain_alloc()
269 mutex_unlock(&sei->cp_msi_lock); in mvebu_sei_cp_domain_alloc()
271 if (hwirq == sei->caps->cp_range.size) in mvebu_sei_cp_domain_alloc()
276 fwspec.param[0] = hwirq + sei->caps->cp_range.first; in mvebu_sei_cp_domain_alloc()
283 &mvebu_sei_cp_irq_chip, sei, in mvebu_sei_cp_domain_alloc()
289 mvebu_sei_cp_release_irq(sei, hwirq); in mvebu_sei_cp_domain_alloc()
296 struct mvebu_sei *sei = domain->host_data; in mvebu_sei_cp_domain_free() local
299 if (nr_irqs != 1 || d->hwirq >= sei->caps->cp_range.size) { in mvebu_sei_cp_domain_free()
300 dev_err(sei->dev, "Invalid hwirq %lu\n", d->hwirq); in mvebu_sei_cp_domain_free()
304 mvebu_sei_cp_release_irq(sei, d->hwirq); in mvebu_sei_cp_domain_free()
315 struct mvebu_sei *sei = irq_desc_get_handler_data(desc); in mvebu_sei_handle_cascade_irq() local
325 irqmap = readl_relaxed(sei->base + GICP_SECR(idx)); in mvebu_sei_handle_cascade_irq()
331 err = generic_handle_domain_irq(sei->sei_domain, hwirq); in mvebu_sei_handle_cascade_irq()
333 dev_warn(sei->dev, "Spurious IRQ detected (hwirq %lu)\n", hwirq); in mvebu_sei_handle_cascade_irq()
340 static void mvebu_sei_reset(struct mvebu_sei *sei) in mvebu_sei_reset() argument
346 writel_relaxed(0xFFFFFFFF, sei->base + GICP_SECR(reg_idx)); in mvebu_sei_reset()
347 writel_relaxed(0xFFFFFFFF, sei->base + GICP_SEMR(reg_idx)); in mvebu_sei_reset()
368 struct mvebu_sei *sei; in mvebu_sei_probe() local
372 sei = devm_kzalloc(&pdev->dev, sizeof(*sei), GFP_KERNEL); in mvebu_sei_probe()
373 if (!sei) in mvebu_sei_probe()
376 sei->dev = &pdev->dev; in mvebu_sei_probe()
378 mutex_init(&sei->cp_msi_lock); in mvebu_sei_probe()
379 raw_spin_lock_init(&sei->mask_lock); in mvebu_sei_probe()
381 sei->base = devm_platform_get_and_ioremap_resource(pdev, 0, &sei->res); in mvebu_sei_probe()
382 if (IS_ERR(sei->base)) in mvebu_sei_probe()
383 return PTR_ERR(sei->base); in mvebu_sei_probe()
386 sei->caps = of_device_get_match_data(&pdev->dev); in mvebu_sei_probe()
387 if (!sei->caps) { in mvebu_sei_probe()
388 dev_err(sei->dev, in mvebu_sei_probe()
399 dev_err(sei->dev, "Failed to retrieve top-level SPI IRQ\n"); in mvebu_sei_probe()
404 sei->sei_domain = irq_domain_create_linear(of_node_to_fwnode(node), in mvebu_sei_probe()
405 (sei->caps->ap_range.size + in mvebu_sei_probe()
406 sei->caps->cp_range.size), in mvebu_sei_probe()
408 sei); in mvebu_sei_probe()
409 if (!sei->sei_domain) { in mvebu_sei_probe()
410 dev_err(sei->dev, "Failed to create SEI IRQ domain\n"); in mvebu_sei_probe()
415 irq_domain_update_bus_token(sei->sei_domain, DOMAIN_BUS_NEXUS); in mvebu_sei_probe()
418 sei->ap_domain = irq_domain_create_hierarchy(sei->sei_domain, 0, in mvebu_sei_probe()
419 sei->caps->ap_range.size, in mvebu_sei_probe()
422 sei); in mvebu_sei_probe()
423 if (!sei->ap_domain) { in mvebu_sei_probe()
424 dev_err(sei->dev, "Failed to create AP IRQ domain\n"); in mvebu_sei_probe()
429 irq_domain_update_bus_token(sei->ap_domain, DOMAIN_BUS_WIRED); in mvebu_sei_probe()
432 sei->cp_domain = irq_domain_create_hierarchy(sei->sei_domain, 0, in mvebu_sei_probe()
433 sei->caps->cp_range.size, in mvebu_sei_probe()
436 sei); in mvebu_sei_probe()
437 if (!sei->cp_domain) { in mvebu_sei_probe()
443 irq_domain_update_bus_token(sei->cp_domain, DOMAIN_BUS_GENERIC_MSI); in mvebu_sei_probe()
444 sei->cp_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT; in mvebu_sei_probe()
445 sei->cp_domain->msi_parent_ops = &sei_msi_parent_ops; in mvebu_sei_probe()
447 mvebu_sei_reset(sei); in mvebu_sei_probe()
449 irq_set_chained_handler_and_data(parent_irq, mvebu_sei_handle_cascade_irq, sei); in mvebu_sei_probe()
453 irq_domain_remove(sei->ap_domain); in mvebu_sei_probe()
455 irq_domain_remove(sei->sei_domain); in mvebu_sei_probe()