25 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
27 /* ICU registers */
41 /* ICU definitions */
60 	struct mvebu_icu *icu;  member
72 	struct mvebu_icu *icu = msi_data->icu;  in mvebu_icu_translate()  local
76 		dev_err(icu->dev, "wrong ICU parameter count %d\n",  in mvebu_icu_translate()
85 			dev_err(icu->dev, "wrong ICU group type %x\n",  in mvebu_icu_translate()
94 		 * The ICU receives level interrupts. While the NSR are also  in mvebu_icu_translate()
104 		dev_err(icu->dev, "invalid interrupt number %ld\n", *hwirq);  in mvebu_icu_translate()
111 static void mvebu_icu_init(struct mvebu_icu *icu,  in mvebu_icu_init()  argument
120 	/* Set 'SET' ICU SPI message address in AP */  in mvebu_icu_init()
121 	writel_relaxed(msg[0].address_hi, icu->base + subset->offset_set_ah);  in mvebu_icu_init()
122 	writel_relaxed(msg[0].address_lo, icu->base + subset->offset_set_al);  in mvebu_icu_init()
127 	/* Set 'CLEAR' ICU SPI message address in AP (level-MSI only) */  in mvebu_icu_init()
128 	writel_relaxed(msg[1].address_hi, icu->base + subset->offset_clr_ah);  in mvebu_icu_init()
129 	writel_relaxed(msg[1].address_lo, icu->base + subset->offset_clr_al);  in mvebu_icu_init()
150 	struct mvebu_icu *icu = msi_data->icu;  in mvebu_icu_write_msi_msg()  local
156 		mvebu_icu_init(icu, msi_data, msg);  in mvebu_icu_write_msi_msg()
157 		/* Configure the ICU with irq number & type */  in mvebu_icu_write_msi_msg()
164 		/* De-configure the ICU */  in mvebu_icu_write_msi_msg()
168 	writel_relaxed(icu_int, icu->base + ICU_INT_CFG(d->hwirq));  in mvebu_icu_write_msi_msg()
171 	 * The SATA unit has 2 ports, and a dedicated ICU entry per  in mvebu_icu_write_msi_msg()
180 		writel_relaxed(icu_int, icu->base + ICU_INT_CFG(ICU_SATA0_ICU_ID));  in mvebu_icu_write_msi_msg()
181 		writel_relaxed(icu_int, icu->base + ICU_INT_CFG(ICU_SATA1_ICU_ID));  in mvebu_icu_write_msi_msg()
187 		.name			= "ICU-NSR",
211 		.name			= "ICU-SEI",
249 		.compatible = "marvell,cp110-icu-nsr",
253 		.compatible = "marvell,cp110-icu-sei",
271 		msi_data->icu = dev_get_drvdata(dev);  in mvebu_icu_subset_probe()
274 		msi_data->icu = dev_get_drvdata(dev->parent);  in mvebu_icu_subset_probe()
290 		dev_err(dev, "Failed to create ICU MSI domain\n");  in mvebu_icu_subset_probe()
300 		.name = "mvebu-icu-subset",
308 	struct mvebu_icu *icu;  in mvebu_icu_probe()  local
311 	icu = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_icu),  in mvebu_icu_probe()
313 	if (!icu)  in mvebu_icu_probe()
316 	icu->dev = &pdev->dev;  in mvebu_icu_probe()
318 	icu->base = devm_platform_ioremap_resource(pdev, 0);  in mvebu_icu_probe()
319 	if (IS_ERR(icu->base))  in mvebu_icu_probe()
320 		return PTR_ERR(icu->base);  in mvebu_icu_probe()
323 	 * Legacy bindings: ICU is one node with one MSI parent: force manually  in mvebu_icu_probe()
325 	 * New bindings: ICU node has children, one per interrupt controller  in mvebu_icu_probe()
327 	 * All ICU instances should use the same bindings.  in mvebu_icu_probe()
333 	 * Clean all ICU interrupts of type NSR and SEI, required to  in mvebu_icu_probe()
339 		icu_int = readl_relaxed(icu->base + ICU_INT_CFG(i));  in mvebu_icu_probe()
345 			writel_relaxed(0x0, icu->base + ICU_INT_CFG(i));  in mvebu_icu_probe()
348 	platform_set_drvdata(pdev, icu);  in mvebu_icu_probe()
357 	{ .compatible = "marvell,cp110-icu", },
364 		.name = "mvebu-icu",