1 // SPDX-License-Identifier: GPL-2.0-only
3  *  linux/arch/arm/mach-mmp/irq.c
5  *  Generic IRQ handling, GPIO IRQ demultiplexing, etc.
6  *  Copyright (C) 2008 - 2012 Marvell Technology Group Ltd.
69 	struct irq_domain *domain = d->domain;  in icu_mask_ack_irq()
70 	struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data;  in icu_mask_ack_irq()
74 	hwirq = d->irq - data->virq_base;  in icu_mask_ack_irq()
77 		r &= ~data->conf_mask;  in icu_mask_ack_irq()
78 		r |= data->conf_disable;  in icu_mask_ack_irq()
82 		if ((data->virq_base == data->clr_mfp_irq_base)  in icu_mask_ack_irq()
83 			&& (hwirq == data->clr_mfp_hwirq))  in icu_mask_ack_irq()
86 		r = readl_relaxed(data->reg_mask) | (1 << hwirq);  in icu_mask_ack_irq()
87 		writel_relaxed(r, data->reg_mask);  in icu_mask_ack_irq()
93 	struct irq_domain *domain = d->domain;  in icu_mask_irq()
94 	struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data;  in icu_mask_irq()
98 	hwirq = d->irq - data->virq_base;  in icu_mask_irq()
101 		r &= ~data->conf_mask;  in icu_mask_irq()
102 		r |= data->conf_disable;  in icu_mask_irq()
105 		if (data->conf2_mask) {  in icu_mask_irq()
111 			r &= ~data->conf2_mask;  in icu_mask_irq()
115 		r = readl_relaxed(data->reg_mask) | (1 << hwirq);  in icu_mask_irq()
116 		writel_relaxed(r, data->reg_mask);  in icu_mask_irq()
122 	struct irq_domain *domain = d->domain;  in icu_unmask_irq()
123 	struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data;  in icu_unmask_irq()
127 	hwirq = d->irq - data->virq_base;  in icu_unmask_irq()
130 		r &= ~data->conf_mask;  in icu_unmask_irq()
131 		r |= data->conf_enable;  in icu_unmask_irq()
134 		r = readl_relaxed(data->reg_mask) & ~(1 << hwirq);  in icu_unmask_irq()
135 		writel_relaxed(r, data->reg_mask);  in icu_unmask_irq()
160 			data = (struct icu_chip_data *)domain->host_data;  in icu_mux_irq_demux()
165 		pr_err("Spurious irq %d in MMP INTC\n", irq);  in icu_mux_irq_demux()
169 	mask = readl_relaxed(data->reg_mask);  in icu_mux_irq_demux()
171 		status = readl_relaxed(data->reg_status) & ~mask;  in icu_mux_irq_demux()
251 	ret = of_property_read_u32(node, "mrvl,intc-nr-irqs", &nr_irqs);  in mmp_init_bases()
253 		pr_err("Not found mrvl,intc-nr-irqs property\n");  in mmp_init_bases()
260 		return -ENOMEM;  in mmp_init_bases()
285 	return -EINVAL;  in mmp_init_bases()
304 IRQCHIP_DECLARE(mmp_intc, "mrvl,mmp-intc", mmp_of_init);
322 IRQCHIP_DECLARE(mmp2_intc, "mrvl,mmp2-intc", mmp2_of_init);
332 		return -ENODEV;  in mmp3_of_init()
354 IRQCHIP_DECLARE(mmp3_intc, "marvell,mmp3-intc", mmp3_of_init);
364 		return -ENODEV;  in mmp2_mux_of_init()
367 	ret = of_property_read_u32(node, "mrvl,intc-nr-irqs",  in mmp2_mux_of_init()
370 		pr_err("Not found mrvl,intc-nr-irqs property\n");  in mmp2_mux_of_init()
371 		return -EINVAL;  in mmp2_mux_of_init()
376 	 * mrvl,mmp2-mux-intc is not a regular "regs" property containing  in mmp2_mux_of_init()
385 		return -EINVAL;  in mmp2_mux_of_init()
391 		return -EINVAL;  in mmp2_mux_of_init()
407 	if (!of_property_read_u32(node, "mrvl,clr-mfp-irq",  in mmp2_mux_of_init()
422 	return -EINVAL;  in mmp2_mux_of_init()
424 IRQCHIP_DECLARE(mmp2_mux_intc, "mrvl,mmp2-mux-intc", mmp2_mux_of_init);