6  * Copyright (C) 2008 Ralf Baechle (ralf@linux-mips.org)
7  * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
10 #define pr_fmt(fmt) "irq-mips-gic: " fmt
26 #include <asm/mips-cps.h>
30 #include <dt-bindings/interrupt-controller/mips-gic.h>
44 #define GIC_HWIRQ_TO_LOCAL(x)	((x) - GIC_LOCAL_HWIRQ_BASE)
47 #define GIC_HWIRQ_TO_SHARED(x)	((x) - GIC_SHARED_HWIRQ_BASE)
98  * for_each_online_cpu_gic() - Iterate over online CPUs, access local registers
109 	for ((cpu) = __gic_with_next_online_cpu(-1);	\
115  * gic_irq_lock_cluster() - Lock redirect block access to IRQ's cluster
186 	irq -= GIC_PIN_TO_VEC_OFFSET;  in gic_bind_eic_interrupt()
217 			return -1;  in gic_get_c0_perfcount_int()
229 			return -1;  in gic_get_c0_fdc_int()
243 	/* Get per-cpu bitmaps */  in gic_handle_shared_int()
267 	unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq);  in gic_mask_irq()
281 	unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq);  in gic_unmask_irq()
298 	unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq);  in gic_ack_irq()
313 	irq = GIC_HWIRQ_TO_SHARED(d->hwirq);  in gic_set_type()
371 	unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq);  in gic_set_affinity()
386 		return -EINVAL;  in gic_set_affinity()
408 	 * Update effective affinity - after this gic_irq_lock_cluster() will  in gic_set_affinity()
449 	.name			=	"MIPS GIC",
459 	.name			=	"MIPS GIC",
492 	int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);  in gic_mask_local_irq()
499 	int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);  in gic_unmask_local_irq()
505 	.name			=	"MIPS GIC Local",
518 	intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);  in gic_mask_local_irq_all_vpes()
520 	cd->mask = false;  in gic_mask_local_irq_all_vpes()
534 	intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);  in gic_unmask_local_irq_all_vpes()
536 	cd->mask = true;  in gic_unmask_local_irq_all_vpes()
561 		write_gic_vl_map(mips_gic_vx_map_reg(intr), cd->map);  in gic_all_vpes_irq_cpu_online()
562 		if (cd->mask)  in gic_all_vpes_irq_cpu_online()
570 	.name			= "MIPS GIC Local",
621 		return -EINVAL;  in gic_irq_domain_xlate()
628 		return -EINVAL;  in gic_irq_domain_xlate()
646 			return -EBUSY;  in gic_irq_domain_map()
663 	 * If adding support for more per-cpu interrupts, keep the  in gic_irq_domain_map()
672 		 * the rest of the MIPS kernel code does not use the  in gic_irq_domain_map()
676 		cd->map = map;  in gic_irq_domain_map()
699 		return -EPERM;  in gic_irq_domain_map()
715 	if (fwspec->param[0] == GIC_SHARED)  in gic_irq_domain_alloc()
716 		hwirq = GIC_SHARED_TO_HWIRQ(fwspec->param[1]);  in gic_irq_domain_alloc()
718 		hwirq = GIC_LOCAL_TO_HWIRQ(fwspec->param[1]);  in gic_irq_domain_alloc()
761 		return -ENOMEM;  in gic_ipi_domain_alloc()
766 			return -EBUSY;  in gic_ipi_domain_alloc()
781 		ret = irq_domain_set_hwirq_and_chip(d->parent, virq + i, hwirq,  in gic_ipi_domain_alloc()
828 		is_ipi = d->bus_token == bus_token;  in gic_ipi_domain_match()
829 		return (!node || to_of_node(d->fwnode) == node) && is_ipi;  in gic_ipi_domain_match()
854 		return -ENXIO;  in gic_register_ipi_domain()
860 	    !of_property_read_u32_array(node, "mti,reserved-ipi-vectors", v, 2)) {  in gic_register_ipi_domain()
865 		 * meeting the requirements of arch/mips SMP.  in gic_register_ipi_domain()
868 		bitmap_set(ipi_resrv, gic_shared_intrs - num_ipis, num_ipis);  in gic_register_ipi_domain()
913 	while (!of_property_read_u32_index(node, "mti,reserved-cpu-vectors",  in gic_of_init()
920 		return -ENODEV;  in gic_of_init()
925 		 * Probe the CM for the GIC base address if not specified  in gic_of_init()
926 		 * in the device-tree.  in gic_of_init()
936 			return -ENODEV;  in gic_of_init()
952 		return -ENOMEM;  in gic_of_init()
965 		gic_cpu_pin = cpu_vec - GIC_CPU_PIN_OFFSET;  in gic_of_init()
976 		return -ENXIO;  in gic_of_init()
1014 				 "irqchip/mips/gic:starting",  in gic_of_init()