1 // SPDX-License-Identifier: GPL-2.0
3  * irqchip for the IXP4xx interrupt controller
6  * Based on arch/arm/mach-ixp4xx/common.c
8  * Copyright 2003-2004 (C) MontaVista, Software, Inc.
26 #define IXP4XX_ICPR	0x00 /* Interrupt Status */
27 #define IXP4XX_ICMR	0x04 /* Interrupt Enable */
28 #define IXP4XX_ICLR	0x08 /* Interrupt IRQ/FIQ Select */
31 #define IXP4XX_ICHR	0x14 /* Interrupt Priority */
35 /* IXP43x and IXP46x-only */
36 #define	IXP4XX_ICPR2	0x20 /* Interrupt Status 2 */
37 #define	IXP4XX_ICMR2	0x24 /* Interrupt Enable 2 */
38 #define	IXP4XX_ICLR2	0x28 /* Interrupt IRQ/FIQ Select 2 */
44  * struct ixp4xx_irq - state container for the Faraday IRQ controller
46  * @is_356: if this is an IXP43x, IXP45x or IX46x SoC (with 64 IRQs)
68 		return -EINVAL;  in ixp4xx_set_irq_type()
77 	if (ixi->is_356 && d->hwirq >= 32) {  in ixp4xx_irq_mask()
78 		val = __raw_readl(ixi->irqbase + IXP4XX_ICMR2);  in ixp4xx_irq_mask()
79 		val &= ~BIT(d->hwirq - 32);  in ixp4xx_irq_mask()
80 		__raw_writel(val, ixi->irqbase + IXP4XX_ICMR2);  in ixp4xx_irq_mask()
82 		val = __raw_readl(ixi->irqbase + IXP4XX_ICMR);  in ixp4xx_irq_mask()
83 		val &= ~BIT(d->hwirq);  in ixp4xx_irq_mask()
84 		__raw_writel(val, ixi->irqbase + IXP4XX_ICMR);  in ixp4xx_irq_mask()
90  * interrupt condition disappears.
97 	if (ixi->is_356 && d->hwirq >= 32) {  in ixp4xx_irq_unmask()
98 		val = __raw_readl(ixi->irqbase + IXP4XX_ICMR2);  in ixp4xx_irq_unmask()
99 		val |= BIT(d->hwirq - 32);  in ixp4xx_irq_unmask()
100 		__raw_writel(val, ixi->irqbase + IXP4XX_ICMR2);  in ixp4xx_irq_unmask()
102 		val = __raw_readl(ixi->irqbase + IXP4XX_ICMR);  in ixp4xx_irq_unmask()
103 		val |= BIT(d->hwirq);  in ixp4xx_irq_unmask()
104 		__raw_writel(val, ixi->irqbase + IXP4XX_ICMR);  in ixp4xx_irq_unmask()
114 	status = __raw_readl(ixi->irqbase + IXP4XX_ICIP);  in ixp4xx_handle_irq()
116 		generic_handle_domain_irq(ixi->domain, i);  in ixp4xx_handle_irq()
121 	if (ixi->is_356) {  in ixp4xx_handle_irq()
122 		status = __raw_readl(ixi->irqbase + IXP4XX_ICIP2);  in ixp4xx_handle_irq()
124 			generic_handle_domain_irq(ixi->domain, i + 32);  in ixp4xx_handle_irq()
134 	if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {  in ixp4xx_irq_domain_translate()
135 		*hwirq = fwspec->param[0];  in ixp4xx_irq_domain_translate()
136 		*type = fwspec->param[1];  in ixp4xx_irq_domain_translate()
140 	if (is_fwnode_irqchip(fwspec->fwnode)) {  in ixp4xx_irq_domain_translate()
141 		if (fwspec->param_count != 2)  in ixp4xx_irq_domain_translate()
142 			return -EINVAL;  in ixp4xx_irq_domain_translate()
143 		*hwirq = fwspec->param[0];  in ixp4xx_irq_domain_translate()
144 		*type = fwspec->param[1];  in ixp4xx_irq_domain_translate()
149 	return -EINVAL;  in ixp4xx_irq_domain_translate()
156 	struct ixp4xx_irq *ixi = d->host_data;  in ixp4xx_irq_domain_alloc()
177 				    &ixi->irqchip,  in ixp4xx_irq_domain_alloc()
198  * ixp4x_irq_setup() - Common setup code for the IXP4xx interrupt controller
200  * @irqbase: Virtual memory base for the interrupt controller
202  * @is_356: if this is an IXP43x, IXP45x or IXP46x SoC variant
211 	ixi->irqbase = irqbase;  in ixp4xx_irq_setup()
212 	ixi->is_356 = is_356;  in ixp4xx_irq_setup()
215 	__raw_writel(0x0, ixi->irqbase + IXP4XX_ICLR);  in ixp4xx_irq_setup()
218 	__raw_writel(0x0, ixi->irqbase + IXP4XX_ICMR);  in ixp4xx_irq_setup()
222 		__raw_writel(0x0, ixi->irqbase + IXP4XX_ICLR2);  in ixp4xx_irq_setup()
225 		__raw_writel(0x0, ixi->irqbase + IXP4XX_ICMR2);  in ixp4xx_irq_setup()
232 	ixi->irqchip.name = "IXP4xx";  in ixp4xx_irq_setup()
233 	ixi->irqchip.irq_mask = ixp4xx_irq_mask;  in ixp4xx_irq_setup()
234 	ixi->irqchip.irq_unmask	= ixp4xx_irq_unmask;  in ixp4xx_irq_setup()
235 	ixi->irqchip.irq_set_type = ixp4xx_set_irq_type;  in ixp4xx_irq_setup()
237 	ixi->domain = irq_domain_create_linear(fwnode, nr_irqs,  in ixp4xx_irq_setup()
240 	if (!ixi->domain) {  in ixp4xx_irq_setup()
242 		return -ENODEV;  in ixp4xx_irq_setup()
261 		pr_crit("IXP4XX: could not ioremap interrupt controller\n");  in ixp4xx_of_init_irq()
262 		return -ENODEV;  in ixp4xx_of_init_irq()
267 	is_356 = of_device_is_compatible(np, "intel,ixp43x-interrupt") ||  in ixp4xx_of_init_irq()
268 		of_device_is_compatible(np, "intel,ixp45x-interrupt") ||  in ixp4xx_of_init_irq()
269 		of_device_is_compatible(np, "intel,ixp46x-interrupt");  in ixp4xx_of_init_irq()
277 IRQCHIP_DECLARE(ixp42x, "intel,ixp42x-interrupt",
279 IRQCHIP_DECLARE(ixp43x, "intel,ixp43x-interrupt",
281 IRQCHIP_DECLARE(ixp45x, "intel,ixp45x-interrupt",
283 IRQCHIP_DECLARE(ixp46x, "intel,ixp46x-interrupt",