Lines Matching full:its
44 #include "irq-gic-its-msi-parent.h"
83 * value of BASER register configuration and ITS page size.
95 * The ITS structure - contains most of the infrastructure, with the
131 #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) argument
132 #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) argument
133 #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) argument
165 * The ITS view of a device - belongs to an ITS, owns an interrupt
166 * translation table, and a list of interrupts. If it some of its
172 struct its_node *its; member
298 static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) in require_its_list_vmovp() argument
300 return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); in require_its_list_vmovp()
310 struct its_node *its; in get_its_list() local
313 list_for_each_entry(its, &its_nodes, entry) { in get_its_list()
314 if (!is_v4(its)) in get_its_list()
317 if (require_its_list_vmovp(vm, its)) in get_its_list()
318 __set_bit(its->list_nr, &its_list); in get_its_list()
333 struct its_node *its = its_dev->its; in dev_event_to_col() local
335 return its->collections + its_dev->event_map.col_map[event]; in dev_event_to_col()
422 static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) in valid_vpe() argument
424 if (valid_col(its->collections + vpe->col_idx)) in valid_vpe()
431 * ITS command descriptors - parameters to be encoded in a command
530 * The ITS command block, which is what the ITS actually parses.
708 static struct its_collection *its_build_mapd_cmd(struct its_node *its, in its_build_mapd_cmd() argument
728 static struct its_collection *its_build_mapc_cmd(struct its_node *its, in its_build_mapc_cmd() argument
742 static struct its_collection *its_build_mapti_cmd(struct its_node *its, in its_build_mapti_cmd() argument
762 static struct its_collection *its_build_movi_cmd(struct its_node *its, in its_build_movi_cmd() argument
781 static struct its_collection *its_build_discard_cmd(struct its_node *its, in its_build_discard_cmd() argument
799 static struct its_collection *its_build_inv_cmd(struct its_node *its, in its_build_inv_cmd() argument
817 static struct its_collection *its_build_int_cmd(struct its_node *its, in its_build_int_cmd() argument
835 static struct its_collection *its_build_clear_cmd(struct its_node *its, in its_build_clear_cmd() argument
853 static struct its_collection *its_build_invall_cmd(struct its_node *its, in its_build_invall_cmd() argument
865 static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, in its_build_vinvall_cmd() argument
874 return valid_vpe(its, desc->its_vinvall_cmd.vpe); in its_build_vinvall_cmd()
877 static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, in its_build_vmapp_cmd() argument
881 struct its_vpe *vpe = valid_vpe(its, desc->its_vmapp_cmd.vpe); in its_build_vmapp_cmd()
892 if (is_v4_1(its)) { in its_build_vmapp_cmd()
905 target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; in its_build_vmapp_cmd()
913 if (!is_v4_1(its)) in its_build_vmapp_cmd()
936 static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, in its_build_vmapti_cmd() argument
942 if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) in its_build_vmapti_cmd()
956 return valid_vpe(its, desc->its_vmapti_cmd.vpe); in its_build_vmapti_cmd()
959 static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, in its_build_vmovi_cmd() argument
965 if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) in its_build_vmovi_cmd()
979 return valid_vpe(its, desc->its_vmovi_cmd.vpe); in its_build_vmovi_cmd()
982 static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, in its_build_vmovp_cmd() argument
988 target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; in its_build_vmovp_cmd()
995 if (is_v4_1(its)) { in its_build_vmovp_cmd()
1002 return valid_vpe(its, desc->its_vmovp_cmd.vpe); in its_build_vmovp_cmd()
1005 static struct its_vpe *its_build_vinv_cmd(struct its_node *its, in its_build_vinv_cmd() argument
1020 return valid_vpe(its, map->vpe); in its_build_vinv_cmd()
1023 static struct its_vpe *its_build_vint_cmd(struct its_node *its, in its_build_vint_cmd() argument
1038 return valid_vpe(its, map->vpe); in its_build_vint_cmd()
1041 static struct its_vpe *its_build_vclear_cmd(struct its_node *its, in its_build_vclear_cmd() argument
1056 return valid_vpe(its, map->vpe); in its_build_vclear_cmd()
1059 static struct its_vpe *its_build_invdb_cmd(struct its_node *its, in its_build_invdb_cmd() argument
1063 if (WARN_ON(!is_v4_1(its))) in its_build_invdb_cmd()
1071 return valid_vpe(its, desc->its_invdb_cmd.vpe); in its_build_invdb_cmd()
1074 static struct its_vpe *its_build_vsgi_cmd(struct its_node *its, in its_build_vsgi_cmd() argument
1078 if (WARN_ON(!is_v4_1(its))) in its_build_vsgi_cmd()
1091 return valid_vpe(its, desc->its_vsgi_cmd.vpe); in its_build_vsgi_cmd()
1094 static u64 its_cmd_ptr_to_offset(struct its_node *its, in its_cmd_ptr_to_offset() argument
1097 return (ptr - its->cmd_base) * sizeof(*ptr); in its_cmd_ptr_to_offset()
1100 static int its_queue_full(struct its_node *its) in its_queue_full() argument
1105 widx = its->cmd_write - its->cmd_base; in its_queue_full()
1106 ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); in its_queue_full()
1108 /* This is incredibly unlikely to happen, unless the ITS locks up. */ in its_queue_full()
1115 static struct its_cmd_block *its_allocate_entry(struct its_node *its) in its_allocate_entry() argument
1120 while (its_queue_full(its)) { in its_allocate_entry()
1123 pr_err_ratelimited("ITS queue not draining\n"); in its_allocate_entry()
1130 cmd = its->cmd_write++; in its_allocate_entry()
1133 if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) in its_allocate_entry()
1134 its->cmd_write = its->cmd_base; in its_allocate_entry()
1145 static struct its_cmd_block *its_post_commands(struct its_node *its) in its_post_commands() argument
1147 u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); in its_post_commands()
1149 writel_relaxed(wr, its->base + GITS_CWRITER); in its_post_commands()
1151 return its->cmd_write; in its_post_commands()
1154 static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) in its_flush_cmd() argument
1158 * the ITS. in its_flush_cmd()
1160 if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) in its_flush_cmd()
1166 static int its_wait_for_range_completion(struct its_node *its, in its_wait_for_range_completion() argument
1174 to_idx = its_cmd_ptr_to_offset(its, to); in its_wait_for_range_completion()
1183 rd_idx = readl_relaxed(its->base + GITS_CREADR); in its_wait_for_range_completion()
1199 pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", in its_wait_for_range_completion()
1213 void name(struct its_node *its, \
1222 raw_spin_lock_irqsave(&its->lock, flags); \
1224 cmd = its_allocate_entry(its); \
1226 raw_spin_unlock_irqrestore(&its->lock, flags); \
1229 sync_obj = builder(its, cmd, desc); \
1230 its_flush_cmd(its, cmd); \
1233 sync_cmd = its_allocate_entry(its); \
1237 buildfn(its, sync_cmd, sync_obj); \
1238 its_flush_cmd(its, sync_cmd); \
1242 rd_idx = readl_relaxed(its->base + GITS_CREADR); \
1243 next_cmd = its_post_commands(its); \
1244 raw_spin_unlock_irqrestore(&its->lock, flags); \
1246 if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \
1247 pr_err_ratelimited("ITS cmd %ps failed\n", builder); \
1250 static void its_build_sync_cmd(struct its_node *its, in its_build_sync_cmd() argument
1263 static void its_build_vsync_cmd(struct its_node *its, in BUILD_SINGLE_CMD_FUNC()
1283 its_send_single_command(dev->its, its_build_int_cmd, &desc); in BUILD_SINGLE_CMD_FUNC()
1293 its_send_single_command(dev->its, its_build_clear_cmd, &desc); in its_send_clear()
1303 its_send_single_command(dev->its, its_build_inv_cmd, &desc); in its_send_inv()
1313 its_send_single_command(dev->its, its_build_mapd_cmd, &desc); in its_send_mapd()
1316 static void its_send_mapc(struct its_node *its, struct its_collection *col, in its_send_mapc() argument
1324 its_send_single_command(its, its_build_mapc_cmd, &desc); in its_send_mapc()
1335 its_send_single_command(dev->its, its_build_mapti_cmd, &desc); in its_send_mapti()
1347 its_send_single_command(dev->its, its_build_movi_cmd, &desc); in its_send_movi()
1357 its_send_single_command(dev->its, its_build_discard_cmd, &desc); in its_send_discard()
1360 static void its_send_invall(struct its_node *its, struct its_collection *col) in its_send_invall() argument
1366 its_send_single_command(its, its_build_invall_cmd, &desc); in its_send_invall()
1380 its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); in its_send_vmapti()
1393 its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); in its_send_vmovi()
1396 static void its_send_vmapp(struct its_node *its, in its_send_vmapp() argument
1403 desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; in its_send_vmapp()
1405 its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); in its_send_vmapp()
1411 struct its_node *its; in its_send_vmovp() local
1417 its = list_first_entry(&its_nodes, struct its_node, entry); in its_send_vmovp()
1418 desc.its_vmovp_cmd.col = &its->collections[col_id]; in its_send_vmovp()
1419 its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); in its_send_vmovp()
1436 list_for_each_entry(its, &its_nodes, entry) { in its_send_vmovp()
1437 if (!is_v4(its)) in its_send_vmovp()
1440 if (!require_its_list_vmovp(vpe->its_vm, its)) in its_send_vmovp()
1443 desc.its_vmovp_cmd.col = &its->collections[col_id]; in its_send_vmovp()
1444 its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); in its_send_vmovp()
1448 static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) in its_send_vinvall() argument
1453 its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); in its_send_vinvall()
1467 its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); in its_send_vinv()
1481 its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); in its_send_vint()
1495 its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); in its_send_vclear()
1498 static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) in its_send_invdb() argument
1503 its_send_single_vcommand(its, its_build_invdb_cmd, &desc); in its_send_invdb()
1575 WARN_ON(!is_v4_1(its_dev->its)); in direct_lpi_inv()
1593 (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) in lpi_update_config()
1611 if (is_v4_1(its_dev->its)) in its_vlpi_set_doorbell()
1624 * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI in its_vlpi_set_doorbell()
1704 node = its_dev->its->numa_node; in its_select_cpu()
1726 * ITS placed next to two NUMA nodes. in its_select_cpu()
1736 if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144)) in its_select_cpu()
1754 if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) && in its_select_cpu()
1792 target_col = &its_dev->its->collections[cpu]; in its_set_affinity()
1809 struct its_node *its = its_dev->its; in its_irq_get_msi_base() local
1811 return its->phys_base + GITS_TRANSLATER; in its_irq_get_msi_base()
1820 its_dev->its->get_msi_base(its_dev)); in its_irq_compose_msi_msg()
1873 static void its_map_vm(struct its_node *its, struct its_vm *vm) in its_map_vm() argument
1884 vm->vlpi_count[its->list_nr]++; in its_map_vm()
1886 if (vm->vlpi_count[its->list_nr] == 1) { in its_map_vm()
1893 its_send_vmapp(its, vpe, true); in its_map_vm()
1895 its_send_vinvall(its, vpe); in its_map_vm()
1900 static void its_unmap_vm(struct its_node *its, struct its_vm *vm) in its_unmap_vm() argument
1902 /* Not using the ITS list? Everything is always mapped. */ in its_unmap_vm()
1908 if (!--vm->vlpi_count[its->list_nr]) { in its_unmap_vm()
1913 its_send_vmapp(its, vm->vpes[i], false); in its_unmap_vm()
1947 /* Ensure all the VPEs are mapped on this ITS */ in its_vlpi_map()
1948 its_map_vm(its_dev->its, info->map->vm); in its_vlpi_map()
2006 /* Potentially unmap the VM from this ITS */ in its_vlpi_unmap()
2007 its_unmap_vm(its_dev->its, its_dev->event_map.vm); in its_vlpi_unmap()
2042 /* Need a v4 ITS */ in its_irq_set_vcpu_affinity()
2043 if (!is_v4(its_dev->its)) in its_irq_set_vcpu_affinity()
2069 .name = "ITS",
2145 pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); in alloc_lpi_range()
2204 pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", in its_lpi_init()
2213 pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); in its_lpi_init()
2365 static u64 its_read_baser(struct its_node *its, struct its_baser *baser) in its_read_baser() argument
2367 u32 idx = baser - its->tables; in its_read_baser()
2369 return gits_read_baser(its->base + GITS_BASER + (idx << 3)); in its_read_baser()
2372 static void its_write_baser(struct its_node *its, struct its_baser *baser, in its_write_baser() argument
2375 u32 idx = baser - its->tables; in its_write_baser()
2377 gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); in its_write_baser()
2378 baser->val = its_read_baser(its, baser); in its_write_baser()
2381 static int its_setup_baser(struct its_node *its, struct its_baser *baser, in its_setup_baser() argument
2384 u64 val = its_read_baser(its, baser); in its_setup_baser()
2395 pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", in its_setup_baser()
2396 &its->phys_base, its_base_type_string[type], in its_setup_baser()
2402 page = its_alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); in its_setup_baser()
2414 pr_err("ITS: no 52bit PA support when psz=%d\n", psz); in its_setup_baser()
2449 its_write_baser(its, baser, val); in its_setup_baser()
2468 pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", in its_setup_baser()
2469 &its->phys_base, its_base_type_string[type], in its_setup_baser()
2480 pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", in its_setup_baser()
2481 &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), in its_setup_baser()
2490 static bool its_parse_indirect_baser(struct its_node *its, in its_parse_indirect_baser() argument
2494 u64 tmp = its_read_baser(its, baser); in its_parse_indirect_baser()
2508 its_write_baser(its, baser, val | GITS_BASER_INDIRECT); in its_parse_indirect_baser()
2513 * The size of the lvl2 table is equal to ITS page size in its_parse_indirect_baser()
2516 * which is reported by ITS hardware times lvl1 table in its_parse_indirect_baser()
2526 * range of device IDs that the ITS can grok... The ID in its_parse_indirect_baser()
2535 pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", in its_parse_indirect_baser()
2536 &its->phys_base, its_base_type_string[type], in its_parse_indirect_baser()
2537 device_ids(its), ids); in its_parse_indirect_baser()
2555 static u32 compute_its_aff(struct its_node *its) in compute_its_aff() argument
2561 * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute in compute_its_aff()
2565 svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); in compute_its_aff()
2567 val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); in compute_its_aff()
2573 struct its_node *its; in find_sibling_its() local
2581 list_for_each_entry(its, &its_nodes, entry) { in find_sibling_its()
2584 if (!is_v4_1(its) || its == cur_its) in find_sibling_its()
2587 if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) in find_sibling_its()
2590 if (aff != compute_its_aff(its)) in find_sibling_its()
2594 baser = its->tables[2].val; in find_sibling_its()
2598 return its; in find_sibling_its()
2604 static void its_free_tables(struct its_node *its) in its_free_tables() argument
2609 if (its->tables[i].base) { in its_free_tables()
2610 its_free_pages(its->tables[i].base, its->tables[i].order); in its_free_tables()
2611 its->tables[i].base = NULL; in its_free_tables()
2616 static int its_probe_baser_psz(struct its_node *its, struct its_baser *baser) in its_probe_baser_psz() argument
2623 val = its_read_baser(its, baser); in its_probe_baser_psz()
2642 its_write_baser(its, baser, val); in its_probe_baser_psz()
2664 static int its_alloc_tables(struct its_node *its) in its_alloc_tables() argument
2670 if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) in its_alloc_tables()
2674 if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) { in its_alloc_tables()
2680 struct its_baser *baser = its->tables + i; in its_alloc_tables()
2681 u64 val = its_read_baser(its, baser); in its_alloc_tables()
2689 if (its_probe_baser_psz(its, baser)) { in its_alloc_tables()
2690 its_free_tables(its); in its_alloc_tables()
2698 indirect = its_parse_indirect_baser(its, baser, &order, in its_alloc_tables()
2699 device_ids(its)); in its_alloc_tables()
2703 if (is_v4_1(its)) { in its_alloc_tables()
2707 if ((sibling = find_sibling_its(its))) { in its_alloc_tables()
2709 its_write_baser(its, baser, baser->val); in its_alloc_tables()
2714 indirect = its_parse_indirect_baser(its, baser, &order, in its_alloc_tables()
2719 err = its_setup_baser(its, baser, cache, shr, order, indirect); in its_alloc_tables()
2721 its_free_tables(its); in its_alloc_tables()
2735 struct its_node *its; in inherit_vpe_l1_table_from_its() local
2742 list_for_each_entry(its, &its_nodes, entry) { in inherit_vpe_l1_table_from_its()
2745 if (!is_v4_1(its)) in inherit_vpe_l1_table_from_its()
2748 if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) in inherit_vpe_l1_table_from_its()
2751 if (aff != compute_its_aff(its)) in inherit_vpe_l1_table_from_its()
2755 baser = its->tables[2].val; in inherit_vpe_l1_table_from_its()
2760 gic_data_rdist()->vpe_l1_base = its->tables[2].base; in inherit_vpe_l1_table_from_its()
2784 *this_cpu_ptr(&local_4_1_its) = its; in inherit_vpe_l1_table_from_its()
2813 * ours wrt CommonLPIAff. Let's use its own VPROPBASER. in inherit_vpe_l1_table_from_rd()
3024 static int its_alloc_collections(struct its_node *its) in its_alloc_collections() argument
3028 its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), in its_alloc_collections()
3030 if (!its->collections) in its_alloc_collections()
3034 its->collections[i].target_address = ~0ULL; in its_alloc_collections()
3131 pr_err_ratelimited("ITS virtual pending table not cleaning\n"); in read_vpend_dirty_clear()
3287 static void its_cpu_init_collection(struct its_node *its) in its_cpu_init_collection() argument
3292 /* avoid cross node collections and its mapping */ in its_cpu_init_collection()
3293 if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { in its_cpu_init_collection()
3297 if (its->numa_node != NUMA_NO_NODE && in its_cpu_init_collection()
3298 its->numa_node != of_node_to_nid(cpu_node)) in its_cpu_init_collection()
3303 * We now have to bind each collection to its target in its_cpu_init_collection()
3306 if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { in its_cpu_init_collection()
3308 * This ITS wants the physical address of the in its_cpu_init_collection()
3313 /* This ITS wants a linear CPU number. */ in its_cpu_init_collection()
3319 its->collections[cpu].target_address = target; in its_cpu_init_collection()
3320 its->collections[cpu].col_id = cpu; in its_cpu_init_collection()
3322 its_send_mapc(its, &its->collections[cpu], 1); in its_cpu_init_collection()
3323 its_send_invall(its, &its->collections[cpu]); in its_cpu_init_collection()
3328 struct its_node *its; in its_cpu_init_collections() local
3332 list_for_each_entry(its, &its_nodes, entry) in its_cpu_init_collections()
3333 its_cpu_init_collection(its); in its_cpu_init_collections()
3338 static struct its_device *its_find_device(struct its_node *its, u32 dev_id) in its_find_device() argument
3343 raw_spin_lock_irqsave(&its->lock, flags); in its_find_device()
3345 list_for_each_entry(tmp, &its->its_device_list, entry) { in its_find_device()
3352 raw_spin_unlock_irqrestore(&its->lock, flags); in its_find_device()
3357 static struct its_baser *its_get_baser(struct its_node *its, u32 type) in its_get_baser() argument
3362 if (GITS_BASER_TYPE(its->tables[i].val) == type) in its_get_baser()
3363 return &its->tables[i]; in its_get_baser()
3369 static bool its_alloc_table_entry(struct its_node *its, in its_alloc_table_entry() argument
3390 page = its_alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, in its_alloc_table_entry()
3405 /* Ensure updated table contents are visible to ITS hardware */ in its_alloc_table_entry()
3412 static bool its_alloc_device_table(struct its_node *its, u32 dev_id) in its_alloc_device_table() argument
3416 baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); in its_alloc_device_table()
3418 /* Don't allow device id that exceeds ITS hardware limit */ in its_alloc_device_table()
3420 return (ilog2(dev_id) < device_ids(its)); in its_alloc_device_table()
3422 return its_alloc_table_entry(its, baser, dev_id); in its_alloc_device_table()
3427 struct its_node *its; in its_alloc_vpe_table() local
3437 list_for_each_entry(its, &its_nodes, entry) { in its_alloc_vpe_table()
3440 if (!is_v4(its)) in its_alloc_vpe_table()
3443 baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); in its_alloc_vpe_table()
3447 if (!its_alloc_table_entry(its, baser, vpe_id)) in its_alloc_vpe_table()
3467 static struct its_device *its_create_device(struct its_node *its, u32 dev_id, in its_create_device() argument
3480 if (!its_alloc_device_table(its, dev_id)) in its_create_device()
3491 sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); in its_create_device()
3494 itt = itt_alloc_pool(its->numa_node, sz); in its_create_device()
3519 dev->its = its; in its_create_device()
3531 raw_spin_lock_irqsave(&its->lock, flags); in its_create_device()
3532 list_add(&dev->entry, &its->its_device_list); in its_create_device()
3533 raw_spin_unlock_irqrestore(&its->lock, flags); in its_create_device()
3535 /* Map device to its ITT */ in its_create_device()
3545 raw_spin_lock_irqsave(&its_dev->its->lock, flags); in its_free_device()
3547 raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); in its_free_device()
3572 struct its_node *its; in its_msi_prepare() local
3582 * are built on top of the ITS. in its_msi_prepare()
3587 its = msi_info->data; in its_msi_prepare()
3591 vpe_proxy.dev->its == its && in its_msi_prepare()
3599 mutex_lock(&its->dev_alloc_lock); in its_msi_prepare()
3600 its_dev = its_find_device(its, dev_id); in its_msi_prepare()
3612 its_dev = its_create_device(its, dev_id, nvec, true); in its_msi_prepare()
3623 mutex_unlock(&its->dev_alloc_lock); in its_msi_prepare()
3632 guard(mutex)(&its_dev->its->dev_alloc_lock); in its_msi_teardown()
3686 struct its_node *its = its_dev->its; in its_irq_domain_alloc() local
3696 err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); in its_irq_domain_alloc()
3885 target_col = &vpe_proxy.dev->its->collections[to]; in its_vpe_db_proxy_move()
3913 struct its_node *its; in its_vpe_set_affinity() local
3937 * interrupt to its new location. in its_vpe_set_affinity()
3947 * the mapping state on this VM should the ITS list be in use (see in its_vpe_set_affinity()
3957 * If we are offered another CPU in the same GICv4.1 ITS in its_vpe_set_affinity()
3977 its = find_4_1_its(); in its_vpe_set_affinity()
3978 if (its && its->flags & ITS_FLAGS_WORKAROUND_HISILICON_162100801) in its_vpe_set_affinity()
4034 * would be able to read its coarse map pretty quickly anyway, in its_vpe_schedule()
4056 struct its_node *its; in its_vpe_invall() local
4060 list_for_each_entry(its, &its_nodes, entry) { in its_vpe_invall()
4061 if (!is_v4(its)) in its_vpe_invall()
4064 if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) in its_vpe_invall()
4068 * Sending a VINVALL to a single ITS is enough, as all in its_vpe_invall()
4071 its_send_vinvall(its, vpe); in its_vpe_invall()
4192 struct its_node *its = *this_cpu_ptr(&local_4_1_its); in find_4_1_its() local
4194 if (!its) { in find_4_1_its()
4195 list_for_each_entry(its, &its_nodes, entry) { in find_4_1_its()
4196 if (is_v4_1(its)) in find_4_1_its()
4197 return its; in find_4_1_its()
4201 its = NULL; in find_4_1_its()
4204 return its; in find_4_1_its()
4210 struct its_node *its; in its_vpe_4_1_send_inv() local
4215 * it to the first valid ITS, and let the HW do its magic. in its_vpe_4_1_send_inv()
4217 its = find_4_1_its(); in its_vpe_4_1_send_inv()
4218 if (its) in its_vpe_4_1_send_inv()
4219 its_send_invdb(its, vpe); in its_vpe_4_1_send_inv()
4346 * GICv4.1 allows us to send VSGI commands to any ITS as long as the in its_configure_sgi()
4348 * activation time, we're pretty sure the first GICv4.1 ITS will do. in its_configure_sgi()
4391 struct its_node *its = find_4_1_its(); in its_sgi_set_irqchip_state() local
4396 writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); in its_sgi_set_irqchip_state()
4684 struct its_node *its; in its_vpe_irq_domain_activate() local
4698 list_for_each_entry(its, &its_nodes, entry) { in its_vpe_irq_domain_activate()
4699 if (!is_v4(its)) in its_vpe_irq_domain_activate()
4702 its_send_vmapp(its, vpe, true); in its_vpe_irq_domain_activate()
4703 its_send_vinvall(its, vpe); in its_vpe_irq_domain_activate()
4713 struct its_node *its; in its_vpe_irq_domain_deactivate() local
4722 list_for_each_entry(its, &its_nodes, entry) { in its_vpe_irq_domain_deactivate()
4723 if (!is_v4(its)) in its_vpe_irq_domain_deactivate()
4726 its_send_vmapp(its, vpe, false); in its_vpe_irq_domain_deactivate()
4753 * GIC architecture specification requires the ITS to be both in its_force_quiescent()
4760 /* Disable the generation of all interrupts to this ITS */ in its_force_quiescent()
4764 /* Poll GITS_CTLR and wait until ITS becomes quiescent */ in its_force_quiescent()
4781 struct its_node *its = data; in its_enable_quirk_cavium_22375() local
4784 its->typer &= ~GITS_TYPER_DEVBITS; in its_enable_quirk_cavium_22375()
4785 its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); in its_enable_quirk_cavium_22375()
4786 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; in its_enable_quirk_cavium_22375()
4793 struct its_node *its = data; in its_enable_quirk_cavium_23144() local
4795 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; in its_enable_quirk_cavium_23144()
4802 struct its_node *its = data; in its_enable_quirk_qdf2400_e0065() local
4805 its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; in its_enable_quirk_qdf2400_e0065()
4806 its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); in its_enable_quirk_qdf2400_e0065()
4813 struct its_node *its = its_dev->its; in its_irq_get_msi_base_pre_its() local
4816 * The Socionext Synquacer SoC has a so-called 'pre-ITS', in its_irq_get_msi_base_pre_its()
4822 return its->pre_its_base + (its_dev->device_id << 2); in its_irq_get_msi_base_pre_its()
4827 struct its_node *its = data; in its_enable_quirk_socionext_synquacer() local
4831 if (!fwnode_property_read_u32_array(its->fwnode_handle, in its_enable_quirk_socionext_synquacer()
4832 "socionext,synquacer-pre-its", in its_enable_quirk_socionext_synquacer()
4836 its->pre_its_base = pre_its_window[0]; in its_enable_quirk_socionext_synquacer()
4837 its->get_msi_base = its_irq_get_msi_base_pre_its; in its_enable_quirk_socionext_synquacer()
4840 if (device_ids(its) > ids) { in its_enable_quirk_socionext_synquacer()
4841 its->typer &= ~GITS_TYPER_DEVBITS; in its_enable_quirk_socionext_synquacer()
4842 its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); in its_enable_quirk_socionext_synquacer()
4845 /* the pre-ITS breaks isolation, so disable MSI remapping */ in its_enable_quirk_socionext_synquacer()
4846 its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_ISOLATED_MSI; in its_enable_quirk_socionext_synquacer()
4854 struct its_node *its = data; in its_enable_quirk_hip07_161600802() local
4860 its->vlpi_redist_offset = SZ_128K; in its_enable_quirk_hip07_161600802()
4866 struct its_node *its = data; in its_enable_rk3588001() local
4872 its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; in its_enable_rk3588001()
4880 struct its_node *its = data; in its_set_non_coherent() local
4882 its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; in its_set_non_coherent()
4888 struct its_node *its = data; in its_enable_quirk_hip09_162100801() local
4890 its->flags |= ITS_FLAGS_WORKAROUND_HISILICON_162100801; in its_enable_quirk_hip09_162100801()
4908 .desc = "ITS: Cavium errata 22375, 24313",
4916 .desc = "ITS: Cavium erratum 23144",
4924 .desc = "ITS: QDF2400 erratum 0065",
4925 .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */
4934 * implementation, but with a 'pre-ITS' added that requires
4937 .desc = "ITS: Socionext Synquacer pre-ITS",
4945 .desc = "ITS: Hip07 erratum 161600802",
4953 .desc = "ITS: Hip09 erratum 162100801",
4961 .desc = "ITS: Rockchip erratum RK3588001",
4968 .desc = "ITS: non-coherent attribute",
4974 .desc = "ITS: Rockchip erratum RK3568002",
4984 static void its_enable_quirks(struct its_node *its) in its_enable_quirks() argument
4986 u32 iidr = readl_relaxed(its->base + GITS_IIDR); in its_enable_quirks()
4988 gic_enable_quirks(iidr, its_quirks, its); in its_enable_quirks()
4990 if (is_of_node(its->fwnode_handle)) in its_enable_quirks()
4991 gic_enable_of_quirks(to_of_node(its->fwnode_handle), in its_enable_quirks()
4992 its_quirks, its); in its_enable_quirks()
4997 struct its_node *its; in its_save_disable() local
5001 list_for_each_entry(its, &its_nodes, entry) { in its_save_disable()
5004 base = its->base; in its_save_disable()
5005 its->ctlr_save = readl_relaxed(base + GITS_CTLR); in its_save_disable()
5008 pr_err("ITS@%pa: failed to quiesce: %d\n", in its_save_disable()
5009 &its->phys_base, err); in its_save_disable()
5010 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_save_disable()
5014 its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); in its_save_disable()
5019 list_for_each_entry_continue_reverse(its, &its_nodes, entry) { in its_save_disable()
5022 base = its->base; in its_save_disable()
5023 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_save_disable()
5033 struct its_node *its; in its_restore_enable() local
5037 list_for_each_entry(its, &its_nodes, entry) { in its_restore_enable()
5041 base = its->base; in its_restore_enable()
5044 * Make sure that the ITS is disabled. If it fails to quiesce, in its_restore_enable()
5046 * registers is undefined according to the GIC v3 ITS in its_restore_enable()
5049 * Firmware resuming with the ITS enabled is terminally broken. in its_restore_enable()
5054 pr_err("ITS@%pa: failed to quiesce on resume: %d\n", in its_restore_enable()
5055 &its->phys_base, ret); in its_restore_enable()
5059 gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); in its_restore_enable()
5065 its->cmd_write = its->cmd_base; in its_restore_enable()
5070 struct its_baser *baser = &its->tables[i]; in its_restore_enable()
5075 its_write_baser(its, baser, baser->val); in its_restore_enable()
5077 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_restore_enable()
5080 * Reinit the collection if it's stored in the ITS. This is in its_restore_enable()
5084 if (its->collections[smp_processor_id()].col_id < in its_restore_enable()
5086 its_cpu_init_collection(its); in its_restore_enable()
5103 pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); in its_map_one()
5110 pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); in its_map_one()
5117 pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); in its_map_one()
5128 static int its_init_domain(struct its_node *its) in its_init_domain() argument
5131 .fwnode = its->fwnode_handle, in its_init_domain()
5133 .domain_flags = its->msi_domain_flags, in its_init_domain()
5143 info->data = its; in its_init_domain()
5155 struct its_node *its; in its_init_vpe_domain() local
5160 pr_info("ITS: Using DirectLPI for VPE invalidation\n"); in its_init_vpe_domain()
5164 /* Any ITS will do, even if not v4 */ in its_init_vpe_domain()
5165 its = list_first_entry(&its_nodes, struct its_node, entry); in its_init_vpe_domain()
5174 devid = GENMASK(device_ids(its) - 1, 0); in its_init_vpe_domain()
5175 vpe_proxy.dev = its_create_device(its, devid, entries, false); in its_init_vpe_domain()
5178 pr_err("ITS: Can't allocate GICv4 proxy device\n"); in its_init_vpe_domain()
5186 pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", in its_init_vpe_domain()
5192 static int __init its_compute_its_list_map(struct its_node *its) in its_compute_its_list_map() argument
5205 pr_err("ITS@%pa: No ITSList entry available!\n", in its_compute_its_list_map()
5206 &its->phys_base); in its_compute_its_list_map()
5210 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_compute_its_list_map()
5213 writel_relaxed(ctlr, its->base + GITS_CTLR); in its_compute_its_list_map()
5214 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_compute_its_list_map()
5221 pr_err("ITS@%pa: Duplicate ITSList entry %d\n", in its_compute_its_list_map()
5222 &its->phys_base, its_number); in its_compute_its_list_map()
5229 static int __init its_probe_one(struct its_node *its) in its_probe_one() argument
5236 its_enable_quirks(its); in its_probe_one()
5238 if (is_v4(its)) { in its_probe_one()
5239 if (!(its->typer & GITS_TYPER_VMOVP)) { in its_probe_one()
5240 err = its_compute_its_list_map(its); in its_probe_one()
5244 its->list_nr = err; in its_probe_one()
5246 pr_info("ITS@%pa: Using ITS number %d\n", in its_probe_one()
5247 &its->phys_base, err); in its_probe_one()
5249 pr_info("ITS@%pa: Single VMOVP capable\n", &its->phys_base); in its_probe_one()
5252 if (is_v4_1(its)) { in its_probe_one()
5253 u32 svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); in its_probe_one()
5255 its->sgir_base = ioremap(its->phys_base + SZ_128K, SZ_64K); in its_probe_one()
5256 if (!its->sgir_base) { in its_probe_one()
5261 its->mpidr = readl_relaxed(its->base + GITS_MPIDR); in its_probe_one()
5263 pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", in its_probe_one()
5264 &its->phys_base, its->mpidr, svpet); in its_probe_one()
5268 page = its_alloc_pages_node(its->numa_node, in its_probe_one()
5275 its->cmd_base = (void *)page_address(page); in its_probe_one()
5276 its->cmd_write = its->cmd_base; in its_probe_one()
5278 err = its_alloc_tables(its); in its_probe_one()
5282 err = its_alloc_collections(its); in its_probe_one()
5286 baser = (virt_to_phys(its->cmd_base) | in its_probe_one()
5292 gits_write_cbaser(baser, its->base + GITS_CBASER); in its_probe_one()
5293 tmp = gits_read_cbaser(its->base + GITS_CBASER); in its_probe_one()
5295 if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) in its_probe_one()
5308 gits_write_cbaser(baser, its->base + GITS_CBASER); in its_probe_one()
5310 pr_info("ITS: using cache flushing for cmd queue\n"); in its_probe_one()
5311 its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; in its_probe_one()
5314 gits_write_cwriter(0, its->base + GITS_CWRITER); in its_probe_one()
5315 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_probe_one()
5317 if (is_v4(its)) in its_probe_one()
5319 writel_relaxed(ctlr, its->base + GITS_CTLR); in its_probe_one()
5321 err = its_init_domain(its); in its_probe_one()
5326 list_add(&its->entry, &its_nodes); in its_probe_one()
5332 its_free_tables(its); in its_probe_one()
5334 its_free_pages(its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); in its_probe_one()
5336 if (its->sgir_base) in its_probe_one()
5337 iounmap(its->sgir_base); in its_probe_one()
5339 pr_err("ITS@%pa: failed probing (%d)\n", &its->phys_base, err); in its_probe_one()
5496 { .compatible = "arm,gic-v3-its", },
5504 struct its_node *its; in its_node_init() local
5511 pr_info("ITS %pR\n", res); in its_node_init()
5513 its = kzalloc(sizeof(*its), GFP_KERNEL); in its_node_init()
5514 if (!its) in its_node_init()
5517 raw_spin_lock_init(&its->lock); in its_node_init()
5518 mutex_init(&its->dev_alloc_lock); in its_node_init()
5519 INIT_LIST_HEAD(&its->entry); in its_node_init()
5520 INIT_LIST_HEAD(&its->its_device_list); in its_node_init()
5522 its->typer = gic_read_typer(its_base + GITS_TYPER); in its_node_init()
5523 its->base = its_base; in its_node_init()
5524 its->phys_base = res->start; in its_node_init()
5525 its->get_msi_base = its_irq_get_msi_base; in its_node_init()
5526 its->msi_domain_flags = IRQ_DOMAIN_FLAG_ISOLATED_MSI | IRQ_DOMAIN_FLAG_MSI_IMMUTABLE; in its_node_init()
5528 its->numa_node = numa_node; in its_node_init()
5529 its->fwnode_handle = handle; in its_node_init()
5531 return its; in its_node_init()
5538 static void its_node_destroy(struct its_node *its) in its_node_destroy() argument
5540 iounmap(its->base); in its_node_destroy()
5541 kfree(its); in its_node_destroy()
5551 * Make sure *all* the ITS are reset before we probe any, as in its_of_probe()
5552 * they may be sharing memory. If any of the ITS fails to in its_of_probe()
5570 struct its_node *its; in its_of_probe() local
5575 pr_warn("%pOF: no msi-controller property, ITS ignored\n", in its_of_probe()
5586 its = its_node_init(&res, &np->fwnode, of_node_to_nid(np)); in its_of_probe()
5587 if (!its) in its_of_probe()
5590 err = its_probe_one(its); in its_of_probe()
5592 its_node_destroy(its); in its_of_probe()
5607 /* GIC ITS ID */
5642 pr_err("SRAT: Invalid header length %d in ITS affinity\n", in gic_acpi_parse_srat_its()
5655 pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); in gic_acpi_parse_srat_its()
5662 pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", in gic_acpi_parse_srat_its()
5690 /* free the its_srat_maps after ITS probing */
5706 struct its_node *its; in gic_acpi_parse_madt_its() local
5718 pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", in gic_acpi_parse_madt_its()
5726 pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", in gic_acpi_parse_madt_its()
5731 its = its_node_init(&res, dom_handle, in gic_acpi_parse_madt_its()
5733 if (!its) { in gic_acpi_parse_madt_its()
5740 its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; in gic_acpi_parse_madt_its()
5742 err = its_probe_one(its); in gic_acpi_parse_madt_its()
5773 * Make sure *all* the ITS are reset before we probe any, as in its_acpi_probe()
5774 * they may be sharing memory. If any of the ITS fails to in its_acpi_probe()
5815 struct its_node *its; in its_init() local
5835 pr_warn("ITS: No ITS available, not enabling LPIs\n"); in its_init()
5843 list_for_each_entry(its, &its_nodes, entry) { in its_init()
5844 has_v4 |= is_v4(its); in its_init()
5845 has_v4_1 |= is_v4_1(its); in its_init()
5863 pr_err("ITS: Disabling GICv4 support\n"); in its_init()