Lines Matching +full:parent +full:- +full:interrupt +full:- +full:base

1 // SPDX-License-Identifier: GPL-2.0-only
3 * Generic Broadcom Set Top Box Level 2 Interrupt controller driver
5 * Copyright (C) 2014-2024 Broadcom
18 #include <linux/interrupt.h>
34 /* Register offsets in the L2 latched interrupt controller */
44 /* Register offsets in the L2 level interrupt controller */
48 .cpu_clear = -1, /* Register not present */
73 status = irq_reg_readl(b->gc, b->status_offset) & in brcmstb_l2_intc_irq_handle()
74 ~(irq_reg_readl(b->gc, b->mask_offset)); in brcmstb_l2_intc_irq_handle()
77 raw_spin_lock(&desc->lock); in brcmstb_l2_intc_irq_handle()
79 raw_spin_unlock(&desc->lock); in brcmstb_l2_intc_irq_handle()
84 irq = ffs(status) - 1; in brcmstb_l2_intc_irq_handle()
86 generic_handle_domain_irq(b->domain, irq); in brcmstb_l2_intc_irq_handle()
89 /* Don't ack parent before all device writes are done */ in brcmstb_l2_intc_irq_handle()
99 struct brcmstb_l2_intc_data *b = gc->private; in __brcmstb_l2_intc_suspend()
101 guard(raw_spinlock_irqsave)(&gc->lock); in __brcmstb_l2_intc_suspend()
104 b->saved_mask = irq_reg_readl(gc, ct->regs.mask); in __brcmstb_l2_intc_suspend()
106 if (b->can_wake) { in __brcmstb_l2_intc_suspend()
108 irq_reg_writel(gc, ~gc->wake_active, ct->regs.disable); in __brcmstb_l2_intc_suspend()
109 irq_reg_writel(gc, gc->wake_active, ct->regs.enable); in __brcmstb_l2_intc_suspend()
127 struct brcmstb_l2_intc_data *b = gc->private; in brcmstb_l2_intc_resume()
129 guard(raw_spinlock_irqsave)(&gc->lock); in brcmstb_l2_intc_resume()
130 if (ct->chip.irq_ack) { in brcmstb_l2_intc_resume()
131 /* Clear unmasked non-wakeup interrupts */ in brcmstb_l2_intc_resume()
132 irq_reg_writel(gc, ~b->saved_mask & ~gc->wake_active, in brcmstb_l2_intc_resume()
133 ct->regs.ack); in brcmstb_l2_intc_resume()
137 irq_reg_writel(gc, b->saved_mask, ct->regs.disable); in brcmstb_l2_intc_resume()
138 irq_reg_writel(gc, ~b->saved_mask, ct->regs.enable); in brcmstb_l2_intc_resume()
142 struct device_node *parent, in brcmstb_l2_intc_of_init() argument
153 void __iomem *base; in brcmstb_l2_intc_of_init() local
157 return -ENOMEM; in brcmstb_l2_intc_of_init()
159 base = of_iomap(np, 0); in brcmstb_l2_intc_of_init()
160 if (!base) { in brcmstb_l2_intc_of_init()
162 ret = -ENOMEM; in brcmstb_l2_intc_of_init()
167 writel(0xffffffff, base + init_params->cpu_mask_set); in brcmstb_l2_intc_of_init()
170 data->can_wake = of_property_read_bool(np, "brcm,irq-can-wake"); in brcmstb_l2_intc_of_init()
171 if (!data->can_wake && (init_params->cpu_clear >= 0)) in brcmstb_l2_intc_of_init()
172 writel(0xffffffff, base + init_params->cpu_clear); in brcmstb_l2_intc_of_init()
176 pr_err("failed to find parent interrupt\n"); in brcmstb_l2_intc_of_init()
177 ret = -EINVAL; in brcmstb_l2_intc_of_init()
181 data->domain = irq_domain_create_linear(of_fwnode_handle(np), 32, in brcmstb_l2_intc_of_init()
183 if (!data->domain) { in brcmstb_l2_intc_of_init()
184 ret = -ENOMEM; in brcmstb_l2_intc_of_init()
189 * peripheral registers for CPU-native byte order. in brcmstb_l2_intc_of_init()
195 if (init_params->handler == handle_level_irq) in brcmstb_l2_intc_of_init()
199 ret = irq_alloc_domain_generic_chips(data->domain, 32, 1, in brcmstb_l2_intc_of_init()
200 np->full_name, init_params->handler, clr, set, flags); in brcmstb_l2_intc_of_init()
210 data->gc = irq_get_domain_generic_chip(data->domain, 0); in brcmstb_l2_intc_of_init()
211 data->gc->reg_base = base; in brcmstb_l2_intc_of_init()
212 data->gc->private = data; in brcmstb_l2_intc_of_init()
213 data->status_offset = init_params->cpu_status; in brcmstb_l2_intc_of_init()
214 data->mask_offset = init_params->cpu_mask_status; in brcmstb_l2_intc_of_init()
216 ct = data->gc->chip_types; in brcmstb_l2_intc_of_init()
218 if (init_params->cpu_clear >= 0) { in brcmstb_l2_intc_of_init()
219 ct->regs.ack = init_params->cpu_clear; in brcmstb_l2_intc_of_init()
220 ct->chip.irq_ack = irq_gc_ack_set_bit; in brcmstb_l2_intc_of_init()
221 ct->chip.irq_mask_ack = irq_gc_mask_disable_and_ack_set; in brcmstb_l2_intc_of_init()
223 /* No Ack - but still slightly more efficient to define this */ in brcmstb_l2_intc_of_init()
224 ct->chip.irq_mask_ack = irq_gc_mask_disable_reg; in brcmstb_l2_intc_of_init()
227 ct->chip.irq_mask = irq_gc_mask_disable_reg; in brcmstb_l2_intc_of_init()
228 ct->regs.disable = init_params->cpu_mask_set; in brcmstb_l2_intc_of_init()
229 ct->regs.mask = init_params->cpu_mask_status; in brcmstb_l2_intc_of_init()
231 ct->chip.irq_unmask = irq_gc_unmask_enable_reg; in brcmstb_l2_intc_of_init()
232 ct->regs.enable = init_params->cpu_mask_clear; in brcmstb_l2_intc_of_init()
234 ct->chip.irq_suspend = brcmstb_l2_intc_suspend; in brcmstb_l2_intc_of_init()
235 ct->chip.irq_resume = brcmstb_l2_intc_resume; in brcmstb_l2_intc_of_init()
236 ct->chip.irq_pm_shutdown = brcmstb_l2_intc_shutdown; in brcmstb_l2_intc_of_init()
238 if (data->can_wake) { in brcmstb_l2_intc_of_init()
242 data->gc->wake_enabled = 0xffffffff; in brcmstb_l2_intc_of_init()
243 ct->chip.irq_set_wake = irq_gc_set_wake; in brcmstb_l2_intc_of_init()
247 pr_info("registered L2 intc (%pOF, parent irq: %d)\n", np, parent_irq); in brcmstb_l2_intc_of_init()
252 irq_domain_remove(data->domain); in brcmstb_l2_intc_of_init()
254 iounmap(base); in brcmstb_l2_intc_of_init()
261 struct device_node *parent) in brcmstb_l2_edge_intc_of_init() argument
263 return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init); in brcmstb_l2_edge_intc_of_init()
267 struct device_node *parent) in brcmstb_l2_lvl_intc_of_init() argument
269 return brcmstb_l2_intc_of_init(np, parent, &l2_lvl_intc_init); in brcmstb_l2_lvl_intc_of_init()
273 IRQCHIP_MATCH("brcm,l2-intc", brcmstb_l2_edge_intc_of_init)
274 IRQCHIP_MATCH("brcm,hif-spi-l2-intc", brcmstb_l2_edge_intc_of_init)
275 IRQCHIP_MATCH("brcm,upg-aux-aon-l2-intc", brcmstb_l2_edge_intc_of_init)
276 IRQCHIP_MATCH("brcm,bcm7271-l2-intc", brcmstb_l2_lvl_intc_of_init)
278 MODULE_DESCRIPTION("Broadcom STB generic L2 interrupt controller");