Lines Matching +full:ar7100 +full:- +full:misc +full:- +full:intc
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Atheros AR71xx/AR724x/AR913x MISC interrupt controller
6 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
7 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
38 void __iomem *base = domain->host_data; in ath79_misc_irq_handler()
65 unsigned int irq = d->hwirq; in ar71xx_misc_irq_unmask()
78 unsigned int irq = d->hwirq; in ar71xx_misc_irq_mask()
91 unsigned int irq = d->hwirq; in ar724x_misc_irq_ack()
102 .name = "MISC",
110 irq_set_chip_data(irq, d->host_data); in misc_map()
122 void __iomem *base = domain->host_data; in ath79_misc_intc_domain_init()
142 pr_err("Failed to get MISC IRQ\n"); in ath79_misc_intc_of_init()
143 return -EINVAL; in ath79_misc_intc_of_init()
148 pr_err("Failed to get MISC IRQ registers\n"); in ath79_misc_intc_of_init()
149 return -ENOMEM; in ath79_misc_intc_of_init()
155 pr_err("Failed to add MISC irqdomain\n"); in ath79_misc_intc_of_init()
156 return -EINVAL; in ath79_misc_intc_of_init()
170 IRQCHIP_DECLARE(ar7100_misc_intc, "qca,ar7100-misc-intc",
180 IRQCHIP_DECLARE(ar7240_misc_intc, "qca,ar7240-misc-intc",