Lines Matching refs:MTK_IOMMU_HAS_FLAG

154 #define MTK_IOMMU_HAS_FLAG(pdata, _x)	MTK_IOMMU_HAS_FLAG_MASK(pdata, _x, _x)  macro
418 check_pm_status = !MTK_IOMMU_HAS_FLAG(data->plat_data, PM_CLK_AO); in mtk_iommu_tlb_flush_range_sync()
481 if (MTK_IOMMU_HAS_FLAG(plat_data, IOVA_34_EN)) { in mtk_iommu_isr()
490 if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_SUB_COMM_2BITS)) { in mtk_iommu_isr()
494 } else if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_SUB_COMM_3BITS)) { in mtk_iommu_isr()
498 } else if (MTK_IOMMU_HAS_FLAG(plat_data, INT_ID_PORT_WIDTH_6)) { in mtk_iommu_isr()
614 if (MTK_IOMMU_HAS_FLAG(data->plat_data, CFG_IFA_MASTER_IN_ATF)) { in mtk_iommu_config()
660 .ias = MTK_IOMMU_HAS_FLAG(data->plat_data, IOVA_34_EN) ? 34 : 32, in mtk_iommu_domain_finalise()
664 if (MTK_IOMMU_HAS_FLAG(data->plat_data, PGTABLE_PA_35_EN)) in mtk_iommu_domain_finalise()
667 if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_4GB_MODE)) in mtk_iommu_domain_finalise()
1043 if (MTK_IOMMU_HAS_FLAG(data->plat_data, TF_PORT_TO_ADDR_MT8173)) { in mtk_iommu_hw_init()
1053 MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_VLD_PA_RNG)) { in mtk_iommu_hw_init()
1061 if (MTK_IOMMU_HAS_FLAG(data->plat_data, DCM_DISABLE)) in mtk_iommu_hw_init()
1066 if (MTK_IOMMU_HAS_FLAG(data->plat_data, WR_THROT_EN)) { in mtk_iommu_hw_init()
1073 if (MTK_IOMMU_HAS_FLAG(data->plat_data, RESET_AXI)) { in mtk_iommu_hw_init()
1078 if (!MTK_IOMMU_HAS_FLAG(data->plat_data, STD_AXI_MODE)) in mtk_iommu_hw_init()
1080 if (MTK_IOMMU_HAS_FLAG(data->plat_data, OUT_ORDER_WR_EN)) in mtk_iommu_hw_init()
1103 if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_LEGACY_IVRP_PADDR)) in mtk_iommu_hw_init()
1271 if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_4GB_MODE)) { in mtk_iommu_probe()
1337 if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_BCLK)) { in mtk_iommu_probe()
1343 if (MTK_IOMMU_HAS_FLAG(data->plat_data, PGTABLE_PA_35_EN)) { in mtk_iommu_probe()
1360 !MTK_IOMMU_HAS_FLAG(data->plat_data, CFG_IFA_MASTER_IN_ATF)) { in mtk_iommu_probe()
1372 if (MTK_IOMMU_HAS_FLAG(data->plat_data, SHARE_PGTABLE)) { in mtk_iommu_probe()