Lines Matching +full:bman +full:- +full:portal +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-only
7 #define pr_fmt(fmt) "fsl-pamu: %s: " fmt, __func__
41 * "fsl,qoriq-device-config-2.0" corresponds to T4 & B4
42 * SOCs. For the older SOCs "fsl,qoriq-device-config-1.0"
46 { .compatible = "fsl,qoriq-device-config-1.0", },
47 { .compatible = "fsl,qoriq-device-config-2.0", },
54 * "fsl,t4240-l3-cache-controller" corresponds to T4,
55 * "fsl,b4860-l3-cache-controller" corresponds to B4 &
56 * "fsl,p4080-l3-cache-controller" corresponds to other,
60 { .compatible = "fsl,t4240-l3-cache-controller", },
61 { .compatible = "fsl,b4860-l3-cache-controller", },
62 { .compatible = "fsl,p4080-l3-cache-controller", },
70 * pamu_get_ppaace() - Return the primary PACCE
87 * pamu_enable_liodn() - Set valid bit of PACCE
99 return -ENOENT; in pamu_enable_liodn()
102 if (!get_bf(ppaace->addr_bitfields, PPAACE_AF_WSE)) { in pamu_enable_liodn()
104 return -EINVAL; in pamu_enable_liodn()
110 set_bf(ppaace->addr_bitfields, PAACE_AF_V, PAACE_V_VALID); in pamu_enable_liodn()
117 * pamu_disable_liodn() - Clears valid bit of PACCE
129 return -ENOENT; in pamu_disable_liodn()
132 set_bf(ppaace->addr_bitfields, PAACE_AF_V, PAACE_V_INVALID); in pamu_disable_liodn()
142 BUG_ON(addrspace_size & (addrspace_size - 1)); in map_addrspace_size_to_wse()
144 /* window size is 2^(WSE+1) bytes */ in map_addrspace_size_to_wse()
145 return fls64(addrspace_size) - 2; in map_addrspace_size_to_wse()
154 set_bf(ppaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_PRIMARY); in pamu_init_ppaace()
156 set_bf(ppaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR, in pamu_init_ppaace()
171 return -ENOENT; in pamu_update_paace_stash()
173 set_bf(paace->impl_attr, PAACE_IA_CID, value); in pamu_update_paace_stash()
181 * pamu_config_ppaace() - Sets up PPAACE entry for specified liodn
184 * @omi: Operation mapping index -- if ~omi == 0 then omi not defined
185 * @stashid: cache stash id for associated cpu -- if ~stashid == 0 then
197 return -ENOENT; in pamu_config_ppaace()
199 /* window size is 2^(WSE+1) bytes */ in pamu_config_ppaace()
200 set_bf(ppaace->addr_bitfields, PPAACE_AF_WSE, in pamu_config_ppaace()
201 map_addrspace_size_to_wse(1ULL << 36)); in pamu_config_ppaace()
205 ppaace->wbah = 0; in pamu_config_ppaace()
206 set_bf(ppaace->addr_bitfields, PPAACE_AF_WBAL, 0); in pamu_config_ppaace()
210 set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED); in pamu_config_ppaace()
211 ppaace->op_encode.index_ot.omi = omi; in pamu_config_ppaace()
214 return -ENODEV; in pamu_config_ppaace()
219 set_bf(ppaace->impl_attr, PAACE_IA_CID, stashid); in pamu_config_ppaace()
221 set_bf(ppaace->impl_attr, PAACE_IA_ATM, PAACE_ATM_WINDOW_XLATE); in pamu_config_ppaace()
222 ppaace->twbah = 0; in pamu_config_ppaace()
223 set_bf(ppaace->win_bitfields, PAACE_WIN_TWBAL, 0); in pamu_config_ppaace()
224 set_bf(ppaace->addr_bitfields, PAACE_AF_AP, prot); in pamu_config_ppaace()
225 set_bf(ppaace->impl_attr, PAACE_IA_WCE, 0); in pamu_config_ppaace()
226 set_bf(ppaace->addr_bitfields, PPAACE_AF_MW, 0); in pamu_config_ppaace()
233 * get_ome_index() - Returns the index in the operation mapping table
241 if (of_device_is_compatible(dev->of_node, "fsl,qman-portal")) in get_ome_index()
243 if (of_device_is_compatible(dev->of_node, "fsl,qman")) in get_ome_index()
248 * get_stash_id - Returns stash destination id corresponding to a
268 prop = of_get_property(node, "cache-stash-id", NULL); in get_stash_id()
270 pr_debug("missing cache-stash-id at %pOF\n", in get_stash_id()
285 found = 1; in get_stash_id()
295 prop = of_get_property(node, "cache-stash-id", NULL); in get_stash_id()
297 pr_debug("missing cache-stash-id at %pOF\n", in get_stash_id()
306 prop = of_get_property(node, "next-level-cache", NULL); in get_stash_id()
308 pr_debug("can't find next-level-cache at %pOF\n", node); in get_stash_id()
327 /* Identify if the PAACT table entry belongs to QMAN, BMAN or QMAN Portal */
328 #define QMAN_PAACE 1
333 * Setup operation mapping and stash destinations for QMAN and QMAN portal.
334 * Memory accesses to QMAN and BMAN private memory need not be coherent, so
341 set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED); in setup_qbman_paace()
342 ppaace->op_encode.index_ot.omi = OMI_QMAN_PRIV; in setup_qbman_paace()
344 set_bf(ppaace->impl_attr, PAACE_IA_CID, get_stash_id(PAMU_ATTR_CACHE_L3, 0)); in setup_qbman_paace()
345 set_bf(ppaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR, in setup_qbman_paace()
349 set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED); in setup_qbman_paace()
350 ppaace->op_encode.index_ot.omi = OMI_QMAN; in setup_qbman_paace()
352 set_bf(ppaace->impl_attr, PAACE_IA_CID, get_stash_id(PAMU_ATTR_CACHE_L3, 0)); in setup_qbman_paace()
355 set_bf(ppaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR, in setup_qbman_paace()
374 ome->moe[IOE_READ_IDX] = EOE_VALID | EOE_READ; in setup_omt()
375 ome->moe[IOE_EREAD0_IDX] = EOE_VALID | EOE_RSA; in setup_omt()
376 ome->moe[IOE_WRITE_IDX] = EOE_VALID | EOE_WRITE; in setup_omt()
377 ome->moe[IOE_EWRITE0_IDX] = EOE_VALID | EOE_WWSAO; in setup_omt()
379 ome->moe[IOE_DIRECT0_IDX] = EOE_VALID | EOE_LDEC; in setup_omt()
380 ome->moe[IOE_DIRECT1_IDX] = EOE_VALID | EOE_LDECPE; in setup_omt()
384 ome->moe[IOE_READ_IDX] = EOE_VALID | EOE_READI; in setup_omt()
385 ome->moe[IOE_WRITE_IDX] = EOE_VALID | EOE_WRITE; in setup_omt()
389 ome->moe[IOE_READ_IDX] = EOE_VALID | EOE_READ; in setup_omt()
390 ome->moe[IOE_WRITE_IDX] = EOE_VALID | EOE_WRITE; in setup_omt()
391 ome->moe[IOE_EREAD0_IDX] = EOE_VALID | EOE_RSA; in setup_omt()
392 ome->moe[IOE_EWRITE0_IDX] = EOE_VALID | EOE_WWSA; in setup_omt()
396 ome->moe[IOE_READ_IDX] = EOE_VALID | EOE_READI; in setup_omt()
397 ome->moe[IOE_WRITE_IDX] = EOE_VALID | EOE_WRITE; in setup_omt()
410 max_subwindow_count = 1 << (1 + PAMU_PC3_MWCE(pc_val)); in get_pamu_cap_values()
427 out_be32(&pamu_regs->ppbah, upper_32_bits(ppaact_phys)); in setup_one_pamu()
428 out_be32(&pamu_regs->ppbal, lower_32_bits(ppaact_phys)); in setup_one_pamu()
430 out_be32(&pamu_regs->pplah, upper_32_bits(ppaact_phys)); in setup_one_pamu()
431 out_be32(&pamu_regs->pplal, lower_32_bits(ppaact_phys)); in setup_one_pamu()
433 out_be32(&pamu_regs->spbah, upper_32_bits(spaact_phys)); in setup_one_pamu()
434 out_be32(&pamu_regs->spbal, lower_32_bits(spaact_phys)); in setup_one_pamu()
436 out_be32(&pamu_regs->splah, upper_32_bits(spaact_phys)); in setup_one_pamu()
437 out_be32(&pamu_regs->splal, lower_32_bits(spaact_phys)); in setup_one_pamu()
439 out_be32(&pamu_regs->obah, upper_32_bits(omt_phys)); in setup_one_pamu()
440 out_be32(&pamu_regs->obal, lower_32_bits(omt_phys)); in setup_one_pamu()
442 out_be32(&pamu_regs->olah, upper_32_bits(omt_phys)); in setup_one_pamu()
443 out_be32(&pamu_regs->olal, lower_32_bits(omt_phys)); in setup_one_pamu()
477 /* window size is 2^(WSE+1) bytes */ in setup_liodns()
478 set_bf(ppaace->addr_bitfields, PPAACE_AF_WSE, 35); in setup_liodns()
479 ppaace->wbah = 0; in setup_liodns()
480 set_bf(ppaace->addr_bitfields, PPAACE_AF_WBAL, 0); in setup_liodns()
481 set_bf(ppaace->impl_attr, PAACE_IA_ATM, in setup_liodns()
483 set_bf(ppaace->addr_bitfields, PAACE_AF_AP, in setup_liodns()
485 if (of_device_is_compatible(node, "fsl,qman-portal")) in setup_liodns()
489 if (of_device_is_compatible(node, "fsl,bman")) in setup_liodns()
505 for (i = 0; i < data->count; i++) { in pamu_av_isr()
506 void __iomem *p = data->pamu_reg_base + i * PAMU_OFFSET; in pamu_av_isr()
543 if (!get_bf(paace->addr_bitfields, PAACE_AF_V)) { in pamu_av_isr()
545 * As per hardware erratum A-003638, access in pamu_av_isr()
597 np = of_find_compatible_node(NULL, NULL, "fsl,corenet-law"); in create_csd()
599 return -ENODEV; in create_csd()
601 iprop = of_get_property(np, "fsl,num-laws", NULL); in create_csd()
603 ret = -ENODEV; in create_csd()
609 ret = -ENODEV; in create_csd()
615 ret = -ENODEV; in create_csd()
624 np = of_find_compatible_node(NULL, NULL, "fsl,corenet-cf"); in create_csd()
626 ret = -ENODEV; in create_csd()
630 iprop = of_get_property(np, "fsl,ccf-num-csdids", NULL); in create_csd()
632 ret = -ENODEV; in create_csd()
638 ret = -ENODEV; in create_csd()
644 ret = -ENOMEM; in create_csd()
681 ret = -ENOENT; in create_csd()
686 while (law[--i].lawar & LAWAR_EN) { in create_csd()
689 ret = -ENOENT; in create_csd()
718 * All future CoreNet-enabled SOCs will have this erratum(A-004510) fixed, so this
746 struct device *dev = &pdev->dev; in fsl_pamu_probe()
773 return -EBUSY; in fsl_pamu_probe()
775 pamu_regs = of_iomap(dev->of_node, 0); in fsl_pamu_probe()
778 return -ENOMEM; in fsl_pamu_probe()
780 of_get_address(dev->of_node, 0, &size, NULL); in fsl_pamu_probe()
782 irq = irq_of_parse_and_map(dev->of_node, 0); in fsl_pamu_probe()
790 ret = -ENOMEM; in fsl_pamu_probe()
793 data->pamu_reg_base = pamu_regs; in fsl_pamu_probe()
794 data->count = size / PAMU_OFFSET; in fsl_pamu_probe()
805 dev_err(dev, "could not find GUTS node %pOF\n", dev->of_node); in fsl_pamu_probe()
806 ret = -ENODEV; in fsl_pamu_probe()
814 ret = -ENODEV; in fsl_pamu_probe()
834 ret = -ENOMEM; in fsl_pamu_probe()
842 if (ppaact_phys & ((PAGE_SIZE << order) - 1)) { in fsl_pamu_probe()
844 ret = -ENOMEM; in fsl_pamu_probe()
853 /* Check to see if we need to implement the work-around on this SOC */ in fsl_pamu_probe()
879 pamubypenr = in_be32(&guts_regs->pamubypenr); in fsl_pamu_probe()
882 pamu_reg_off += PAMU_OFFSET, pamu_counter >>= 1) { in fsl_pamu_probe()
894 out_be32(&guts_regs->pamubypenr, pamubypenr); in fsl_pamu_probe()
928 .name = "fsl-of-pamu",
953 * binding for the PAMU nodes doesn't allow for any parent-child in fsl_pamu_init()
961 return -ENODEV; in fsl_pamu_init()
970 pdev = platform_device_alloc("fsl-of-pamu", 0); in fsl_pamu_init()
973 ret = -ENOMEM; in fsl_pamu_init()
976 pdev->dev.of_node = of_node_get(np); in fsl_pamu_init()
991 of_node_put(pdev->dev.of_node); in fsl_pamu_init()
992 pdev->dev.of_node = NULL; in fsl_pamu_init()