27 #include <linux/pci-ats.h>
1995 	 * ATS and PASID:  in arm_smmu_atc_inv_to_cmd()
2023 	 * In an ATS Invalidate Request, the address must be aligned on the  in arm_smmu_atc_inv_to_cmd()
2094 	 * ATS was enabled at the PCI device before completion of the TLBI.  in arm_smmu_atc_inv_domain()
2590 		dev_err(master->dev, "Failed to enable ATS (STU %zu)\n", stu);  in arm_smmu_enable_ats()
2715  * If the device supports ATS then this determines if EATS should be enabled
2718  * The change of the EATS in the STE and the PCI ATS config space is managed by
2719  * this sequence to be in the right order so that if PCI ATS is enabled then
2722  * new_domain can be a non-paging domain. In this case ATS will not be enabled,
2743 		 * The SMMU does not support enabling ATS with bypass/abort.  in arm_smmu_attach_prepare()
2744 		 * When the STE is in bypass (STE.Config[2:0] == 0b100), ATS  in arm_smmu_attach_prepare()
2746 		 * as though ATS is disabled for the stream (STE.EATS == 0b00),  in arm_smmu_attach_prepare()
2748 		 * (IHI0070Ea 5.2 Stream Table Entry). Thus ATS can only be  in arm_smmu_attach_prepare()
2769 		 * HW. This ensures that both domains will send ATS  in arm_smmu_attach_prepare()
2773 		 * using ATS, but arm_smmu_share_asid() also uses this to change  in arm_smmu_attach_prepare()
2774 		 * the ASID of a domain, unrelated to ATS.  in arm_smmu_attach_prepare()
2799 		 * ATS should complete before the STE is configured to generate  in arm_smmu_attach_prepare()
2828 		/* ATS is being switched off, invalidate the entire ATC */  in arm_smmu_attach_commit()
3072 		 * If a CD table has to be present then we need to run with ATS  in arm_smmu_attach_dev_ste()
3073 		 * on even though the RID will fail ATS queries with UR. This is  in arm_smmu_attach_dev_ste()
3358 	 * Note that PASID must be enabled before, and disabled after ATS:  in arm_smmu_probe_device()
3359 	 * PCI Express Base 4.0r1.0 - 10.5.1.3 ATS Control Register  in arm_smmu_probe_device()
4080 			dev_err(smmu->dev, "failed to enable ATS check\n");  in arm_smmu_device_reset()