Lines Matching +full:0 +full:xffff
47 OCRDMA_ASIC_GEN_SKH_R = 0x04,
48 OCRDMA_ASIC_GEN_LANCER = 0x0B
52 OCRDMA_ASIC_REV_A0 = 0x00,
53 OCRDMA_ASIC_REV_B0 = 0x10,
54 OCRDMA_ASIC_REV_C0 = 0x20
129 OCRDMA_DB_RQ_OFFSET = 0xE0,
130 OCRDMA_DB_GEN2_RQ_OFFSET = 0x100,
131 OCRDMA_DB_SQ_OFFSET = 0x60,
132 OCRDMA_DB_GEN2_SQ_OFFSET = 0x1C0,
135 OCRDMA_DB_CQ_OFFSET = 0x120,
137 OCRDMA_DB_MQ_OFFSET = 0x140,
144 OCRDMA_L3_TYPE_IB_GRH = 0x00,
145 OCRDMA_L3_TYPE_IPV4 = 0x01,
146 OCRDMA_L3_TYPE_IPV6 = 0x02
149 #define OCRDMA_DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
150 #define OCRDMA_DB_CQ_RING_ID_EXT_MASK 0x0C00 /* bits 10-11 of qid at 12-11 */
152 #define OCRDMA_DB_CQ_RING_ID_EXT_MASK_SHIFT 0x1
159 #define OCRDMA_EQ_ID_MASK 0x1FF /* bits 0 - 8 */
160 #define OCRDMA_EQ_ID_EXT_MASK 0x3e00 /* bits 9-13 */
172 #define OCRDMA_MQ_ID_MASK 0x7FF /* bits 0 - 10 */
181 #define OCRDMA_SLI_ASIC_ID_OFFSET 0x9C
182 #define OCRDMA_SLI_ASIC_REV_MASK 0x000000FF
183 #define OCRDMA_SLI_ASIC_GEN_NUM_MASK 0x0000FF00
184 #define OCRDMA_SLI_ASIC_GEN_NUM_SHIFT 0x08
186 # 0: 4K Bytes
216 OCRDMA_MCH_OPCODE_SHIFT = 0,
217 OCRDMA_MCH_OPCODE_MASK = 0xFF,
219 OCRDMA_MCH_SUBSYS_MASK = 0xFF00
231 OCRDMA_MBX_RSP_OPCODE_SHIFT = 0,
232 OCRDMA_MBX_RSP_OPCODE_MASK = 0xFF,
234 OCRDMA_MBX_RSP_SUBSYS_MASK = 0xFF << OCRDMA_MBX_RSP_SUBSYS_SHIFT,
236 OCRDMA_MBX_RSP_STATUS_SHIFT = 0,
237 OCRDMA_MBX_RSP_STATUS_MASK = 0xFF,
239 OCRDMA_MBX_RSP_ASTATUS_MASK = 0xFF << OCRDMA_MBX_RSP_ASTATUS_SHIFT
252 OCRDMA_MQE_NONEMBEDDED = 0
262 OCRDMA_MQE_HDR_EMB_SHIFT = 0,
263 OCRDMA_MQE_HDR_EMB_MASK = BIT(0),
265 OCRDMA_MQE_HDR_SGE_CNT_MASK = 0x1F << OCRDMA_MQE_HDR_SGE_CNT_SHIFT,
267 OCRDMA_MQE_HDR_SPECIAL_MASK = 0xFF << OCRDMA_MQE_HDR_SPECIAL_SHIFT
339 #define OCRDMA_EQ_MINOR_OTHER 0x1
365 OCRDMA_MCQE_STATUS_SHIFT = 0,
366 OCRDMA_MCQE_STATUS_MASK = 0xFFFF,
368 OCRDMA_MCQE_ESTATUS_MASK = 0xFFFF << OCRDMA_MCQE_ESTATUS_SHIFT,
388 OCRDMA_AE_MCQE_QPID_MASK = 0xFFFF,
391 OCRDMA_AE_MCQE_CQID_MASK = 0xFFFF,
396 0xFF << OCRDMA_AE_MCQE_EVENT_TYPE_SHIFT,
399 0xFF << OCRDMA_AE_MCQE_EVENT_CODE_SHIFT
409 OCRDMA_AE_PVID_MCQE_ENABLED_SHIFT = 0,
410 OCRDMA_AE_PVID_MCQE_ENABLED_MASK = 0xFF,
412 OCRDMA_AE_PVID_MCQE_TAG_MASK = 0xFFFF << OCRDMA_AE_PVID_MCQE_TAG_SHIFT
424 OCRDMA_AE_MPA_MCQE_REQ_ID_MASK = 0xFFFF <<
428 OCRDMA_AE_MPA_MCQE_EVENT_CODE_MASK = 0xFF <<
431 OCRDMA_AE_MPA_MCQE_EVENT_TYPE_MASK = 0xFF <<
447 OCRDMA_AE_QP_MCQE_NEW_QP_STATE_SHIFT = 0,
448 OCRDMA_AE_QP_MCQE_NEW_QP_STATE_MASK = 0xFFFF,
450 OCRDMA_AE_QP_MCQE_QP_ID_MASK = 0xFFFF <<
454 OCRDMA_AE_QP_MCQE_EVENT_CODE_MASK = 0xFF <<
457 OCRDMA_AE_QP_MCQE_EVENT_TYPE_MASK = 0xFF <<
473 OCRDMA_ASYNC_LINK_EVE_CODE = 0x01,
474 OCRDMA_ASYNC_GRP5_EVE_CODE = 0x05,
475 OCRDMA_ASYNC_RDMA_EVE_CODE = 0x14
479 OCRDMA_ASYNC_EVENT_QOS_VALUE = 0x01,
480 OCRDMA_ASYNC_EVENT_COS_VALUE = 0x02,
481 OCRDMA_ASYNC_EVENT_PVID_STATE = 0x03
485 OCRDMA_CQ_ERROR = 0x00,
486 OCRDMA_CQ_OVERRUN_ERROR = 0x01,
487 OCRDMA_CQ_QPCAT_ERROR = 0x02,
488 OCRDMA_QP_ACCESS_ERROR = 0x03,
489 OCRDMA_QP_COMM_EST_EVENT = 0x04,
490 OCRDMA_SQ_DRAINED_EVENT = 0x05,
491 OCRDMA_DEVICE_FATAL_EVENT = 0x08,
492 OCRDMA_SRQCAT_ERROR = 0x0E,
493 OCRDMA_SRQ_LIMIT_EVENT = 0x0F,
494 OCRDMA_QP_LAST_WQE_EVENT = 0x10,
507 OCRDMA_AE_LSC_PORT_NUM_MASK = 0x3F,
508 OCRDMA_AE_LSC_PT_SHIFT = 0x06,
509 OCRDMA_AE_LSC_PT_MASK = (0x03 <<
511 OCRDMA_AE_LSC_LS_SHIFT = 0x08,
512 OCRDMA_AE_LSC_LS_MASK = (0xFF <<
514 OCRDMA_AE_LSC_LD_SHIFT = 0x10,
515 OCRDMA_AE_LSC_LD_MASK = (0xFF <<
517 OCRDMA_AE_LSC_PPS_SHIFT = 0x18,
518 OCRDMA_AE_LSC_PPS_MASK = (0xFF <<
520 OCRDMA_AE_LSC_PPF_MASK = 0xFF,
521 OCRDMA_AE_LSC_ER_SHIFT = 0x08,
522 OCRDMA_AE_LSC_ER_MASK = (0xFF <<
524 OCRDMA_AE_LSC_QOS_SHIFT = 0x10,
525 OCRDMA_AE_LSC_QOS_MASK = (0xFFFF <<
530 OCRDMA_AE_LSC_PLINK_DOWN = 0x00,
531 OCRDMA_AE_LSC_PLINK_UP = 0x01,
532 OCRDMA_AE_LSC_LLINK_DOWN = 0x02,
533 OCRDMA_AE_LSC_LLINK_MASK = 0x02,
534 OCRDMA_AE_LSC_LLINK_UP = 0x03
544 OCRDMA_MBX_QUERY_CFG_MAX_QP_MASK = 0xFFFFFF <<
548 OCRDMA_MBX_QUERY_CFG_MAX_PD_MASK = 0xFFFF <<
551 OCRDMA_MBX_QUERY_CFG_CA_ACK_DELAY_MASK = 0xFF <<
554 OCRDMA_MBX_QUERY_CFG_L3_TYPE_MASK = 0x18,
555 OCRDMA_MBX_QUERY_CFG_MAX_SEND_SGE_SHIFT = 0,
556 OCRDMA_MBX_QUERY_CFG_MAX_SEND_SGE_MASK = 0xFFFF,
558 OCRDMA_MBX_QUERY_CFG_MAX_RECV_SGE_MASK = 0xFFFF <<
561 OCRDMA_MBX_QUERY_CFG_MAX_ORD_PER_QP_SHIFT = 0,
562 OCRDMA_MBX_QUERY_CFG_MAX_ORD_PER_QP_MASK = 0xFFFF,
564 OCRDMA_MBX_QUERY_CFG_MAX_IRD_PER_QP_MASK = 0xFFFF <<
568 OCRDMA_MBX_QUERY_CFG_MAX_WQE_SIZE_MASK = 0xFF <<
571 OCRDMA_MBX_QUERY_CFG_MAX_RQE_SIZE_MASK = 0xFF <<
573 OCRDMA_MBX_QUERY_CFG_MAX_DPP_CQES_OFFSET = 0,
574 OCRDMA_MBX_QUERY_CFG_MAX_DPP_CQES_MASK = 0xFFFF <<
578 OCRDMA_MBX_QUERY_CFG_MAX_SRQ_MASK = 0xFFFF <<
580 OCRDMA_MBX_QUERY_CFG_MAX_RPIR_QPS_OFFSET = 0,
581 OCRDMA_MBX_QUERY_CFG_MAX_RPIR_QPS_MASK = 0xFFFF <<
585 OCRDMA_MBX_QUERY_CFG_MAX_DPP_PDS_MASK = 0xFFFF <<
587 OCRDMA_MBX_QUERY_CFG_MAX_DPP_CREDITS_OFFSET = 0,
588 OCRDMA_MBX_QUERY_CFG_MAX_DPP_CREDITS_MASK = 0xFFFF <<
591 OCRDMA_MBX_QUERY_CFG_MAX_DPP_QPS_OFFSET = 0,
592 OCRDMA_MBX_QUERY_CFG_MAX_DPP_QPS_MASK = 0xFFFF <<
596 OCRDMA_MBX_QUERY_CFG_MAX_WQES_PER_WQ_MASK = 0xFFFF <<
598 OCRDMA_MBX_QUERY_CFG_MAX_RQES_PER_RQ_OFFSET = 0,
599 OCRDMA_MBX_QUERY_CFG_MAX_RQES_PER_RQ_MASK = 0xFFFF <<
603 OCRDMA_MBX_QUERY_CFG_MAX_CQ_MASK = 0xFFFF <<
605 OCRDMA_MBX_QUERY_CFG_MAX_CQES_PER_CQ_OFFSET = 0,
606 OCRDMA_MBX_QUERY_CFG_MAX_CQES_PER_CQ_MASK = 0xFFFF <<
610 OCRDMA_MBX_QUERY_CFG_MAX_SRQ_RQE_MASK = 0xFFFF <<
612 OCRDMA_MBX_QUERY_CFG_MAX_SRQ_SGE_OFFSET = 0,
613 OCRDMA_MBX_QUERY_CFG_MAX_SRQ_SGE_MASK = 0xFFFF <<
615 OCRDMA_MBX_QUERY_CFG_MAX_RD_SGE_SHIFT = 0,
616 OCRDMA_MBX_QUERY_CFG_MAX_RD_SGE_MASK = 0xFFFF,
682 OCRDMA_FN_MODE_RDMA = 0x4
686 OCRDMA_IF_TYPE_MASK = 0xFFFF0000,
687 OCRDMA_IF_TYPE_SHIFT = 0x10,
688 OCRDMA_PHY_TYPE_MASK = 0x0000FFFF,
689 OCRDMA_FUTURE_DETAILS_MASK = 0xFFFF0000,
690 OCRDMA_FUTURE_DETAILS_SHIFT = 0x10,
691 OCRDMA_EX_PHY_DETAILS_MASK = 0x0000FFFF,
692 OCRDMA_FSPEED_SUPP_MASK = 0xFFFF0000,
693 OCRDMA_FSPEED_SUPP_SHIFT = 0x10,
694 OCRDMA_ASPEED_SUPP_MASK = 0x0000FFFF
709 OCRDMA_PHY_SPEED_ZERO = 0x0,
710 OCRDMA_PHY_SPEED_10MBPS = 0x1,
711 OCRDMA_PHY_SPEED_100MBPS = 0x2,
712 OCRDMA_PHY_SPEED_1GBPS = 0x4,
713 OCRDMA_PHY_SPEED_10GBPS = 0x8,
714 OCRDMA_PHY_SPEED_40GBPS = 0x20
718 OCRDMA_PORT_NUM_MASK = 0x3F,
719 OCRDMA_PT_MASK = 0xC0,
720 OCRDMA_PT_SHIFT = 0x6,
721 OCRDMA_LINK_DUP_MASK = 0x0000FF00,
722 OCRDMA_LINK_DUP_SHIFT = 0x8,
723 OCRDMA_PHY_PS_MASK = 0x00FF0000,
724 OCRDMA_PHY_PS_SHIFT = 0x10,
725 OCRDMA_PHY_PFLT_MASK = 0xFF000000,
726 OCRDMA_PHY_PFLT_SHIFT = 0x18,
727 OCRDMA_QOS_LNKSP_MASK = 0xFFFF0000,
728 OCRDMA_QOS_LNKSP_SHIFT = 0x10,
729 OCRDMA_LINK_ST_MASK = 0x01,
730 OCRDMA_PLFC_MASK = 0x00000400,
731 OCRDMA_PLFC_SHIFT = 0x8,
732 OCRDMA_PLRFC_MASK = 0x00000200,
733 OCRDMA_PLRFC_SHIFT = 0x8,
734 OCRDMA_PLTFC_MASK = 0x00000100,
735 OCRDMA_PLTFC_SHIFT = 0x8
748 OCRDMA_PHYS_LINK_SPEED_ZERO = 0x0,
749 OCRDMA_PHYS_LINK_SPEED_10MBPS = 0x1,
750 OCRDMA_PHYS_LINK_SPEED_100MBPS = 0x2,
751 OCRDMA_PHYS_LINK_SPEED_1GBPS = 0x3,
752 OCRDMA_PHYS_LINK_SPEED_10GBPS = 0x4,
753 OCRDMA_PHYS_LINK_SPEED_20GBPS = 0x5,
754 OCRDMA_PHYS_LINK_SPEED_25GBPS = 0x6,
755 OCRDMA_PHYS_LINK_SPEED_40GBPS = 0x7,
756 OCRDMA_PHYS_LINK_SPEED_100GBPS = 0x8
763 OCRDMA_CREATE_CQ_PAGE_CNT_MASK = 0xFFFF,
765 OCRDMA_CREATE_CQ_PAGE_SIZE_MASK = 0xFF,
772 OCRDMA_CREATE_CQ_EQ_ID_MASK = 0xFFFF,
773 OCRDMA_CREATE_CQ_CQE_COUNT_MASK = 0xFFFF
777 OCRDMA_CREATE_CQ_VER0 = 0,
806 OCRDMA_CREATE_CQ_CMD_PDID_SHIFT = 0x10
810 OCRDMA_CREATE_CQ_RSP_CQ_ID_MASK = 0xFFFF
828 OCRDMA_CREATE_MQ_ASYNC_CQ_VALID = BIT(0)
848 OCRDMA_DESTROY_CQ_QID_SHIFT = 0,
849 OCRDMA_DESTROY_CQ_QID_MASK = 0xFFFF,
851 OCRDMA_DESTROY_CQ_QID_BYPASS_FLUSH_MASK = 0xFFFF <<
874 OCRDMA_CREATE_QP_REQ_PD_ID_SHIFT = 0,
875 OCRDMA_CREATE_QP_REQ_PD_ID_MASK = 0xFFFF,
881 OCRDMA_CREATE_QP_REQ_MAX_RQE_SHIFT = 0,
882 OCRDMA_CREATE_QP_REQ_MAX_RQE_MASK = 0xFFFF,
884 OCRDMA_CREATE_QP_REQ_MAX_WQE_MASK = 0xFFFF <<
887 OCRDMA_CREATE_QP_REQ_MAX_SGE_WRITE_SHIFT = 0,
888 OCRDMA_CREATE_QP_REQ_MAX_SGE_WRITE_MASK = 0xFFFF,
890 OCRDMA_CREATE_QP_REQ_MAX_SGE_SEND_MASK = 0xFFFF <<
893 OCRDMA_CREATE_QP_REQ_FMR_EN_SHIFT = 0,
894 OCRDMA_CREATE_QP_REQ_FMR_EN_MASK = BIT(0),
912 OCRDMA_CREATE_QP_REQ_MAX_SGE_RECV_MASK = 0xFFFF <<
915 OCRDMA_CREATE_QP_REQ_MAX_IRD_SHIFT = 0,
916 OCRDMA_CREATE_QP_REQ_MAX_IRD_MASK = 0xFFFF,
918 OCRDMA_CREATE_QP_REQ_MAX_ORD_MASK = 0xFFFF <<
921 OCRDMA_CREATE_QP_REQ_NUM_RQ_PAGES_SHIFT = 0,
922 OCRDMA_CREATE_QP_REQ_NUM_RQ_PAGES_MASK = 0xFFFF,
924 OCRDMA_CREATE_QP_REQ_NUM_WQ_PAGES_MASK = 0xFFFF <<
927 OCRDMA_CREATE_QP_REQ_RQE_SIZE_SHIFT = 0,
928 OCRDMA_CREATE_QP_REQ_RQE_SIZE_MASK = 0xFFFF,
930 OCRDMA_CREATE_QP_REQ_WQE_SIZE_MASK = 0xFFFF <<
933 OCRDMA_CREATE_QP_REQ_RQ_CQID_SHIFT = 0,
934 OCRDMA_CREATE_QP_REQ_RQ_CQID_MASK = 0xFFFF,
936 OCRDMA_CREATE_QP_REQ_WQ_CQID_MASK = 0xFFFF <<
939 OCRDMA_CREATE_QP_REQ_DPP_CQPID_SHIFT = 0,
940 OCRDMA_CREATE_QP_REQ_DPP_CQPID_MASK = 0xFFFF,
942 OCRDMA_CREATE_QP_REQ_DPP_CREDIT_MASK = 0xFFFF <<
962 OCRDMA_QPS_RST = 0,
992 OCRDMA_CREATE_QP_RSP_QP_ID_SHIFT = 0,
993 OCRDMA_CREATE_QP_RSP_QP_ID_MASK = 0xFFFF,
995 OCRDMA_CREATE_QP_RSP_MAX_RQE_SHIFT = 0,
996 OCRDMA_CREATE_QP_RSP_MAX_RQE_MASK = 0xFFFF,
998 OCRDMA_CREATE_QP_RSP_MAX_WQE_MASK = 0xFFFF <<
1001 OCRDMA_CREATE_QP_RSP_MAX_SGE_WRITE_SHIFT = 0,
1002 OCRDMA_CREATE_QP_RSP_MAX_SGE_WRITE_MASK = 0xFFFF,
1004 OCRDMA_CREATE_QP_RSP_MAX_SGE_SEND_MASK = 0xFFFF <<
1008 OCRDMA_CREATE_QP_RSP_MAX_SGE_RECV_MASK = 0xFFFF <<
1011 OCRDMA_CREATE_QP_RSP_MAX_IRD_SHIFT = 0,
1012 OCRDMA_CREATE_QP_RSP_MAX_IRD_MASK = 0xFFFF,
1014 OCRDMA_CREATE_QP_RSP_MAX_ORD_MASK = 0xFFFF <<
1017 OCRDMA_CREATE_QP_RSP_RQ_ID_SHIFT = 0,
1018 OCRDMA_CREATE_QP_RSP_RQ_ID_MASK = 0xFFFF,
1020 OCRDMA_CREATE_QP_RSP_SQ_ID_MASK = 0xFFFF <<
1023 OCRDMA_CREATE_QP_RSP_DPP_ENABLED_MASK = BIT(0),
1025 OCRDMA_CREATE_QP_RSP_DPP_PAGE_OFFSET_MASK = 0x7FFF <<
1028 OCRDMA_CREATE_QP_RSP_DPP_CREDITS_MASK = 0xFFFF <<
1057 OCRDMA_MODIFY_QP_ID_SHIFT = 0,
1058 OCRDMA_MODIFY_QP_ID_MASK = 0xFFFF,
1060 OCRDMA_QP_PARA_QPS_VALID = BIT(0),
1088 OCRDMA_MODIFY_QP_FLAGS_RD = BIT(0),
1095 OCRDMA_QP_PARAMS_SRQ_ID_SHIFT = 0,
1096 OCRDMA_QP_PARAMS_SRQ_ID_MASK = 0xFFFF,
1098 OCRDMA_QP_PARAMS_MAX_RQE_SHIFT = 0,
1099 OCRDMA_QP_PARAMS_MAX_RQE_MASK = 0xFFFF,
1101 OCRDMA_QP_PARAMS_MAX_WQE_MASK = 0xFFFF <<
1104 OCRDMA_QP_PARAMS_MAX_SGE_WRITE_SHIFT = 0,
1105 OCRDMA_QP_PARAMS_MAX_SGE_WRITE_MASK = 0xFFFF,
1107 OCRDMA_QP_PARAMS_MAX_SGE_SEND_MASK = 0xFFFF <<
1110 OCRDMA_QP_PARAMS_FLAGS_FMR_EN = BIT(0),
1122 OCRDMA_QP_PARAMS_MAX_SGE_RECV_MASK = 0xFFFF <<
1125 OCRDMA_QP_PARAMS_MAX_IRD_SHIFT = 0,
1126 OCRDMA_QP_PARAMS_MAX_IRD_MASK = 0xFFFF,
1128 OCRDMA_QP_PARAMS_MAX_ORD_MASK = 0xFFFF <<
1131 OCRDMA_QP_PARAMS_RQ_CQID_SHIFT = 0,
1132 OCRDMA_QP_PARAMS_RQ_CQID_MASK = 0xFFFF,
1134 OCRDMA_QP_PARAMS_WQ_CQID_MASK = 0xFFFF <<
1137 OCRDMA_QP_PARAMS_RQ_PSN_SHIFT = 0,
1138 OCRDMA_QP_PARAMS_RQ_PSN_MASK = 0xFFFFFF,
1140 OCRDMA_QP_PARAMS_HOP_LMT_MASK = 0xFF <<
1143 OCRDMA_QP_PARAMS_SQ_PSN_SHIFT = 0,
1144 OCRDMA_QP_PARAMS_SQ_PSN_MASK = 0xFFFFFF,
1146 OCRDMA_QP_PARAMS_TCLASS_MASK = 0xFF <<
1149 OCRDMA_QP_PARAMS_DEST_QPN_SHIFT = 0,
1150 OCRDMA_QP_PARAMS_DEST_QPN_MASK = 0xFFFFFF,
1152 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK = 0x7 <<
1155 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK = 0x1F <<
1158 OCRDMA_QP_PARAMS_PKEY_IDNEX_SHIFT = 0,
1159 OCRDMA_QP_PARAMS_PKEY_INDEX_MASK = 0xFFFF,
1161 OCRDMA_QP_PARAMS_PATH_MTU_MASK = 0x3FFF <<
1164 OCRDMA_QP_PARAMS_FLOW_LABEL_SHIFT = 0,
1165 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK = 0xFFFFF,
1167 OCRDMA_QP_PARAMS_SL_MASK = 0xF <<
1170 OCRDMA_QP_PARAMS_RETRY_CNT_MASK = 0x7 <<
1173 OCRDMA_QP_PARAMS_RNR_NAK_TIMER_MASK = 0x1F <<
1176 OCRDMA_QP_PARAMS_DMAC_B4_TO_B5_SHIFT = 0,
1177 OCRDMA_QP_PARAMS_DMAC_B4_TO_B5_MASK = 0xFFFF,
1179 OCRDMA_QP_PARAMS_VLAN_MASK = 0xFFFF <<
1214 OCRDMA_MODIFY_QP_RSP_MAX_RQE_SHIFT = 0,
1215 OCRDMA_MODIFY_QP_RSP_MAX_RQE_MASK = 0xFFFF,
1217 OCRDMA_MODIFY_QP_RSP_MAX_WQE_MASK = 0xFFFF <<
1220 OCRDMA_MODIFY_QP_RSP_MAX_IRD_SHIFT = 0,
1221 OCRDMA_MODIFY_QP_RSP_MAX_IRD_MASK = 0xFFFF,
1223 OCRDMA_MODIFY_QP_RSP_MAX_ORD_MASK = 0xFFFF <<
1239 #define OCRDMA_QUERY_UP_QP_ID_SHIFT 0
1240 #define OCRDMA_QUERY_UP_QP_ID_MASK 0xFFFFFF
1253 OCRDMA_CREATE_SRQ_PD_ID_SHIFT = 0,
1254 OCRDMA_CREATE_SRQ_PD_ID_MASK = 0xFFFF,
1256 OCRDMA_CREATE_SRQ_PG_SZ_MASK = 0x3 <<
1259 OCRDMA_CREATE_SRQ_MAX_RQE_SHIFT = 0,
1261 OCRDMA_CREATE_SRQ_MAX_SGE_RECV_MASK = 0xFFFF <<
1264 OCRDMA_CREATE_SRQ_RQE_SIZE_SHIFT = 0,
1265 OCRDMA_CREATE_SRQ_RQE_SIZE_MASK = 0xFFFF,
1267 OCRDMA_CREATE_SRQ_NUM_RQ_PAGES_MASK = 0xFFFF <<
1282 OCRDMA_CREATE_SRQ_RSP_SRQ_ID_SHIFT = 0,
1283 OCRDMA_CREATE_SRQ_RSP_SRQ_ID_MASK = 0xFFFFFF,
1285 OCRDMA_CREATE_SRQ_RSP_MAX_RQE_ALLOCATED_SHIFT = 0,
1286 OCRDMA_CREATE_SRQ_RSP_MAX_RQE_ALLOCATED_MASK = 0xFFFF,
1288 OCRDMA_CREATE_SRQ_RSP_MAX_SGE_RECV_ALLOCATED_MASK = 0xFFFF <<
1301 OCRDMA_MODIFY_SRQ_ID_SHIFT = 0,
1302 OCRDMA_MODIFY_SRQ_ID_MASK = 0xFFFFFF,
1304 OCRDMA_MODIFY_SRQ_MAX_RQE_SHIFT = 0,
1305 OCRDMA_MODIFY_SRQ_MAX_RQE_MASK = 0xFFFF,
1307 OCRDMA_MODIFY_SRQ__LIMIT_MASK = 0xFFFF <<
1320 OCRDMA_QUERY_SRQ_ID_SHIFT = 0,
1321 OCRDMA_QUERY_SRQ_ID_MASK = 0xFFFFFF
1332 OCRDMA_QUERY_SRQ_RSP_PD_ID_SHIFT = 0,
1333 OCRDMA_QUERY_SRQ_RSP_PD_ID_MASK = 0xFFFF,
1335 OCRDMA_QUERY_SRQ_RSP_MAX_RQE_MASK = 0xFFFF <<
1338 OCRDMA_QUERY_SRQ_RSP_MAX_SGE_RECV_SHIFT = 0,
1339 OCRDMA_QUERY_SRQ_RSP_MAX_SGE_RECV_MASK = 0xFFFF,
1341 OCRDMA_QUERY_SRQ_RSP_SRQ_LIMIT_MASK = 0xFFFF <<
1354 OCRDMA_DESTROY_SRQ_ID_SHIFT = 0,
1355 OCRDMA_DESTROY_SRQ_ID_MASK = 0xFFFFFF
1379 OCRDMA_ALLOC_PD_RSP_PDID_MASK = 0xFFFF,
1414 OCRDMA_ALLOC_PD_RNG_RSP_START_PDID_MASK = 0xFFFF,
1432 OCRDMA_ADDR_CHECK_DISABLE = 0
1436 OCRDMA_ALLOC_LKEY_PD_ID_SHIFT = 0,
1437 OCRDMA_ALLOC_LKEY_PD_ID_MASK = 0xFFFF,
1439 OCRDMA_ALLOC_LKEY_ADDR_CHECK_SHIFT = 0,
1440 OCRDMA_ALLOC_LKEY_ADDR_CHECK_MASK = BIT(0),
1454 OCRDMA_ALLOC_LKEY_PBL_SIZE_MASK = 0xFFFF <<
1492 OCRDMA_REG_NSMR_LRKEY_INDEX_SHIFT = 0,
1493 OCRDMA_REG_NSMR_LRKEY_INDEX_MASK = 0xFFFFFF,
1495 OCRDMA_REG_NSMR_LRKEY_MASK = 0xFF <<
1498 OCRDMA_REG_NSMR_PD_ID_SHIFT = 0,
1499 OCRDMA_REG_NSMR_PD_ID_MASK = 0xFFFF,
1501 OCRDMA_REG_NSMR_NUM_PBL_MASK = 0xFFFF <<
1504 OCRDMA_REG_NSMR_PBE_SIZE_SHIFT = 0,
1505 OCRDMA_REG_NSMR_PBE_SIZE_MASK = 0xFFFF,
1507 OCRDMA_REG_NSMR_HPAGE_SIZE_MASK = 0xFF <<
1544 OCRDMA_REG_NSMR_CONT_PBL_SHIFT = 0,
1545 OCRDMA_REG_NSMR_CONT_PBL_SHIFT_MASK = 0xFFFF,
1547 OCRDMA_REG_NSMR_CONT_NUM_PBL_MASK = 0xFFFF <<
1572 OCRDMA_REG_NSMR_RSP_NUM_PBL_MASK = 0xFFFF0000
1583 OCRDMA_REG_NSMR_CONT_RSP_LRKEY_INDEX_SHIFT = 0,
1584 OCRDMA_REG_NSMR_CONT_RSP_LRKEY_INDEX_MASK = 0xFFFFFF,
1586 OCRDMA_REG_NSMR_CONT_RSP_LRKEY_MASK = 0xFF <<
1590 OCRDMA_REG_NSMR_CONT_RSP_NUM_PBL_MASK = 0xFFFF <<
1603 OCRDMA_ALLOC_MW_PD_ID_SHIFT = 0,
1604 OCRDMA_ALLOC_MW_PD_ID_MASK = 0xFFFF
1615 OCRDMA_ALLOC_MW_RSP_LRKEY_INDEX_SHIFT = 0,
1616 OCRDMA_ALLOC_MW_RSP_LRKEY_INDEX_MASK = 0xFFFFFF
1656 OCRDMA_CREATE_AH_NUM_PAGES_MASK = 0xF <<
1660 OCRDMA_CREATE_AH_PAGE_SIZE_MASK = 0x7 <<
1664 OCRDMA_CREATE_AH_ENTRY_SIZE_MASK = 0x1FF <<
1696 OCRDMA_EQE_VALID_SHIFT = 0,
1697 OCRDMA_EQE_VALID_MASK = BIT(0),
1698 OCRDMA_EQE_MAJOR_CODE_MASK = 0x0E,
1699 OCRDMA_EQE_MAJOR_CODE_SHIFT = 0x01,
1700 OCRDMA_EQE_FOR_CQE_MASK = 0xFFFE,
1702 OCRDMA_EQE_RESOURCE_ID_MASK = 0xFFFF <<
1707 OCRDMA_MAJOR_CODE_COMPLETION = 0x00,
1708 OCRDMA_MAJOR_CODE_SENTINAL = 0x01
1716 OCRDMA_CQE_SUCCESS = 0,
1744 OCRDMA_CQE_WQEIDX_SHIFT = 0,
1745 OCRDMA_CQE_WQEIDX_MASK = 0xFFFF,
1749 OCRDMA_CQE_UD_XFER_LEN_MASK = 0x1FFF,
1750 OCRDMA_CQE_PKEY_SHIFT = 0,
1751 OCRDMA_CQE_PKEY_MASK = 0xFFFF,
1753 OCRDMA_CQE_UD_L3TYPE_MASK = 0x07,
1756 OCRDMA_CQE_QPN_SHIFT = 0,
1757 OCRDMA_CQE_QPN_MASK = 0x0000FFFF,
1760 OCRDMA_CQE_BUFTAG_MASK = 0xFFFF << OCRDMA_CQE_BUFTAG_SHIFT,
1764 OCRDMA_CQE_UD_STATUS_MASK = 0x7 << OCRDMA_CQE_UD_STATUS_SHIFT,
1766 OCRDMA_CQE_STATUS_MASK = 0xFF << OCRDMA_CQE_STATUS_SHIFT,
1772 OCRDMA_CQE_QTYPE_SQ = 0,
1774 OCRDMA_CQE_SRCQP_MASK = 0xFFFFFF
1812 OCRDMA_FLAG_SIG = 0x1,
1813 OCRDMA_FLAG_INV = 0x2,
1814 OCRDMA_FLAG_FENCE_L = 0x4,
1815 OCRDMA_FLAG_FENCE_R = 0x8,
1816 OCRDMA_FLAG_SOLICIT = 0x10,
1817 OCRDMA_FLAG_IMM = 0x20,
1818 OCRDMA_FLAG_AH_VLAN_PR = 0x40,
1821 OCRDMA_LKEY_FLAG_LOCAL_WR = 0x1,
1822 OCRDMA_LKEY_FLAG_REMOTE_RD = 0x2,
1823 OCRDMA_LKEY_FLAG_REMOTE_WR = 0x4,
1824 OCRDMA_LKEY_FLAG_VATO = 0x8,
1828 OCRDMA_WRITE = 0x06,
1829 OCRDMA_READ = 0x0C,
1830 OCRDMA_RESV0 = 0x02,
1831 OCRDMA_SEND = 0x00,
1832 OCRDMA_CMP_SWP = 0x14,
1833 OCRDMA_BIND_MW = 0x10,
1834 OCRDMA_FR_MR = 0x11,
1835 OCRDMA_RESV1 = 0x0A,
1836 OCRDMA_LKEY_INV = 0x15,
1837 OCRDMA_FETCH_ADD = 0x13,
1838 OCRDMA_POST_RQ = 0x12
1842 OCRDMA_TYPE_INLINE = 0x0,
1843 OCRDMA_TYPE_LKEY = 0x1,
1847 OCRDMA_WQE_OPCODE_SHIFT = 0,
1848 OCRDMA_WQE_OPCODE_MASK = 0x0000001F,
1851 OCRDMA_WQE_TYPE_MASK = 0x00030000,
1853 OCRDMA_WQE_SIZE_MASK = 0xFF,
1856 OCRDMA_WQE_LKEY_FLAGS_SHIFT = 0,
1857 OCRDMA_WQE_LKEY_FLAGS_MASK = 0xF
2075 OCRDMA_HBA_ATTRB_EPROM_VER_LO_MASK = 0xFF,
2076 OCRDMA_HBA_ATTRB_EPROM_VER_HI_MASK = 0xFF00,
2077 OCRDMA_HBA_ATTRB_EPROM_VER_HI_SHIFT = 0x08,
2078 OCRDMA_HBA_ATTRB_CDBLEN_MASK = 0xFFFF,
2079 OCRDMA_HBA_ATTRB_ASIC_REV_MASK = 0xFF0000,
2080 OCRDMA_HBA_ATTRB_ASIC_REV_SHIFT = 0x10,
2081 OCRDMA_HBA_ATTRB_GUID0_MASK = 0xFF000000,
2082 OCRDMA_HBA_ATTRB_GUID0_SHIFT = 0x18,
2083 OCRDMA_HBA_ATTRB_GUID13_MASK = 0xFF,
2084 OCRDMA_HBA_ATTRB_GUID14_MASK = 0xFF00,
2085 OCRDMA_HBA_ATTRB_GUID14_SHIFT = 0x08,
2086 OCRDMA_HBA_ATTRB_GUID15_MASK = 0xFF0000,
2087 OCRDMA_HBA_ATTRB_GUID15_SHIFT = 0x10,
2088 OCRDMA_HBA_ATTRB_PCNT_MASK = 0xFF000000,
2089 OCRDMA_HBA_ATTRB_PCNT_SHIFT = 0x18,
2090 OCRDMA_HBA_ATTRB_LDTOUT_MASK = 0xFFFF,
2091 OCRDMA_HBA_ATTRB_ISCSI_VER_MASK = 0xFF0000,
2092 OCRDMA_HBA_ATTRB_ISCSI_VER_SHIFT = 0x10,
2093 OCRDMA_HBA_ATTRB_MFUNC_DEV_MASK = 0xFF000000,
2094 OCRDMA_HBA_ATTRB_MFUNC_DEV_SHIFT = 0x18,
2095 OCRDMA_HBA_ATTRB_CV_MASK = 0xFF,
2096 OCRDMA_HBA_ATTRB_HBA_ST_MASK = 0xFF00,
2097 OCRDMA_HBA_ATTRB_HBA_ST_SHIFT = 0x08,
2098 OCRDMA_HBA_ATTRB_MAX_DOMS_MASK = 0xFF0000,
2099 OCRDMA_HBA_ATTRB_MAX_DOMS_SHIFT = 0x10,
2100 OCRDMA_HBA_ATTRB_PTNUM_MASK = 0x3F000000,
2101 OCRDMA_HBA_ATTRB_PTNUM_SHIFT = 0x18,
2102 OCRDMA_HBA_ATTRB_PT_MASK = 0xC0000000,
2103 OCRDMA_HBA_ATTRB_PT_SHIFT = 0x1E,
2104 OCRDMA_HBA_ATTRB_ISCSI_FET_MASK = 0xFF,
2105 OCRDMA_HBA_ATTRB_ASIC_GEN_MASK = 0xFF00,
2106 OCRDMA_HBA_ATTRB_ASIC_GEN_SHIFT = 0x08,
2107 OCRDMA_HBA_ATTRB_PCI_VID_MASK = 0xFFFF,
2108 OCRDMA_HBA_ATTRB_PCI_DID_MASK = 0xFFFF0000,
2109 OCRDMA_HBA_ATTRB_PCI_DID_SHIFT = 0x10,
2110 OCRDMA_HBA_ATTRB_PCI_SVID_MASK = 0xFFFF,
2111 OCRDMA_HBA_ATTRB_PCI_SSID_MASK = 0xFFFF0000,
2112 OCRDMA_HBA_ATTRB_PCI_SSID_SHIFT = 0x10,
2113 OCRDMA_HBA_ATTRB_PCI_BUSNUM_MASK = 0xFF,
2114 OCRDMA_HBA_ATTRB_PCI_DEVNUM_MASK = 0xFF00,
2115 OCRDMA_HBA_ATTRB_PCI_DEVNUM_SHIFT = 0x08,
2116 OCRDMA_HBA_ATTRB_PCI_FUNCNUM_MASK = 0xFF0000,
2117 OCRDMA_HBA_ATTRB_PCI_FUNCNUM_SHIFT = 0x10,
2118 OCRDMA_HBA_ATTRB_IF_TYPE_MASK = 0xFF000000,
2119 OCRDMA_HBA_ATTRB_IF_TYPE_SHIFT = 0x18,
2120 OCRDMA_HBA_ATTRB_NETFIL_MASK =0xFF
2169 #define OCRDMA_SUBSYS_DCBX 0x10
2172 OCRDMA_CMD_GET_DCBX_CONFIG = 0x01
2176 OCRDMA_PARAMETER_TYPE_ADMIN = 0x00,
2177 OCRDMA_PARAMETER_TYPE_OPER = 0x01,
2178 OCRDMA_PARAMETER_TYPE_PEER = 0x02
2182 OCRDMA_PROTO_SELECT_L2 = 0x00,
2183 OCRDMA_PROTO_SELECT_L4 = 0x01
2187 OCRDMA_APP_PARAM_APP_PROTO_MASK = 0xFFFF,
2188 OCRDMA_APP_PARAM_PROTO_SEL_MASK = 0xFF,
2189 OCRDMA_APP_PARAM_PROTO_SEL_SHIFT = 0x10,
2190 OCRDMA_APP_PARAM_VALID_MASK = 0xFF,
2191 OCRDMA_APP_PARAM_VALID_SHIFT = 0x18
2195 OCRDMA_STATE_FLAG_ENABLED = 0x01,
2196 OCRDMA_STATE_FLAG_ADDVERTISED = 0x02,
2197 OCRDMA_STATE_FLAG_WILLING = 0x04,
2198 OCRDMA_STATE_FLAG_SYNC = 0x08,
2199 OCRDMA_STATE_FLAG_UNSUPPORTED = 0x40000000,
2200 OCRDMA_STATE_FLAG_NEG_FAILD = 0x80000000
2204 OCRDMA_DCBX_TC_SUPPORT_MASK = 0xFF,
2205 OCRDMA_DCBX_TC_SUPPORT_SHIFT = 0x18,
2206 OCRDMA_DCBX_APP_ENTRY_SHIFT = 0x10,
2207 OCRDMA_DCBX_OP_PARAM_SHIFT = 0x08,
2208 OCRDMA_DCBX_STATE_MASK = 0xFF