Lines Matching +full:32 +full:- +full:63
1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2016 - 2021 Intel Corporation */
27 #define IRDMA_UDA_QPSQ_EXTHDRLEN GENMASK_ULL(40, 32)
28 #define IRDMA_UDA_QPSQ_MULTICAST BIT_ULL(63)
41 #define IRDMA_UDA_QPSQ_IMMDATA GENMASK_ULL(63, 0)
70 #define IRDMA_UDAQPC_SQHDRRINGBUFSIZE GENMASK_ULL(33, 32)
78 #define IRDMA_UDAQPC_IPID GENMASK_ULL(47, 32)
83 #define IRDMA_UDA_CQPSQ_MAV_PDINDEXLO GENMASK_ULL(63, 48)
85 #define IRDMA_UDA_CQPSQ_MAV_ARPINDEX GENMASK_ULL(63, 48)
86 #define IRDMA_UDA_CQPSQ_MAV_TC GENMASK_ULL(39, 32)
87 #define IRDMA_UDA_CQPSQ_MAV_HOPLIMIT GENMASK_ULL(39, 32)
89 #define IRDMA_UDA_CQPSQ_MAV_ADDR0 GENMASK_ULL(63, 32)
91 #define IRDMA_UDA_CQPSQ_MAV_ADDR2 GENMASK_ULL(63, 32)
93 #define IRDMA_UDA_CQPSQ_MAV_WQEVALID BIT_ULL(63)
94 #define IRDMA_UDA_CQPSQ_MAV_OPCODE GENMASK_ULL(37, 32)
100 #define IRDMA_UDA_MGCTX_DESTPORT GENMASK_ULL(47, 32)
106 #define IRDMA_UDA_CQPSQ_MG_WQEVALID BIT_ULL(63)
107 #define IRDMA_UDA_CQPSQ_MG_OPCODE GENMASK_ULL(37, 32)
112 #define IRDMA_UDA_CQPSQ_MG_VLANID GENMASK_ULL(43, 32)
114 #define IRDMA_UDA_CQPSQ_QHASH_QPN GENMASK_ULL(49, 32)
118 #define IRDMA_UDA_CQPSQ_QHASH_ADDR0 GENMASK_ULL(63, 32)
120 #define IRDMA_UDA_CQPSQ_QHASH_ADDR2 GENMASK_ULL(63, 32)
122 #define IRDMA_UDA_CQPSQ_QHASH_WQEVALID BIT_ULL(63)
123 #define IRDMA_UDA_CQPSQ_QHASH_OPCODE GENMASK_ULL(37, 32)