Lines Matching defs:hr_dev
48 bool hns_roce_check_whether_mhop(struct hns_roce_dev *hr_dev, u32 type)
54 hop_num = hr_dev->caps.qpc_hop_num;
57 hop_num = hr_dev->caps.mpt_hop_num;
60 hop_num = hr_dev->caps.cqc_hop_num;
63 hop_num = hr_dev->caps.srqc_hop_num;
66 hop_num = hr_dev->caps.sccc_hop_num;
69 hop_num = hr_dev->caps.qpc_timer_hop_num;
72 hop_num = hr_dev->caps.cqc_timer_hop_num;
75 hop_num = hr_dev->caps.gmv_hop_num;
122 static int get_hem_table_config(struct hns_roce_dev *hr_dev,
126 struct device *dev = hr_dev->dev;
130 mhop->buf_chunk_size = 1 << (hr_dev->caps.qpc_buf_pg_sz
132 mhop->bt_chunk_size = 1 << (hr_dev->caps.qpc_ba_pg_sz
134 mhop->ba_l0_num = hr_dev->caps.qpc_bt_num;
135 mhop->hop_num = hr_dev->caps.qpc_hop_num;
138 mhop->buf_chunk_size = 1 << (hr_dev->caps.mpt_buf_pg_sz
140 mhop->bt_chunk_size = 1 << (hr_dev->caps.mpt_ba_pg_sz
142 mhop->ba_l0_num = hr_dev->caps.mpt_bt_num;
143 mhop->hop_num = hr_dev->caps.mpt_hop_num;
146 mhop->buf_chunk_size = 1 << (hr_dev->caps.cqc_buf_pg_sz
148 mhop->bt_chunk_size = 1 << (hr_dev->caps.cqc_ba_pg_sz
150 mhop->ba_l0_num = hr_dev->caps.cqc_bt_num;
151 mhop->hop_num = hr_dev->caps.cqc_hop_num;
154 mhop->buf_chunk_size = 1 << (hr_dev->caps.sccc_buf_pg_sz
156 mhop->bt_chunk_size = 1 << (hr_dev->caps.sccc_ba_pg_sz
158 mhop->ba_l0_num = hr_dev->caps.sccc_bt_num;
159 mhop->hop_num = hr_dev->caps.sccc_hop_num;
162 mhop->buf_chunk_size = 1 << (hr_dev->caps.qpc_timer_buf_pg_sz
164 mhop->bt_chunk_size = 1 << (hr_dev->caps.qpc_timer_ba_pg_sz
166 mhop->ba_l0_num = hr_dev->caps.qpc_timer_bt_num;
167 mhop->hop_num = hr_dev->caps.qpc_timer_hop_num;
170 mhop->buf_chunk_size = 1 << (hr_dev->caps.cqc_timer_buf_pg_sz
172 mhop->bt_chunk_size = 1 << (hr_dev->caps.cqc_timer_ba_pg_sz
174 mhop->ba_l0_num = hr_dev->caps.cqc_timer_bt_num;
175 mhop->hop_num = hr_dev->caps.cqc_timer_hop_num;
178 mhop->buf_chunk_size = 1 << (hr_dev->caps.srqc_buf_pg_sz
180 mhop->bt_chunk_size = 1 << (hr_dev->caps.srqc_ba_pg_sz
182 mhop->ba_l0_num = hr_dev->caps.srqc_bt_num;
183 mhop->hop_num = hr_dev->caps.srqc_hop_num;
186 mhop->buf_chunk_size = 1 << (hr_dev->caps.gmv_buf_pg_sz +
188 mhop->bt_chunk_size = 1 << (hr_dev->caps.gmv_ba_pg_sz +
190 mhop->ba_l0_num = hr_dev->caps.gmv_bt_num;
191 mhop->hop_num = hr_dev->caps.gmv_hop_num;
202 int hns_roce_calc_hem_mhop(struct hns_roce_dev *hr_dev,
206 struct device *dev = hr_dev->dev;
212 if (get_hem_table_config(hr_dev, mhop, table->type))
251 static struct hns_roce_hem *hns_roce_alloc_hem(struct hns_roce_dev *hr_dev,
260 dev_err(hr_dev->dev, "invalid hem_alloc_size: %lu!\n",
269 buf = dma_alloc_coherent(hr_dev->dev, hem_alloc_size,
284 void hns_roce_free_hem(struct hns_roce_dev *hr_dev, struct hns_roce_hem *hem)
289 dma_free_coherent(hr_dev->dev, hem->size, hem->buf, hem->dma);
294 static int calc_hem_config(struct hns_roce_dev *hr_dev,
299 struct device *dev = hr_dev->dev;
306 ret = hns_roce_calc_hem_mhop(hr_dev, table, &mhop_obj, mhop);
344 static void free_mhop_hem(struct hns_roce_dev *hr_dev,
350 struct device *dev = hr_dev->dev;
353 hns_roce_free_hem(hr_dev, table->hem[index->buf]);
370 static int alloc_mhop_hem(struct hns_roce_dev *hr_dev,
376 struct device *dev = hr_dev->dev;
415 table->hem[index->buf] = hns_roce_alloc_hem(hr_dev, size);
435 free_mhop_hem(hr_dev, table, mhop, index);
440 static int set_mhop_hem(struct hns_roce_dev *hr_dev,
445 struct device *dev = hr_dev->dev;
450 ret = hr_dev->hw->set_hem(hr_dev, table, obj, 0);
458 ret = hr_dev->hw->set_hem(hr_dev, table, obj, 1);
470 ret = hr_dev->hw->set_hem(hr_dev, table, obj, step_idx);
478 static int hns_roce_table_mhop_get(struct hns_roce_dev *hr_dev,
484 struct device *dev = hr_dev->dev;
487 ret = calc_hem_config(hr_dev, table, obj, &mhop, &index);
499 ret = alloc_mhop_hem(hr_dev, table, &mhop, &index);
507 ret = set_mhop_hem(hr_dev, table, obj, &mhop, &index);
518 free_mhop_hem(hr_dev, table, &mhop, &index);
524 int hns_roce_table_get(struct hns_roce_dev *hr_dev,
527 struct device *dev = hr_dev->dev;
531 if (hns_roce_check_whether_mhop(hr_dev, table->type))
532 return hns_roce_table_mhop_get(hr_dev, table, obj);
543 table->hem[i] = hns_roce_alloc_hem(hr_dev, table->table_chunk_size);
550 ret = hr_dev->hw->set_hem(hr_dev, table, obj, HEM_HOP_STEP_DIRECT);
552 hns_roce_free_hem(hr_dev, table->hem[i]);
565 static void clear_mhop_hem(struct hns_roce_dev *hr_dev,
570 struct device *dev = hr_dev->dev;
598 ret = hr_dev->hw->clear_hem(hr_dev, table, obj, step_idx);
604 ret = hr_dev->hw->clear_hem(hr_dev, table, obj, 1);
611 ret = hr_dev->hw->clear_hem(hr_dev, table, obj, 0);
619 static void hns_roce_table_mhop_put(struct hns_roce_dev *hr_dev,
626 struct device *dev = hr_dev->dev;
629 ret = calc_hem_config(hr_dev, table, obj, &mhop, &index);
641 clear_mhop_hem(hr_dev, table, obj, &mhop, &index);
642 free_mhop_hem(hr_dev, table, &mhop, &index);
647 void hns_roce_table_put(struct hns_roce_dev *hr_dev,
650 struct device *dev = hr_dev->dev;
654 if (hns_roce_check_whether_mhop(hr_dev, table->type)) {
655 hns_roce_table_mhop_put(hr_dev, table, obj, 1);
665 ret = hr_dev->hw->clear_hem(hr_dev, table, obj, HEM_HOP_STEP_DIRECT);
670 hns_roce_free_hem(hr_dev, table->hem[i]);
676 void *hns_roce_table_find(struct hns_roce_dev *hr_dev,
692 if (!hns_roce_check_whether_mhop(hr_dev, table->type)) {
700 if (hns_roce_calc_hem_mhop(hr_dev, table, &mhop_obj, &mhop))
728 int hns_roce_init_hem_table(struct hns_roce_dev *hr_dev,
735 if (!hns_roce_check_whether_mhop(hr_dev, type)) {
736 table->table_chunk_size = hr_dev->caps.chunk_sz;
751 if (get_hem_table_config(hr_dev, &mhop, type))
831 static void hns_roce_cleanup_mhop_hem_table(struct hns_roce_dev *hr_dev,
839 if (hns_roce_calc_hem_mhop(hr_dev, table, NULL, &mhop))
847 hns_roce_table_mhop_put(hr_dev, table, obj, 0);
862 void hns_roce_cleanup_hem_table(struct hns_roce_dev *hr_dev,
865 struct device *dev = hr_dev->dev;
870 if (hns_roce_check_whether_mhop(hr_dev, table->type)) {
871 hns_roce_cleanup_mhop_hem_table(hr_dev, table);
879 ret = hr_dev->hw->clear_hem(hr_dev, table, obj, 0);
884 hns_roce_free_hem(hr_dev, table->hem[i]);
891 void hns_roce_cleanup_hem(struct hns_roce_dev *hr_dev)
893 if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SRQ)
894 hns_roce_cleanup_hem_table(hr_dev,
895 &hr_dev->srq_table.table);
896 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->cq_table.table);
897 if (hr_dev->caps.qpc_timer_entry_sz)
898 hns_roce_cleanup_hem_table(hr_dev,
899 &hr_dev->qpc_timer_table);
900 if (hr_dev->caps.cqc_timer_entry_sz)
901 hns_roce_cleanup_hem_table(hr_dev,
902 &hr_dev->cqc_timer_table);
903 if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_QP_FLOW_CTRL)
904 hns_roce_cleanup_hem_table(hr_dev,
905 &hr_dev->qp_table.sccc_table);
906 if (hr_dev->caps.trrl_entry_sz)
907 hns_roce_cleanup_hem_table(hr_dev,
908 &hr_dev->qp_table.trrl_table);
910 if (hr_dev->caps.gmv_entry_sz)
911 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->gmv_table);
913 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table);
914 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table);
915 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table);
937 hem_list_alloc_item(struct hns_roce_dev *hr_dev, int start, int end, int count,
947 hem->addr = dma_alloc_coherent(hr_dev->dev, count * BA_BYTE_LEN,
965 static void hem_list_free_item(struct hns_roce_dev *hr_dev,
969 dma_free_coherent(hr_dev->dev, hem->count * BA_BYTE_LEN,
974 static void hem_list_free_all(struct hns_roce_dev *hr_dev,
981 hem_list_free_item(hr_dev, hem);
1097 static int hem_list_alloc_mid_bt(struct hns_roce_dev *hr_dev,
1118 dev_err(hr_dev->dev, "invalid hopnum %d!\n", hopnum);
1123 dev_err(hr_dev->dev, "invalid offset %d, min %u!\n",
1151 cur = hem_list_alloc_item(hr_dev, start_aligned, end, unit,
1178 hem_list_free_all(hr_dev, &temp_list[level]);
1184 alloc_root_hem(struct hns_roce_dev *hr_dev, int unit, int *max_ba_num,
1202 hem = hem_list_alloc_item(hr_dev, offset, r->offset + r->count - 1,
1212 static int alloc_fake_root_bt(struct hns_roce_dev *hr_dev, void *cpu_base,
1224 hem = hem_list_alloc_item(hr_dev, r->offset, r->offset + r->count - 1,
1241 static int setup_middle_bt(struct hns_roce_dev *hr_dev, void *cpu_base,
1265 setup_root_hem(struct hns_roce_dev *hr_dev, struct hns_roce_hem_list *hem_list,
1295 ret = alloc_fake_root_bt(hr_dev, cpu_base, phy_base, r,
1298 ret = setup_middle_bt(hr_dev, cpu_base, unit, r,
1315 static int hem_list_alloc_root_bt(struct hns_roce_dev *hr_dev,
1331 root_hem = alloc_root_hem(hr_dev, unit, &max_ba_num, regions,
1344 ret = setup_root_hem(hr_dev, hem_list, unit, max_ba_num, &head, regions,
1348 hem_list_free_all(hr_dev, &head.branch[i]);
1350 hem_list_free_all(hr_dev, &head.root);
1362 int hns_roce_hem_list_request(struct hns_roce_dev *hr_dev,
1375 dev_err(hr_dev->dev, "invalid region region_cnt %d!\n",
1391 ret = hem_list_alloc_mid_bt(hr_dev, r, unit, ofs,
1395 dev_err(hr_dev->dev,
1402 ret = hem_list_alloc_root_bt(hr_dev, hem_list, unit, regions,
1405 dev_err(hr_dev->dev, "alloc hem root fail ret = %d!\n", ret);
1410 hns_roce_hem_list_release(hr_dev, hem_list);
1415 void hns_roce_hem_list_release(struct hns_roce_dev *hr_dev,
1422 hem_list_free_all(hr_dev, &hem_list->mid_bt[i][j]);
1424 hem_list_free_all(hr_dev, &hem_list->root_bt);
1440 void *hns_roce_hem_list_find_mtt(struct hns_roce_dev *hr_dev,