Lines Matching +full:high +full:- +full:speed
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright(c) 2015 - 2017 Intel Corporation.
41 #define OPA_NOTICE_TRAP_LSE_CHG 0x04 /* Link Speed Enable changed */
101 u8 sl; /* SL: high 5 bits */
105 __be32 qp1; /* high 8 bits reserved */
106 __be32 qp2; /* high 8 bits reserved */
114 u8 sl; /* SL: high 5 bits */
118 __be32 qp1; /* high 8 bits reserved */
119 __be32 qp2; /* high 8 bits reserved */
299 * struct cc_state combines the (active) per-port congestion control
300 * table, and the (active) per-SL congestion settings. cc_state data
389 #define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
403 * get_link_speed - determine whether 12.5G or 25G speed
404 * @link_speed: the speed of active link
405 * @return: Return 2 if link speed identified as 12.5G
406 * or return 1 if link speed is 25G.
408 * The function indirectly calculate required link speed
410 * speed is 25G, the function return as 1 as it is required
411 * by xmit counter conversion formula :-( 25G / link_speed).
413 * link speed is 25G or 2 if 12.5G.This is done to avoid
423 * convert_xmit_counter - calculate flit times for given xmit counter
427 * @link_speed: speed of active link