1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3  * Copyright(c) 2015 - 2017 Intel Corporation.
103 #define AUGMENT_SIZE (sizeof(struct augmented_firmware_file) - \
217  * Read a single 64-bit value from 8051 data memory.
220  * o caller to have already set up data read, no auto increment
224  * ignored - i.e. the hardware will always do aligned 8-byte reads as if
227  * Return 0 on success, -ENXIO on a read error (timeout).
234 	/* step 1: set the address, clear enable */  in __read_8051_data()
238 	/* step 2: enable */  in __read_8051_data()
250 			return -ENXIO;  in __read_8051_data()
262  * Read 8051 data starting at addr, for len bytes.  Will read in 8-byte chunks.
263  * Return 0 on success, -errno on error.
271 	spin_lock_irqsave(&dd->dc8051_memlock, flags);  in read_8051_data()
273 	/* data read set-up, no auto-increment */  in read_8051_data()
285 	spin_unlock_irqrestore(&dd->dc8051_memlock, flags);  in read_8051_data()
303 	/* write set-up */  in write_8051()
315 		int bytes = len - offset;  in write_8051()
335 				return -ENXIO;  in write_8051()
348 /* return 0 if values match, non-zero and complain otherwise */
367 	if (invalid_header(dd, "module_type", css->module_type,  in verify_css_header()
369 	    invalid_header(dd, "header_len", css->header_len,  in verify_css_header()
371 	    invalid_header(dd, "header_version", css->header_version,  in verify_css_header()
373 	    invalid_header(dd, "module_vendor", css->module_vendor,  in verify_css_header()
375 	    invalid_header(dd, "key_size", css->key_size, KEY_SIZE / 4) ||  in verify_css_header()
376 	    invalid_header(dd, "modulus_size", css->modulus_size,  in verify_css_header()
378 	    invalid_header(dd, "exponent_size", css->exponent_size,  in verify_css_header()
380 		return -EINVAL;  in verify_css_header()
396 		return -EINVAL;  in payload_check()
405  * Returns 0 on success, -ERRNO on error.
415 	ret = request_firmware(&fdet->fw, name, &dd->pcidev->dev);  in obtain_one_firmware()
423 	if (fdet->fw->size < sizeof(struct css_header)) {  in obtain_one_firmware()
425 		ret = -EINVAL;  in obtain_one_firmware()
428 	css = (struct css_header *)fdet->fw->data;  in obtain_one_firmware()
431 	hfi1_cdbg(FIRMWARE, "file size: 0x%lx bytes", fdet->fw->size);  in obtain_one_firmware()
433 	hfi1_cdbg(FIRMWARE, "  module_type    0x%x", css->module_type);  in obtain_one_firmware()
435 		  css->header_len, 4 * css->header_len);  in obtain_one_firmware()
436 	hfi1_cdbg(FIRMWARE, "  header_version 0x%x", css->header_version);  in obtain_one_firmware()
437 	hfi1_cdbg(FIRMWARE, "  module_id      0x%x", css->module_id);  in obtain_one_firmware()
438 	hfi1_cdbg(FIRMWARE, "  module_vendor  0x%x", css->module_vendor);  in obtain_one_firmware()
439 	hfi1_cdbg(FIRMWARE, "  date           0x%x", css->date);  in obtain_one_firmware()
441 		  css->size, 4 * css->size);  in obtain_one_firmware()
443 		  css->key_size, 4 * css->key_size);  in obtain_one_firmware()
445 		  css->modulus_size, 4 * css->modulus_size);  in obtain_one_firmware()
447 		  css->exponent_size, 4 * css->exponent_size);  in obtain_one_firmware()
449 		  fdet->fw->size - sizeof(struct firmware_file));  in obtain_one_firmware()
459 	 * Note: css->size is in DWORDs, multiply by 4 to get bytes.  in obtain_one_firmware()
464 	} else if ((css->size * 4) == fdet->fw->size) {  in obtain_one_firmware()
465 		/* non-augmented firmware file */  in obtain_one_firmware()
467 							fdet->fw->data;  in obtain_one_firmware()
470 		ret = payload_check(dd, name, fdet->fw->size,  in obtain_one_firmware()
473 			fdet->css_header = css;  in obtain_one_firmware()
474 			fdet->modulus = ff->modulus;  in obtain_one_firmware()
475 			fdet->exponent = ff->exponent;  in obtain_one_firmware()
476 			fdet->signature = ff->signature;  in obtain_one_firmware()
477 			fdet->r2 = fdet->dummy_header.r2; /* use dummy space */  in obtain_one_firmware()
478 			fdet->mu = fdet->dummy_header.mu; /* use dummy space */  in obtain_one_firmware()
479 			fdet->firmware_ptr = ff->firmware;  in obtain_one_firmware()
480 			fdet->firmware_len = fdet->fw->size -  in obtain_one_firmware()
483 			 * Header does not include r2 and mu - generate here.  in obtain_one_firmware()
487 			ret = -EINVAL;  in obtain_one_firmware()
489 	} else if ((css->size * 4) + AUGMENT_SIZE == fdet->fw->size) {  in obtain_one_firmware()
492 			(struct augmented_firmware_file *)fdet->fw->data;  in obtain_one_firmware()
495 		ret = payload_check(dd, name, fdet->fw->size,  in obtain_one_firmware()
498 			fdet->css_header = css;  in obtain_one_firmware()
499 			fdet->modulus = aff->modulus;  in obtain_one_firmware()
500 			fdet->exponent = aff->exponent;  in obtain_one_firmware()
501 			fdet->signature = aff->signature;  in obtain_one_firmware()
502 			fdet->r2 = aff->r2;  in obtain_one_firmware()
503 			fdet->mu = aff->mu;  in obtain_one_firmware()
504 			fdet->firmware_ptr = aff->firmware;  in obtain_one_firmware()
505 			fdet->firmware_len = fdet->fw->size -  in obtain_one_firmware()
509 		/* css->size check failed */  in obtain_one_firmware()
512 			   fdet->fw->size / 4,  in obtain_one_firmware()
513 			   (fdet->fw->size - AUGMENT_SIZE) / 4,  in obtain_one_firmware()
514 			   css->size);  in obtain_one_firmware()
516 		ret = -EINVAL;  in obtain_one_firmware()
520 	/* if returning an error, clean up after ourselves */  in obtain_one_firmware()
528 	release_firmware(fdet->fw);  in dispose_one_firmware()
614 		if (fw_state == FW_EMPTY && dd->icode == ICODE_RTL_SILICON) {  in __obtain_firmware()
621 		fw_err = -ENOENT;  in __obtain_firmware()
625 		    dd->icode != ICODE_FUNCTIONAL_SIMULATOR)  in __obtain_firmware()
633  * Called by all HFIs when loading their firmware - i.e. device probe time.
658 			fw_err = -ETIMEDOUT;  in obtain_firmware()
767 	for (; qw_size > 0; qw_size--, ptr++)  in write_streamed_rsa_data()
773  * RSA_ENGINE_TIMEOUT before giving up.
797 		dd_dev_err(dd, "%s security engine not idle - giving up\n",  in run_rsa()
799 		return -EBUSY;  in run_rsa()
808 	 * The RSA engine is hooked up to two MISC errors.  The driver  in run_rsa()
816 	 *	re-initializing the RSA engine, then clearing the status bit.  in run_rsa()
817 	 *	Do not re-init the RSA angine immediately after a successful  in run_rsa()
818 	 *	run - this will reset the current authorization.  in run_rsa()
836 			ret = -EINVAL;  in run_rsa()
843 			ret = -EINVAL;  in run_rsa()
855 			ret = -ETIMEDOUT;  in run_rsa()
864 	 * errors.  All current errors will stick - the RSA logic is keeping  in run_rsa()
865 	 * error high.  All previous errors will clear - the RSA logic  in run_rsa()
892 	write_rsa_data(dd, MISC_CFG_RSA_MODULUS, fdet->modulus, KEY_SIZE);  in load_security_variables()
894 	write_rsa_data(dd, MISC_CFG_RSA_R2, fdet->r2, KEY_SIZE);  in load_security_variables()
896 	write_rsa_data(dd, MISC_CFG_RSA_MU, fdet->mu, MU_SIZE);  in load_security_variables()
899 				(u8 *)fdet->css_header,  in load_security_variables()
913  * Wait until the firmware is up and ready to take host requests.
914  * Return 0 on success, -ETIMEDOUT on timeout.
921 	if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR)  in wait_fm_ready()
929 			return -ETIMEDOUT;  in wait_fm_ready()
930 		usleep_range(1950, 2050); /* sleep 2ms-ish */  in wait_fm_ready()
951 	 * DC reset step 1: Reset DC8051  in load_8051_firmware()
961 	 * DC reset step 2 (optional): Load 8051 data memory with link  in load_8051_firmware()
966 	 * DC reset step 3: Load DC8051 firmware  in load_8051_firmware()
972 	/* Firmware load step 1 */  in load_8051_firmware()
976 	 * Firmware load step 2.  Clear MISC_CFG_FW_CTRL.FW_8051_LOADED  in load_8051_firmware()
980 	/* Firmware load steps 3-5 */  in load_8051_firmware()
981 	ret = write_8051(dd, 1/*code*/, 0, fdet->firmware_ptr,  in load_8051_firmware()
982 			 fdet->firmware_len);  in load_8051_firmware()
987 	 * DC reset step 4. Host starts the DC8051 firmware  in load_8051_firmware()
990 	 * Firmware load step 6.  Set MISC_CFG_FW_CTRL.FW_8051_LOADED  in load_8051_firmware()
994 	/* Firmware load steps 7-10 */  in load_8051_firmware()
995 	ret = run_rsa(dd, "8051", fdet->signature);  in load_8051_firmware()
1003 	 * DC reset step 5. Wait for firmware to be ready to accept host  in load_8051_firmware()
1010 		return -ETIMEDOUT;  in load_8051_firmware()
1016 	dd->dc8051_ver = dc8051_ver(ver_major, ver_minor, ver_patch);  in load_8051_firmware()
1022 		return -EIO;  in load_8051_firmware()
1031  * No need for masking - the arguments are sized exactly.
1086  * + Must be called after fabric serdes broadcast is set up.
1087  * + Must be called before the 8051 is loaded - assumes 8051 is not loaded
1108 		sbus_request(dd, fabric_serdes_broadcast[dd->hfi1_id],  in turn_off_spicos()
1121  * re-download and validation of the fabric serdes firmware.  This, as a
1122  * by-product, will reset the serdes.  NOTE: the re-download requires that
1137 			   "Cannot acquire SBus resource to reset fabric SerDes - perhaps you should reboot\n");  in fabric_serdes_reset()
1143 		/* A0 serdes do not work with a re-download */  in fabric_serdes_reset()
1144 		u8 ra = fabric_serdes_broadcast[dd->hfi1_id];  in fabric_serdes_reset()
1157 		 * No need for firmware retry - what to download has already  in fabric_serdes_reset()
1159 		 * No need to pay attention to the load return - the only  in fabric_serdes_reset()
1197 			return -ETIMEDOUT;  in sbus_request_slow()
1208 			return -ETIME;  in sbus_request_slow()
1219 	const u8 ra = fabric_serdes_broadcast[dd->hfi1_id]; /* receiver addr */  in load_fabric_serdes_firmware()
1223 	/* step 1: load security variables */  in load_fabric_serdes_firmware()
1225 	/* step 2: place SerDes in reset and disable SPICO */  in load_fabric_serdes_firmware()
1229 	/* step 3:  remove SerDes reset */  in load_fabric_serdes_firmware()
1231 	/* step 4: assert IMEM override */  in load_fabric_serdes_firmware()
1233 	/* step 5: download SerDes machine code */  in load_fabric_serdes_firmware()
1234 	for (i = 0; i < fdet->firmware_len; i += 4) {  in load_fabric_serdes_firmware()
1236 			     *(u32 *)&fdet->firmware_ptr[i]);  in load_fabric_serdes_firmware()
1238 	/* step 6: IMEM override off */  in load_fabric_serdes_firmware()
1240 	/* step 7: turn ECC on */  in load_fabric_serdes_firmware()
1243 	/* steps 8-11: run the RSA engine */  in load_fabric_serdes_firmware()
1244 	err = run_rsa(dd, "fabric serdes", fdet->signature);  in load_fabric_serdes_firmware()
1248 	/* step 12: turn SPICO enable on */  in load_fabric_serdes_firmware()
1250 	/* step 13: enable core hardware interrupts */  in load_fabric_serdes_firmware()
1264 	/* step 1: load security variables */  in load_sbus_firmware()
1266 	/* step 2: place SPICO into reset and enable off */  in load_sbus_firmware()
1268 	/* step 3: remove reset, enable off, IMEM_CNTRL_EN on */  in load_sbus_firmware()
1270 	/* step 4: set starting IMEM address for burst download */  in load_sbus_firmware()
1272 	/* step 5: download the SBus Master machine code */  in load_sbus_firmware()
1273 	for (i = 0; i < fdet->firmware_len; i += 4) {  in load_sbus_firmware()
1275 			     *(u32 *)&fdet->firmware_ptr[i]);  in load_sbus_firmware()
1277 	/* step 6: set IMEM_CNTL_EN off */  in load_sbus_firmware()
1279 	/* step 7: turn ECC on */  in load_sbus_firmware()
1282 	/* steps 8-11: run the RSA engine */  in load_sbus_firmware()
1283 	err = run_rsa(dd, "SBus", fdet->signature);  in load_sbus_firmware()
1287 	/* step 12: set SPICO_ENABLE on */  in load_sbus_firmware()
1301 	/* step 1: load security variables */  in load_pcie_serdes_firmware()
1303 	/* step 2: assert single step (halts the SBus Master spico) */  in load_pcie_serdes_firmware()
1305 	/* step 3: enable XDMEM access */  in load_pcie_serdes_firmware()
1307 	/* step 4: load firmware into SBus Master XDMEM */  in load_pcie_serdes_firmware()
1309 	 * NOTE: the dmem address, write_en, and wdata are all pre-packed,  in load_pcie_serdes_firmware()
1310 	 * we only need to pick up the bytes and write them  in load_pcie_serdes_firmware()
1312 	for (i = 0; i < fdet->firmware_len; i += 4) {  in load_pcie_serdes_firmware()
1314 			     *(u32 *)&fdet->firmware_ptr[i]);  in load_pcie_serdes_firmware()
1316 	/* step 5: disable XDMEM access */  in load_pcie_serdes_firmware()
1318 	/* step 6: allow SBus Spico to run */  in load_pcie_serdes_firmware()
1322 	 * steps 7-11: run RSA, if it succeeds, firmware is available to  in load_pcie_serdes_firmware()
1325 	return run_rsa(dd, "PCIe serdes", fdet->signature);  in load_pcie_serdes_firmware()
1334 	while (--count >= 0) {  in set_serdes_broadcast()
1337 		 * defaults for everything else.  Do not read-modify-write,  in set_serdes_broadcast()
1342 		 *	-----	---------------------------------  in set_serdes_broadcast()
1356 	u8 mask = 1 << dd->hfi1_id;  in acquire_hw_mutex()
1381 		   (u32)user, (u32)mask, (try == 0) ? "retrying" : "giving up");  in acquire_hw_mutex()
1390 	return -EBUSY;  in acquire_hw_mutex()
1395 	u8 mask = 1 << dd->hfi1_id;  in release_hw_mutex()
1416 		   "%s: hardware mutex stuck - suggest rebooting the machine\n",  in fail_mutex_acquire_message()
1423  * Return 0 on success, -EBUSY if resource busy, -EIO if mutex acquire failed.
1432 		if (dd->pcidev->device == PCI_DEVICE_ID_INTEL0 &&  in __acquire_chip_resource()
1441 		my_bit = resource_mask(dd->hfi1_id, resource);  in __acquire_chip_resource()
1443 		/* non-dynamic resources are not split between HFIs */  in __acquire_chip_resource()
1449 	mutex_lock(&dd->asic_data->asic_resource_mutex);  in __acquire_chip_resource()
1454 		ret = -EIO;  in __acquire_chip_resource()
1460 		ret = -EBUSY;  in __acquire_chip_resource()
1470 	mutex_unlock(&dd->asic_data->asic_resource_mutex);  in __acquire_chip_resource()
1475  * Acquire access to a chip resource, wait up to mswait milliseconds for
1478  * Return 0 on success, -EBUSY if busy (even after wait), -EIO if mutex
1489 		if (ret != -EBUSY)  in acquire_chip_resource()
1493 			return -EBUSY;  in acquire_chip_resource()
1511 	bit = resource_mask(dd->hfi1_id, resource);  in release_chip_resource()
1514 	mutex_lock(&dd->asic_data->asic_resource_mutex);  in release_chip_resource()
1529 			    __func__, dd->hfi1_id, resource);  in release_chip_resource()
1535 	mutex_unlock(&dd->asic_data->asic_resource_mutex);  in release_chip_resource()
1548 		bit = resource_mask(dd->hfi1_id, resource);  in check_chip_resource()
1557 				    func, dd->hfi1_id, resource);  in check_chip_resource()
1568 	mutex_lock(&dd->asic_data->asic_resource_mutex);  in clear_chip_resources()
1577 	scratch0 &= ~resource_mask(dd->hfi1_id, CR_DYN_MASK);  in clear_chip_resources()
1585 	mutex_unlock(&dd->asic_data->asic_resource_mutex);  in clear_chip_resources()
1633 				     fabric_serdes_broadcast[dd->hfi1_id],  in load_firmware()
1634 				     fabric_serdes_addrs[dd->hfi1_id],  in load_firmware()
1662 	if (dd->icode != ICODE_RTL_SILICON) {  in hfi1_firmware_init()
1669 	if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR)  in hfi1_firmware_init()
1673 		if (dd->icode == ICODE_RTL_SILICON)  in hfi1_firmware_init()
1691  * (because we know it is invalid as we are building up the cache).
1698 	struct platform_config_cache *pcfgcache = &dd->pcfg_cache;  in check_meta_version()
1701 		return -EINVAL;  in check_meta_version()
1704 	*(pcfgcache->config_tables[PLATFORM_CONFIG_SYSTEM_TABLE].table_metadata  in check_meta_version()
1707 	mask = ((1 << METADATA_TABLE_FIELD_START_LEN_BITS) - 1);  in check_meta_version()
1712 	mask = ((1 << METADATA_TABLE_FIELD_LEN_LEN_BITS) - 1);  in check_meta_version()
1716 	meta_ver = *((u8 *)system_table + ver_start) & ((1 << ver_len) - 1);  in check_meta_version()
1721 		return -EINVAL;  in check_meta_version()
1728 	struct platform_config_cache *pcfgcache = &dd->pcfg_cache;  in parse_platform_config()
1729 	struct hfi1_pportdata *ppd = dd->pport;  in parse_platform_config()
1733 	int ret = -EINVAL; /* assume failure */  in parse_platform_config()
1741 	if (ppd->config_from_scratch)  in parse_platform_config()
1744 	if (!dd->platform_config.data) {  in parse_platform_config()
1746 		ret = -EINVAL;  in parse_platform_config()
1749 	ptr = (u32 *)dd->platform_config.data;  in parse_platform_config()
1755 		ret = -EINVAL;  in parse_platform_config()
1776 	if (file_length > dd->platform_config.size) {  in parse_platform_config()
1779 		ret = -EINVAL;  in parse_platform_config()
1781 	} else if (file_length < dd->platform_config.size) {  in parse_platform_config()
1789 	 * In both cases where we proceed, using the self-reported file length  in parse_platform_config()
1793 	while (ptr < (u32 *)(dd->platform_config.data + file_length)) {  in parse_platform_config()
1798 				   __func__, (ptr - (u32 *)  in parse_platform_config()
1799 					      dd->platform_config.data));  in parse_platform_config()
1800 			ret = -EINVAL;  in parse_platform_config()
1805 			((1 << PLATFORM_CONFIG_HEADER_RECORD_IDX_LEN_BITS) - 1);  in parse_platform_config()
1809 		      ((1 << PLATFORM_CONFIG_HEADER_TABLE_LENGTH_LEN_BITS) - 1);  in parse_platform_config()
1812 			((1 << PLATFORM_CONFIG_HEADER_TABLE_TYPE_LEN_BITS) - 1);  in parse_platform_config()
1821 				pcfgcache->config_tables[table_type].num_table =  in parse_platform_config()
1828 				pcfgcache->config_tables[table_type].num_table =  in parse_platform_config()
1835 				pcfgcache->config_tables[table_type].num_table =  in parse_platform_config()
1842 					   (ptr - (u32 *)  in parse_platform_config()
1843 					    dd->platform_config.data));  in parse_platform_config()
1844 				ret = -EINVAL;  in parse_platform_config()
1847 			pcfgcache->config_tables[table_type].table = ptr;  in parse_platform_config()
1862 					   (ptr -  in parse_platform_config()
1863 					    (u32 *)dd->platform_config.data));  in parse_platform_config()
1864 				ret = -EINVAL;  in parse_platform_config()
1867 			pcfgcache->config_tables[table_type].table_metadata =  in parse_platform_config()
1880 				   __func__, (ptr -  in parse_platform_config()
1881 				   (u32 *)dd->platform_config.data));  in parse_platform_config()
1882 			ret = -EINVAL;  in parse_platform_config()
1889 	pcfgcache->cache_valid = 1;  in parse_platform_config()
1901 	struct hfi1_pportdata *ppd = dd->pport;  in get_integrated_platform_config_field()
1902 	u8 *cache = ppd->qsfp_info.cache;  in get_integrated_platform_config_field()
1908 			*data = ppd->max_power_class;  in get_integrated_platform_config_field()
1910 			*data = ppd->default_atten;  in get_integrated_platform_config_field()
1914 			*data = ppd->port_type;  in get_integrated_platform_config_field()
1916 			*data = ppd->local_atten;  in get_integrated_platform_config_field()
1918 			*data = ppd->remote_atten;  in get_integrated_platform_config_field()
1922 			*data = (ppd->rx_preset & QSFP_RX_CDR_APPLY_SMASK) >>  in get_integrated_platform_config_field()
1925 			*data = (ppd->rx_preset & QSFP_RX_EMP_APPLY_SMASK) >>  in get_integrated_platform_config_field()
1928 			*data = (ppd->rx_preset & QSFP_RX_AMP_APPLY_SMASK) >>  in get_integrated_platform_config_field()
1931 			*data = (ppd->rx_preset & QSFP_RX_CDR_SMASK) >>  in get_integrated_platform_config_field()
1934 			*data = (ppd->rx_preset & QSFP_RX_EMP_SMASK) >>  in get_integrated_platform_config_field()
1937 			*data = (ppd->rx_preset & QSFP_RX_AMP_SMASK) >>  in get_integrated_platform_config_field()
1942 			tx_preset = ppd->tx_preset_eq;  in get_integrated_platform_config_field()
1944 			tx_preset = ppd->tx_preset_noeq;  in get_integrated_platform_config_field()
1978 	struct platform_config_cache *pcfgcache = &dd->pcfg_cache;  in get_platform_fw_field_metadata()
1981 	if (!pcfgcache->cache_valid)  in get_platform_fw_field_metadata()
1982 		return -EINVAL;  in get_platform_fw_field_metadata()
1993 			pcfgcache->config_tables[table].table_metadata + field;  in get_platform_fw_field_metadata()
2001 		return -EINVAL;  in get_platform_fw_field_metadata()
2005 		      ((1 << METADATA_TABLE_FIELD_START_LEN_BITS) - 1);  in get_platform_fw_field_metadata()
2009 		       & ((1 << METADATA_TABLE_FIELD_LEN_LEN_BITS) - 1);  in get_platform_fw_field_metadata()
2019  * The non-obvious parameters:
2020  * @table_index: Acts as a look up key into which instance of the tables the
2037 	struct platform_config_cache *pcfgcache = &dd->pcfg_cache;  in get_platform_config_field()
2038 	struct hfi1_pportdata *ppd = dd->pport;  in get_platform_config_field()
2043 		return -EINVAL;  in get_platform_config_field()
2045 	if (ppd->config_from_scratch) {  in get_platform_config_field()
2058 		return -EINVAL;  in get_platform_config_field()
2066 		src_ptr = pcfgcache->config_tables[table_type].table;  in get_platform_config_field()
2070 				return -EINVAL;  in get_platform_config_field()
2087 		src_ptr = dd->hfi1_id ?  in get_platform_config_field()
2088 			pcfgcache->config_tables[table_type].table + 4 :  in get_platform_config_field()
2089 			pcfgcache->config_tables[table_type].table;  in get_platform_config_field()
2095 		src_ptr = pcfgcache->config_tables[table_type].table;  in get_platform_config_field()
2098 			pcfgcache->config_tables[table_type].num_table)  in get_platform_config_field()
2109 		return -EINVAL;  in get_platform_config_field()
2113 			((1 << field_len_bits) - 1);  in get_platform_config_field()
2143 				     pcie_serdes_broadcast[dd->hfi1_id],  in load_pcie_firmware()
2144 				     pcie_serdes_addrs[dd->hfi1_id],  in load_pcie_firmware()
2168 	dd->base_guid = read_csr(dd, DC_DC8051_CFG_LOCAL_GUID);  in read_guid()
2170 		    (unsigned long long)dd->base_guid);  in read_guid()
2205 		rcv_addr = pcie_serdes_addrs[dd->hfi1_id][i];  in dump_fw_version()
2230 		rcv_addr = fabric_serdes_addrs[dd->hfi1_id][i];  in dump_fw_version()