Lines Matching +full:trig +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2010 Analog Devices Inc.
11 * ----------------------------|------|-------------------------------------------
23 * Resolution | D1:0 | *device tree: assigned-resolution-bits*
34 * ----------------------------------------|----|---------------------------------
152 /* adi,fixed-mode property - only valid when mode_gpios == NULL. */
177 struct gpio_descs *gpios = st->mode_gpios;
180 if (!gpios)
181 return mode == st->fixed_mode ? 0 : -EOPNOTSUPP;
185 return gpiod_set_array_value(gpios->ndescs, gpios->desc, gpios->info,
202 .rx_buf = &st->rx[0],
203 .tx_buf = &st->tx[0],
207 .rx_buf = &st->rx[1],
208 .tx_buf = &st->tx[1],
215 return -EINVAL;
217 st->tx[0] = reg;
218 st->tx[1] = val;
224 ret = spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers));
230 st->prev_fault_flags = 0;
248 .rx_buf = &st->rx[0],
249 .tx_buf = &st->tx[0],
253 .rx_buf = &st->rx[1],
254 .tx_buf = &st->tx[1],
263 st->tx[0] = reg;
266 * It doesn't matter which one as long as reading doesn't have side-
269 st->tx[1] = AD2S1210_REG_CONTROL;
271 ret = spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers));
277 st->prev_fault_flags = 0;
281 * parity error. The fault register is read-only and the D7 bit means
285 && st->rx[1] & AD2S1210_ADDRESS_DATA)
286 return -EBADMSG;
288 *val = st->rx[1];
304 * ~= 350 ns. The same delay is also needed before re-asserting the
307 gpiod_set_value(st->sample_gpio, 1);
309 gpiod_set_value(st->sample_gpio, 0);
327 fcw = fexcit * (1 << 15) / st->clkin_hz;
329 return -ERANGE;
331 ret = regmap_write(st->regmap, AD2S1210_REG_EXCIT_FREQ, fcw);
339 ret = regmap_write(st->regmap, AD2S1210_REG_SOFT_RESET, 0);
349 msleep(track_time_ms[st->resolution] * 8192000 / st->clkin_hz);
352 ret = regmap_read(st->regmap, AD2S1210_REG_FAULT, &ignored);
368 if (FAULT_ONESHOT(AD2S1210_FAULT_CLIP, flags, st->prev_fault_flags)) {
386 if (FAULT_ONESHOT(AD2S1210_FAULT_LOS, flags, st->prev_fault_flags))
394 if (FAULT_ONESHOT(AD2S1210_FAULT_DOS_OVR, flags, st->prev_fault_flags))
402 if (FAULT_ONESHOT(AD2S1210_FAULT_DOS_MIS, flags, st->prev_fault_flags))
410 if (FAULT_ONESHOT(AD2S1210_FAULT_LOT, flags, st->prev_fault_flags))
418 if (FAULT_ONESHOT(AD2S1210_FAULT_VELOCITY, flags, st->prev_fault_flags))
426 if (FAULT_ONESHOT(AD2S1210_FAULT_PHASE, flags, st->prev_fault_flags))
435 st->prev_fault_flags))
440 dev_err_ratelimited(&indio_dev->dev,
443 st->prev_fault_flags = flags;
454 guard(mutex)(&st->lock);
459 if (st->fixed_mode == MOD_CONFIG) {
462 switch (chan->type) {
464 ret = regmap_bulk_read(st->regmap,
466 &st->sample.raw, 2);
472 ret = regmap_bulk_read(st->regmap,
474 &st->sample.raw, 2);
480 return -EINVAL;
483 ret = regmap_read(st->regmap, AD2S1210_REG_FAULT, ®_val);
487 st->sample.fault = reg_val;
489 switch (chan->type) {
497 return -EINVAL;
502 ret = spi_read(st->sdev, &st->sample, 3);
507 switch (chan->type) {
509 *val = be16_to_cpu(st->sample.raw);
513 *val = (s16)be16_to_cpu(st->sample.raw);
517 return -EINVAL;
520 ad2s1210_push_events(indio_dev, st->sample.fault, timestamp);
529 guard(mutex)(&st->lock);
530 ret = regmap_test_bits(st->regmap, AD2S1210_REG_CONTROL,
535 *val = ret << (2 * (AD2S1210_RES_16 - st->resolution));
541 guard(mutex)(&st->lock);
542 return regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL,
552 guard(mutex)(&st->lock);
553 ret = regmap_test_bits(st->regmap, AD2S1210_REG_CONTROL,
576 /* convert radians to degrees - only two allowable values */
583 return -EINVAL;
585 guard(mutex)(&st->lock);
586 return regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL,
593 6184, /* 10-bit: ~0.35 deg/LSB, 45 deg max */
594 2473, /* 12-bit: ~0.14 deg/LSB, 18 deg max */
595 1237, /* 14-bit: ~0.07 deg/LSB, 9 deg max */
596 1237, /* 16-bit: same as 14-bit */
605 guard(mutex)(&st->lock);
606 ret = regmap_read(st->regmap, reg, ®_val);
621 guard(mutex)(&st->lock);
622 return regmap_write(st->regmap, reg, reg_val);
631 guard(mutex)(&st->lock);
632 ret = regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, ®_val);
637 *val2 = reg_val * ad2s1210_lot_threshold_urad_per_lsb[st->resolution];
649 return -EINVAL;
651 guard(mutex)(&st->lock);
656 ret = regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, &high_reg_val);
660 ret = regmap_read(st->regmap, AD2S1210_REG_LOT_LOW_THRD, &low_reg_val);
664 hysteresis = high_reg_val - low_reg_val;
665 high_reg_val = val2 / ad2s1210_lot_threshold_urad_per_lsb[st->resolution];
666 low_reg_val = high_reg_val - hysteresis;
668 ret = regmap_write(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, high_reg_val);
672 return regmap_write(st->regmap, AD2S1210_REG_LOT_LOW_THRD, low_reg_val);
681 guard(mutex)(&st->lock);
683 ret = regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, &high_reg_val);
687 ret = regmap_read(st->regmap, AD2S1210_REG_LOT_LOW_THRD, &low_reg_val);
693 *val2 = (high_reg_val - low_reg_val) *
694 ad2s1210_lot_threshold_urad_per_lsb[st->resolution];
706 return -EINVAL;
708 hysteresis = val2 / ad2s1210_lot_threshold_urad_per_lsb[st->resolution];
710 guard(mutex)(&st->lock);
712 ret = regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, ®_val);
716 return regmap_write(st->regmap, AD2S1210_REG_LOT_LOW_THRD,
717 reg_val - hysteresis);
725 guard(mutex)(&st->lock);
727 ret = regmap_read(st->regmap, AD2S1210_REG_EXCIT_FREQ, ®_val);
731 *val = reg_val * st->clkin_hz / (1 << 15);
738 return -EINVAL;
740 guard(mutex)(&st->lock);
763 switch (chan->type) {
770 *val = st->clkin_hz;
771 *val2 = ad2s1210_velocity_scale[st->resolution];
774 return -EINVAL;
777 switch (chan->type) {
781 return -EINVAL;
784 switch (chan->type) {
788 return -EINVAL;
791 return -EINVAL;
810 switch (chan->type) {
816 return -EINVAL;
819 switch (chan->type) {
821 *vals = st->hysteresis_available;
823 *length = ARRAY_SIZE(st->hysteresis_available);
826 return -EINVAL;
829 return -EINVAL;
841 switch (chan->type) {
845 return -EINVAL;
848 switch (chan->type) {
852 return -EINVAL;
855 return -EINVAL;
960 .scan_index = -1,
969 .scan_index = -1,
978 .scan_index = -1,
986 .scan_index = -1,
994 .scan_index = -1,
1002 .scan_index = -1,
1017 guard(mutex)(&st->lock);
1018 ret = regmap_read(st->regmap, iattr->address, &value);
1036 return -EINVAL;
1038 guard(mutex)(&st->lock);
1039 ret = regmap_write(st->regmap, iattr->address,
1053 int step = ad2s1210_lot_threshold_urad_per_lsb[st->resolution];
1064 int step = ad2s1210_lot_threshold_urad_per_lsb[st->resolution];
1114 guard(mutex)(&st->lock);
1120 data |= FIELD_PREP(AD2S1210_SET_RES, st->resolution);
1122 ret = regmap_write(st->regmap, AD2S1210_REG_CONTROL, data);
1133 if (chan->type == IIO_ANGL) {
1134 if (chan->channel == 0)
1136 if (chan->channel == 1)
1139 if (chan->type == IIO_ANGL_VEL)
1141 if (chan->type == IIO_PHASE)
1143 if (chan->type == IIO_ALTVOLTAGE) {
1144 if (chan->output)
1146 if (chan->channel == 0)
1148 if (chan->channel == 1)
1150 if (chan->channel == 2)
1154 return -EINVAL;
1166 switch (chan->type) {
1174 return -EINVAL;
1177 if (chan->output)
1178 return -EINVAL;
1188 return -EINVAL;
1192 return -EINVAL;
1205 switch (chan->type) {
1213 return -EINVAL;
1216 if (chan->output)
1217 return -EINVAL;
1227 return -EINVAL;
1231 return -EINVAL;
1241 if (chan->type == IIO_ANGL)
1243 if (chan->type == IIO_ANGL_VEL)
1245 if (chan->type == IIO_PHASE)
1247 if (chan->type == IIO_ALTVOLTAGE) {
1248 if (chan->channel == 0) {
1258 if (chan->channel == 1 || chan->channel == 2)
1262 return -EINVAL;
1271 guard(mutex)(&st->lock);
1274 return regmap_read(st->regmap, reg, readval);
1276 return regmap_write(st->regmap, reg, writeval);
1282 struct iio_dev *indio_dev = pf->indio_dev;
1287 guard(mutex)(&st->lock);
1289 memset(&st->scan, 0, sizeof(st->scan));
1292 if (test_bit(0, indio_dev->active_scan_mask)) {
1293 if (st->fixed_mode == MOD_CONFIG) {
1294 ret = regmap_bulk_read(st->regmap,
1296 &st->sample.raw, 2);
1304 ret = spi_read(st->sdev, &st->sample, 3);
1309 memcpy(&st->scan.chan[chan++], &st->sample.raw, 2);
1312 if (test_bit(1, indio_dev->active_scan_mask)) {
1313 if (st->fixed_mode == MOD_CONFIG) {
1314 ret = regmap_bulk_read(st->regmap,
1316 &st->sample.raw, 2);
1324 ret = spi_read(st->sdev, &st->sample, 3);
1329 memcpy(&st->scan.chan[chan++], &st->sample.raw, 2);
1332 if (st->fixed_mode == MOD_CONFIG) {
1335 ret = regmap_read(st->regmap, AD2S1210_REG_FAULT, ®_val);
1339 st->sample.fault = reg_val;
1342 ad2s1210_push_events(indio_dev, st->sample.fault, pf->timestamp);
1343 iio_push_to_buffers_with_timestamp(indio_dev, &st->scan, pf->timestamp);
1346 iio_trigger_notify_done(indio_dev->trig);
1365 struct device *dev = &st->sdev->dev;
1370 ret = device_property_read_string(dev, "adi,fixed-mode", &str_val);
1371 if (ret == -EINVAL)
1372 st->fixed_mode = -1;
1375 "failed to read adi,fixed-mode property\n");
1378 return dev_err_probe(dev, -EINVAL,
1379 "only adi,fixed-mode=\"config\" is supported\n");
1381 st->fixed_mode = MOD_CONFIG;
1384 ret = device_property_read_u32(dev, "assigned-resolution-bits", &val);
1387 "failed to read assigned-resolution-bits property\n");
1390 return dev_err_probe(dev, -EINVAL,
1393 st->resolution = (val - 10) >> 1;
1397 * hysteresis is +/- 1 LSB of the raw position value. Which bit is the
1400 st->hysteresis_available[0] = 0;
1401 st->hysteresis_available[1] = 1 << (2 * (AD2S1210_RES_16 -
1402 st->resolution));
1409 struct device *dev = &st->sdev->dev;
1416 st->clkin_hz = clk_get_rate(clk);
1417 if (st->clkin_hz < AD2S1210_MIN_CLKIN || st->clkin_hz > AD2S1210_MAX_CLKIN)
1418 return dev_err_probe(dev, -EINVAL,
1420 st->clkin_hz);
1427 struct device *dev = &st->sdev->dev;
1434 st->sample_gpio = devm_gpiod_get(dev, "sample", GPIOD_OUT_LOW);
1435 if (IS_ERR(st->sample_gpio))
1436 return dev_err_probe(dev, PTR_ERR(st->sample_gpio),
1440 st->mode_gpios = devm_gpiod_get_array_optional(dev, "mode",
1442 if (IS_ERR(st->mode_gpios))
1443 return dev_err_probe(dev, PTR_ERR(st->mode_gpios),
1444 "failed to request mode GPIOs\n");
1446 if (!st->mode_gpios && st->fixed_mode == -1)
1447 return dev_err_probe(dev, -EINVAL,
1448 "must specify either adi,fixed-mode or mode-gpios\n");
1450 if (st->mode_gpios && st->fixed_mode != -1)
1451 return dev_err_probe(dev, -EINVAL,
1452 "must specify only one of adi,fixed-mode or mode-gpios\n");
1454 if (st->mode_gpios && st->mode_gpios->ndescs != 2)
1455 return dev_err_probe(dev, -EINVAL,
1456 "requires exactly 2 mode-gpios\n");
1459 * If resolution gpios are provided, they get set to the required
1461 * hard-wired to match the resolution indicated in the devicetree.
1467 "failed to request resolution GPIOs\n");
1470 if (resolution_gpios->ndescs != 2)
1471 return dev_err_probe(dev, -EINVAL,
1472 "requires exactly 2 resolution-gpios\n");
1474 bitmap[0] = st->resolution;
1476 ret = gpiod_set_array_value(resolution_gpios->ndescs,
1477 resolution_gpios->desc,
1478 resolution_gpios->info,
1482 "failed to set resolution gpios\n");
1525 struct device *dev = &st->sdev->dev;
1537 st->regmap = devm_regmap_init(dev, NULL, st, &config);
1538 if (IS_ERR(st->regmap))
1539 return dev_err_probe(dev, PTR_ERR(st->regmap),
1551 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1553 return -ENOMEM;
1556 mutex_init(&st->lock);
1557 st->sdev = spi;
1579 indio_dev->info = &ad2s1210_info;
1580 indio_dev->modes = INDIO_DIRECT_MODE;
1581 indio_dev->channels = ad2s1210_channels;
1582 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
1583 indio_dev->name = spi_get_device_id(spi)->name;
1585 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
1589 return dev_err_probe(&spi->dev, ret,
1592 return devm_iio_device_register(&spi->dev, indio_dev);