Lines Matching +full:clkin +full:- +full:diff
1 // SPDX-License-Identifier: GPL-2.0
84 /* MOD1 is a 24-bit primary modulus with fixed value of 2^25 */
86 /* MOD2 is the programmable, 14-bit auxiliary fractional modulus */
199 val = (((u64)st->integer * ADF4371_MODULUS1) + st->fract1) * st->fpfd; in adf4371_pll_fract_n_get_rate()
200 tmp = (u64)st->fract2 * st->fpfd; in adf4371_pll_fract_n_get_rate()
201 do_div(tmp, st->mod2); in adf4371_pll_fract_n_get_rate()
205 ref_div_sel = st->rf_div_sel; in adf4371_pll_fract_n_get_rate()
259 return -EINVAL; in adf4371_set_freq()
261 st->rf_div_sel = 0; in adf4371_set_freq()
265 st->rf_div_sel++; in adf4371_set_freq()
271 return -EINVAL; in adf4371_set_freq()
278 return -EINVAL; in adf4371_set_freq()
283 return -EINVAL; in adf4371_set_freq()
286 adf4371_pll_fract_n_compute(freq, st->fpfd, &st->integer, &st->fract1, in adf4371_set_freq()
287 &st->fract2, &st->mod2); in adf4371_set_freq()
288 st->buf[0] = st->integer >> 8; in adf4371_set_freq()
289 st->buf[1] = 0x40; /* REG12 default */ in adf4371_set_freq()
290 st->buf[2] = 0x00; in adf4371_set_freq()
291 st->buf[3] = st->fract1 & 0xFF; in adf4371_set_freq()
292 st->buf[4] = st->fract1 >> 8; in adf4371_set_freq()
293 st->buf[5] = st->fract1 >> 16; in adf4371_set_freq()
294 st->buf[6] = ADF4371_FRAC2WORD_L(st->fract2 & 0x7F) | in adf4371_set_freq()
295 ADF4371_FRAC1WORD(st->fract1 >> 24); in adf4371_set_freq()
296 st->buf[7] = ADF4371_FRAC2WORD_H(st->fract2 >> 7); in adf4371_set_freq()
297 st->buf[8] = st->mod2 & 0xFF; in adf4371_set_freq()
298 st->buf[9] = ADF4371_MOD2WORD(st->mod2 >> 8); in adf4371_set_freq()
300 ret = regmap_bulk_write(st->regmap, ADF4371_REG(0x11), st->buf, 10); in adf4371_set_freq()
307 ret = regmap_write(st->regmap, ADF4371_REG(0x1F), st->ref_div_factor); in adf4371_set_freq()
311 ret = regmap_update_bits(st->regmap, ADF4371_REG(0x24), in adf4371_set_freq()
313 ADF4371_RF_DIV_SEL(st->rf_div_sel)); in adf4371_set_freq()
317 cp_bleed = DIV_ROUND_UP(400 * 1750, st->integer * 375); in adf4371_set_freq()
319 ret = regmap_write(st->regmap, ADF4371_REG(0x26), cp_bleed); in adf4371_set_freq()
326 if (st->fract1 == 0 && st->fract2 == 0) in adf4371_set_freq()
329 ret = regmap_write(st->regmap, ADF4371_REG(0x2B), int_mode); in adf4371_set_freq()
333 return regmap_write(st->regmap, ADF4371_REG(0x10), st->integer & 0xFF); in adf4371_set_freq()
348 val = adf4371_pll_fract_n_get_rate(st, chan->channel); in adf4371_read()
349 ret = regmap_read(st->regmap, ADF4371_REG(0x7C), &readval); in adf4371_read()
354 dev_dbg(&st->spi->dev, "PLL un-locked\n"); in adf4371_read()
355 ret = -EBUSY; in adf4371_read()
359 reg = adf4371_pwrdown_ch[chan->channel].reg; in adf4371_read()
360 bit = adf4371_pwrdown_ch[chan->channel].bit; in adf4371_read()
362 ret = regmap_read(st->regmap, reg, &readval); in adf4371_read()
369 return sprintf(buf, "%s\n", adf4371_ch_names[chan->channel]); in adf4371_read()
371 ret = -EINVAL; in adf4371_read()
390 mutex_lock(&st->lock); in adf4371_write()
397 ret = adf4371_set_freq(st, freq, chan->channel); in adf4371_write()
404 reg = adf4371_pwrdown_ch[chan->channel].reg; in adf4371_write()
405 bit = adf4371_pwrdown_ch[chan->channel].bit; in adf4371_write()
406 ret = regmap_read(st->regmap, reg, &readval); in adf4371_write()
413 ret = regmap_write(st->regmap, reg, readval); in adf4371_write()
416 ret = -EINVAL; in adf4371_write()
419 mutex_unlock(&st->lock); in adf4371_write()
479 return regmap_read(st->regmap, reg, readval); in adf4371_reg_access()
481 return regmap_write(st->regmap, reg, writeval); in adf4371_reg_access()
495 ret = regmap_write(st->regmap, ADF4371_REG(0x0), ADF4371_RESET_CMD); in adf4371_setup()
499 ret = regmap_multi_reg_write(st->regmap, adf4371_reg_defaults, in adf4371_setup()
505 if (device_property_read_bool(&st->spi->dev, "adi,mute-till-lock-en")) { in adf4371_setup()
506 ret = regmap_update_bits(st->regmap, ADF4371_REG(0x25), in adf4371_setup()
514 ret = regmap_update_bits(st->regmap, ADF4371_REG(0x0), in adf4371_setup()
520 if ((st->ref_diff_en && st->clkin_freq > ADF4371_MAX_FREQ_REFIN) || in adf4371_setup()
521 (!st->ref_diff_en && st->clkin_freq > ADF4371_MAX_FREQ_REFIN_SE)) in adf4371_setup()
522 return -EINVAL; in adf4371_setup()
524 if (st->clkin_freq < ADF4371_MAX_CLKIN_DOUB_FREQ && in adf4371_setup()
525 st->clkin_freq > ADF4371_MIN_CLKIN_DOUB_FREQ) in adf4371_setup()
528 ret = regmap_update_bits(st->regmap, ADF4371_REG(0x22), in adf4371_setup()
532 ADF4371_REFIN_MODE(st->ref_diff_en)); in adf4371_setup()
544 st->ref_div_factor++; in adf4371_setup()
545 st->fpfd = st->clkin_freq * (1 + ref_doubler_en) / in adf4371_setup()
546 st->ref_div_factor; in adf4371_setup()
547 } while (st->fpfd > ADF4371_MAX_FREQ_PFD); in adf4371_setup()
550 vco_band_div = DIV_ROUND_UP(st->fpfd, 2400000U); in adf4371_setup()
552 tmp = DIV_ROUND_CLOSEST(st->fpfd, 1000000U); in adf4371_setup()
563 } while (vco_alc_timeout * 1024 - timeout <= 50 * tmp); in adf4371_setup()
565 st->buf[0] = vco_band_div; in adf4371_setup()
566 st->buf[1] = timeout & 0xFF; in adf4371_setup()
567 st->buf[2] = ADF4371_TIMEOUT(timeout >> 8) | 0x04; in adf4371_setup()
568 st->buf[3] = synth_timeout; in adf4371_setup()
569 st->buf[4] = ADF4371_VCO_ALC_TOUT(vco_alc_timeout); in adf4371_setup()
571 return regmap_bulk_write(st->regmap, ADF4371_REG(0x30), st->buf, 5); in adf4371_setup()
579 struct clk *clkin; in adf4371_probe() local
582 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in adf4371_probe()
584 return -ENOMEM; in adf4371_probe()
588 return dev_err_probe(&spi->dev, PTR_ERR(regmap), in adf4371_probe()
592 st->spi = spi; in adf4371_probe()
593 st->regmap = regmap; in adf4371_probe()
594 mutex_init(&st->lock); in adf4371_probe()
596 st->chip_info = spi_get_device_match_data(spi); in adf4371_probe()
597 if (!st->chip_info) in adf4371_probe()
598 return -ENODEV; in adf4371_probe()
600 indio_dev->name = st->chip_info->name; in adf4371_probe()
601 indio_dev->info = &adf4371_info; in adf4371_probe()
602 indio_dev->modes = INDIO_DIRECT_MODE; in adf4371_probe()
603 indio_dev->channels = st->chip_info->channels; in adf4371_probe()
604 indio_dev->num_channels = st->chip_info->num_channels; in adf4371_probe()
606 st->ref_diff_en = false; in adf4371_probe()
608 clkin = devm_clk_get_enabled(&spi->dev, "clkin"); in adf4371_probe()
609 if (IS_ERR(clkin)) { in adf4371_probe()
610 clkin = devm_clk_get_enabled(&spi->dev, "clkin-diff"); in adf4371_probe()
611 if (IS_ERR(clkin)) in adf4371_probe()
612 return dev_err_probe(&spi->dev, PTR_ERR(clkin), in adf4371_probe()
613 "Failed to get clkin/clkin-diff\n"); in adf4371_probe()
614 st->ref_diff_en = true; in adf4371_probe()
617 st->clkin_freq = clk_get_rate(clkin); in adf4371_probe()
621 return dev_err_probe(&spi->dev, ret, "ADF4371 setup failed\n"); in adf4371_probe()
623 return devm_iio_device_register(&spi->dev, indio_dev); in adf4371_probe()