1 // SPDX-License-Identifier: GPL-2.0-only
5  * Copyright 2012-2013 Analog Devices Inc.
22 #include <linux/clk-provider.h>
44 	unsigned long			chspc; /* Channel Spacing */
83 	for (i = ADF4350_REG5; i >= ADF4350_REG0; i--) {  in adf4350_sync_config()
84 		if ((st->regs_hw[i] != st->regs[i]) ||  in adf4350_sync_config()
93 			st->val  = cpu_to_be32(st->regs[i] | i);  in adf4350_sync_config()
94 			ret = spi_write(st->spi, &st->val, 4);  in adf4350_sync_config()
97 			st->regs_hw[i] = st->regs[i];  in adf4350_sync_config()
98 			dev_dbg(&st->spi->dev, "[%d] 0x%X\n",  in adf4350_sync_config()
99 				i, (u32)st->regs[i] | i);  in adf4350_sync_config()
106 			      unsigned reg, unsigned writeval,  in adf4350_reg_access()  argument
112 	if (reg > ADF4350_REG5)  in adf4350_reg_access()
113 		return -EINVAL;  in adf4350_reg_access()
115 	mutex_lock(&st->lock);  in adf4350_reg_access()
117 		st->regs[reg] = writeval & ~(BIT(0) | BIT(1) | BIT(2));  in adf4350_reg_access()
120 		*readval =  st->regs_hw[reg];  in adf4350_reg_access()
123 	mutex_unlock(&st->lock);  in adf4350_reg_access()
130 	struct adf4350_platform_data *pdata = st->pdata;  in adf4350_tune_r_cnt()
134 		st->fpfd = (st->clkin * (pdata->ref_doubler_en ? 2 : 1)) /  in adf4350_tune_r_cnt()
135 			   (r_cnt * (pdata->ref_div2_en ? 2 : 1));  in adf4350_tune_r_cnt()
136 	} while (st->fpfd > ADF4350_MAX_FREQ_PFD);  in adf4350_tune_r_cnt()
143 	struct adf4350_platform_data *pdata = st->pdata;  in adf4350_set_freq()
149 	if (freq > ADF4350_MAX_OUT_FREQ || freq < st->min_out_freq)  in adf4350_set_freq()
150 		return -EINVAL;  in adf4350_set_freq()
160 	st->r4_rf_div_sel = 0;  in adf4350_set_freq()
164 		st->r4_rf_div_sel++;  in adf4350_set_freq()
171 	if (pdata->ref_div_factor)  in adf4350_set_freq()
172 		r_cnt = pdata->ref_div_factor - 1;  in adf4350_set_freq()
174 	chspc = st->chspc;  in adf4350_set_freq()
180 				st->r1_mod = st->fpfd / chspc;  in adf4350_set_freq()
182 					/* try higher spacing values */  in adf4350_set_freq()
186 			} while ((st->r1_mod > ADF4350_MAX_MODULUS) && r_cnt);  in adf4350_set_freq()
189 		tmp = freq * (u64)st->r1_mod + (st->fpfd >> 1);  in adf4350_set_freq()
190 		do_div(tmp, st->fpfd); /* Div round closest (n + d/2)/d */  in adf4350_set_freq()
191 		st->r0_fract = do_div(tmp, st->r1_mod);  in adf4350_set_freq()
192 		st->r0_int = tmp;  in adf4350_set_freq()
193 	} while (mdiv > st->r0_int);  in adf4350_set_freq()
195 	band_sel_div = DIV_ROUND_UP(st->fpfd, ADF4350_MAX_BANDSEL_CLK);  in adf4350_set_freq()
197 	if (st->r0_fract && st->r1_mod) {  in adf4350_set_freq()
198 		div_gcd = gcd(st->r1_mod, st->r0_fract);  in adf4350_set_freq()
199 		st->r1_mod /= div_gcd;  in adf4350_set_freq()
200 		st->r0_fract /= div_gcd;  in adf4350_set_freq()
202 		st->r0_fract = 0;  in adf4350_set_freq()
203 		st->r1_mod = 1;  in adf4350_set_freq()
206 	dev_dbg(&st->spi->dev, "VCO: %llu Hz, PFD %lu Hz\n"  in adf4350_set_freq()
209 		freq, st->fpfd, r_cnt, st->r0_int, st->r0_fract, st->r1_mod,  in adf4350_set_freq()
210 		1 << st->r4_rf_div_sel, prescaler ? "8/9" : "4/5",  in adf4350_set_freq()
213 	st->regs[ADF4350_REG0] = ADF4350_REG0_INT(st->r0_int) |  in adf4350_set_freq()
214 				 ADF4350_REG0_FRACT(st->r0_fract);  in adf4350_set_freq()
216 	st->regs[ADF4350_REG1] = ADF4350_REG1_PHASE(1) |  in adf4350_set_freq()
217 				 ADF4350_REG1_MOD(st->r1_mod) |  in adf4350_set_freq()
220 	st->regs[ADF4350_REG2] =  in adf4350_set_freq()
223 		(pdata->ref_doubler_en ? ADF4350_REG2_RMULT2_EN : 0) |  in adf4350_set_freq()
224 		(pdata->ref_div2_en ? ADF4350_REG2_RDIV2_EN : 0) |  in adf4350_set_freq()
225 		(pdata->r2_user_settings & (ADF4350_REG2_PD_POLARITY_POS |  in adf4350_set_freq()
230 	st->regs[ADF4350_REG3] = pdata->r3_user_settings &  in adf4350_set_freq()
238 	st->regs[ADF4350_REG4] =  in adf4350_set_freq()
240 		ADF4350_REG4_RF_DIV_SEL(st->r4_rf_div_sel) |  in adf4350_set_freq()
243 		(pdata->r4_user_settings &  in adf4350_set_freq()
250 	st->regs[ADF4350_REG5] = ADF4350_REG5_LD_PIN_MODE_DIGITAL;  in adf4350_set_freq()
251 	st->freq_req = freq;  in adf4350_set_freq()
270 	mutex_lock(&st->lock);  in adf4350_write()
277 			ret = -EINVAL;  in adf4350_write()
281 		if (st->clk) {  in adf4350_write()
282 			tmp = clk_round_rate(st->clk, readin);  in adf4350_write()
284 				ret = -EINVAL;  in adf4350_write()
287 			ret = clk_set_rate(st->clk, tmp);  in adf4350_write()
291 		st->clkin = readin;  in adf4350_write()
292 		ret = adf4350_set_freq(st, st->freq_req);  in adf4350_write()
296 			ret = -EINVAL;  in adf4350_write()
298 			st->chspc = readin;  in adf4350_write()
302 			st->regs[ADF4350_REG2] |= ADF4350_REG2_POWER_DOWN_EN;  in adf4350_write()
304 			st->regs[ADF4350_REG2] &= ~ADF4350_REG2_POWER_DOWN_EN;  in adf4350_write()
309 		ret = -EINVAL;  in adf4350_write()
311 	mutex_unlock(&st->lock);  in adf4350_write()
325 	mutex_lock(&st->lock);  in adf4350_read()
328 		val = (u64)((st->r0_int * st->r1_mod) + st->r0_fract) *  in adf4350_read()
329 			(u64)st->fpfd;  in adf4350_read()
330 		do_div(val, st->r1_mod * (1 << st->r4_rf_div_sel));  in adf4350_read()
332 		if (st->lock_detect_gpiod)  in adf4350_read()
333 			if (!gpiod_get_value(st->lock_detect_gpiod)) {  in adf4350_read()
334 				dev_dbg(&st->spi->dev, "PLL un-locked\n");  in adf4350_read()
335 				ret = -EBUSY;  in adf4350_read()
339 		if (st->clk)  in adf4350_read()
340 			st->clkin = clk_get_rate(st->clk);  in adf4350_read()
342 		val = st->clkin;  in adf4350_read()
345 		val = st->chspc;  in adf4350_read()
348 		val = !!(st->regs[ADF4350_REG2] & ADF4350_REG2_POWER_DOWN_EN);  in adf4350_read()
351 		ret = -EINVAL;  in adf4350_read()
354 	mutex_unlock(&st->lock);  in adf4350_read()
394 	of_clk_del_provider(st->spi->dev.of_node);  in adf4350_clk_del_provider()
403 	tmp = (u64)(st->r0_int * st->r1_mod + st->r0_fract) * st->fpfd;  in adf4350_clk_recalc_rate()
404 	do_div(tmp, st->r1_mod * (1 << st->r4_rf_div_sel));  in adf4350_clk_recalc_rate()
416 		return -EINVAL;  in adf4350_clk_set_rate()
418 	st->clkin = parent_rate;  in adf4350_clk_set_rate()
427 	st->regs[ADF4350_REG2] &= ~ADF4350_REG2_POWER_DOWN_EN;  in adf4350_clk_prepare()
436 	st->regs[ADF4350_REG2] |= ADF4350_REG2_POWER_DOWN_EN;  in adf4350_clk_unprepare()
445 	return (st->regs[ADF4350_REG2] & ADF4350_REG2_POWER_DOWN_EN);  in adf4350_clk_is_enabled()
458 	struct spi_device *spi = st->spi;  in adf4350_clk_register()
464 	if (!device_property_present(&spi->dev, "#clock-cells"))  in adf4350_clk_register()
467 	if (device_property_read_string(&spi->dev, "clock-output-names", &init.name)) {  in adf4350_clk_register()
468 		init.name = devm_kasprintf(&spi->dev, GFP_KERNEL, "%s-clk",  in adf4350_clk_register()
469 					   fwnode_get_name(dev_fwnode(&spi->dev)));  in adf4350_clk_register()
471 			return -ENOMEM;  in adf4350_clk_register()
474 	parent_name = of_clk_get_parent_name(spi->dev.of_node, 0);  in adf4350_clk_register()
476 		return -EINVAL;  in adf4350_clk_register()
483 	st->hw.init = &init;  in adf4350_clk_register()
484 	clk = devm_clk_register(&spi->dev, &st->hw);  in adf4350_clk_register()
488 	ret = of_clk_add_provider(spi->dev.of_node, of_clk_src_simple_get, clk);  in adf4350_clk_register()
492 	st->clkout = clk;  in adf4350_clk_register()
494 	return devm_add_action_or_reset(&spi->dev, adf4350_clk_del_provider, st);  in adf4350_clk_register()
506 	snprintf(pdata->name, sizeof(pdata->name), "%pfw", dev_fwnode(dev));  in adf4350_parse_dt()
509 	device_property_read_u32(dev, "adi,channel-spacing", &tmp);  in adf4350_parse_dt()
510 	pdata->channel_spacing = tmp;  in adf4350_parse_dt()
513 	device_property_read_u32(dev, "adi,power-up-frequency", &tmp);  in adf4350_parse_dt()
514 	pdata->power_up_frequency = tmp;  in adf4350_parse_dt()
517 	device_property_read_u32(dev, "adi,reference-div-factor", &tmp);  in adf4350_parse_dt()
518 	pdata->ref_div_factor = tmp;  in adf4350_parse_dt()
520 	pdata->ref_doubler_en = device_property_read_bool(dev, "adi,reference-doubler-enable");  in adf4350_parse_dt()
521 	pdata->ref_div2_en = device_property_read_bool(dev, "adi,reference-div2-enable");  in adf4350_parse_dt()
524 	pdata->r2_user_settings = 0;  in adf4350_parse_dt()
525 	if (device_property_read_bool(dev, "adi,phase-detector-polarity-positive-enable"))  in adf4350_parse_dt()
526 		pdata->r2_user_settings |= ADF4350_REG2_PD_POLARITY_POS;  in adf4350_parse_dt()
527 	if (device_property_read_bool(dev, "adi,lock-detect-precision-6ns-enable"))  in adf4350_parse_dt()
528 		pdata->r2_user_settings |= ADF4350_REG2_LDP_6ns;  in adf4350_parse_dt()
529 	if (device_property_read_bool(dev, "adi,lock-detect-function-integer-n-enable"))  in adf4350_parse_dt()
530 		pdata->r2_user_settings |= ADF4350_REG2_LDF_INT_N;  in adf4350_parse_dt()
533 	device_property_read_u32(dev, "adi,charge-pump-current", &tmp);  in adf4350_parse_dt()
534 	pdata->r2_user_settings |= ADF4350_REG2_CHARGE_PUMP_CURR_uA(tmp);  in adf4350_parse_dt()
537 	device_property_read_u32(dev, "adi,muxout-select", &tmp);  in adf4350_parse_dt()
538 	pdata->r2_user_settings |= ADF4350_REG2_MUXOUT(tmp);  in adf4350_parse_dt()
540 	if (device_property_read_bool(dev, "adi,low-spur-mode-enable"))  in adf4350_parse_dt()
541 		pdata->r2_user_settings |= ADF4350_REG2_NOISE_MODE(0x3);  in adf4350_parse_dt()
545 	pdata->r3_user_settings = 0;  in adf4350_parse_dt()
546 	if (device_property_read_bool(dev, "adi,cycle-slip-reduction-enable"))  in adf4350_parse_dt()
547 		pdata->r3_user_settings |= ADF4350_REG3_12BIT_CSR_EN;  in adf4350_parse_dt()
548 	if (device_property_read_bool(dev, "adi,charge-cancellation-enable"))  in adf4350_parse_dt()
549 		pdata->r3_user_settings |= ADF4351_REG3_CHARGE_CANCELLATION_EN;  in adf4350_parse_dt()
550 	if (device_property_read_bool(dev, "adi,anti-backlash-3ns-enable"))  in adf4350_parse_dt()
551 		pdata->r3_user_settings |= ADF4351_REG3_ANTI_BACKLASH_3ns_EN;  in adf4350_parse_dt()
552 	if (device_property_read_bool(dev, "adi,band-select-clock-mode-high-enable"))  in adf4350_parse_dt()
553 		pdata->r3_user_settings |= ADF4351_REG3_BAND_SEL_CLOCK_MODE_HIGH;  in adf4350_parse_dt()
556 	device_property_read_u32(dev, "adi,12bit-clk-divider", &tmp);  in adf4350_parse_dt()
557 	pdata->r3_user_settings |= ADF4350_REG3_12BIT_CLKDIV(tmp);  in adf4350_parse_dt()
560 	device_property_read_u32(dev, "adi,clk-divider-mode", &tmp);  in adf4350_parse_dt()
561 	pdata->r3_user_settings |= ADF4350_REG3_12BIT_CLKDIV_MODE(tmp);  in adf4350_parse_dt()
565 	pdata->r4_user_settings = 0;  in adf4350_parse_dt()
566 	if (device_property_read_bool(dev, "adi,aux-output-enable"))  in adf4350_parse_dt()
567 		pdata->r4_user_settings |= ADF4350_REG4_AUX_OUTPUT_EN;  in adf4350_parse_dt()
568 	if (device_property_read_bool(dev, "adi,aux-output-fundamental-enable"))  in adf4350_parse_dt()
569 		pdata->r4_user_settings |= ADF4350_REG4_AUX_OUTPUT_FUND;  in adf4350_parse_dt()
570 	if (device_property_read_bool(dev, "adi,mute-till-lock-enable"))  in adf4350_parse_dt()
571 		pdata->r4_user_settings |= ADF4350_REG4_MUTE_TILL_LOCK_EN;  in adf4350_parse_dt()
574 	device_property_read_u32(dev, "adi,output-power", &tmp);  in adf4350_parse_dt()
575 	pdata->r4_user_settings |= ADF4350_REG4_OUTPUT_PWR(tmp);  in adf4350_parse_dt()
578 	device_property_read_u32(dev, "adi,aux-output-power", &tmp);  in adf4350_parse_dt()
579 	pdata->r4_user_settings |= ADF4350_REG4_AUX_OUTPUT_PWR(tmp);  in adf4350_parse_dt()
589 	st->regs[ADF4350_REG2] |= ADF4350_REG2_POWER_DOWN_EN;  in adf4350_power_down()
601 	if (dev_fwnode(&spi->dev)) {  in adf4350_probe()
602 		pdata = adf4350_parse_dt(&spi->dev);  in adf4350_probe()
604 			return -EINVAL;  in adf4350_probe()
606 		pdata = spi->dev.platform_data;  in adf4350_probe()
610 		dev_warn(&spi->dev, "no platform data? using default\n");  in adf4350_probe()
614 	if (!pdata->clkin) {  in adf4350_probe()
615 		clk = devm_clk_get_enabled(&spi->dev, "clkin");  in adf4350_probe()
620 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));  in adf4350_probe()
622 		return -ENOMEM;  in adf4350_probe()
626 	ret = devm_regulator_get_enable(&spi->dev, "vcc");  in adf4350_probe()
630 	st->spi = spi;  in adf4350_probe()
631 	st->pdata = pdata;  in adf4350_probe()
633 	indio_dev->name = (pdata->name[0] != 0) ? pdata->name :  in adf4350_probe()
634 		spi_get_device_id(spi)->name;  in adf4350_probe()
636 	indio_dev->info = &adf4350_info;  in adf4350_probe()
637 	indio_dev->modes = INDIO_DIRECT_MODE;  in adf4350_probe()
639 	mutex_init(&st->lock);  in adf4350_probe()
641 	st->chspc = pdata->channel_spacing;  in adf4350_probe()
643 		st->clk = clk;  in adf4350_probe()
644 		st->clkin = clk_get_rate(clk);  in adf4350_probe()
646 		st->clkin = pdata->clkin;  in adf4350_probe()
649 	st->min_out_freq = spi_get_device_id(spi)->driver_data == 4351 ?  in adf4350_probe()
652 	memset(st->regs_hw, 0xFF, sizeof(st->regs_hw));  in adf4350_probe()
654 	st->lock_detect_gpiod = devm_gpiod_get_optional(&spi->dev, NULL,  in adf4350_probe()
656 	if (IS_ERR(st->lock_detect_gpiod))  in adf4350_probe()
657 		return PTR_ERR(st->lock_detect_gpiod);  in adf4350_probe()
659 	if (pdata->power_up_frequency) {  in adf4350_probe()
660 		ret = adf4350_set_freq(st, pdata->power_up_frequency);  in adf4350_probe()
669 	if (!st->clkout) {  in adf4350_probe()
670 		indio_dev->channels = &adf4350_chan;  in adf4350_probe()
671 		indio_dev->num_channels = 1;  in adf4350_probe()
674 	ret = devm_add_action_or_reset(&spi->dev, adf4350_power_down, indio_dev);  in adf4350_probe()
676 		return dev_err_probe(&spi->dev, ret,  in adf4350_probe()
679 	return devm_iio_device_register(&spi->dev, indio_dev);  in adf4350_probe()