Lines Matching +full:vref +full:- +full:n +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
166 ret = spi_write_then_read(st->spi, &cmd, 1, NULL, 0);
168 dev_err(&st->spi->dev, "Exec cmd(%02x) failed\n", cmd);
178 .tx_buf = &st->tx_buf,
181 .value = st->sdecode_delay_us,
185 .rx_buf = &st->rx_buf,
190 st->tx_buf[0] = ADS131E08_CMD_RREG(reg);
191 st->tx_buf[1] = 0;
193 ret = spi_sync_transfer(st->spi, transfer, ARRAY_SIZE(transfer));
195 dev_err(&st->spi->dev, "Read register failed\n");
199 return st->rx_buf[0];
207 .tx_buf = &st->tx_buf,
210 .value = st->sdecode_delay_us,
216 st->tx_buf[0] = ADS131E08_CMD_WREG(reg);
217 st->tx_buf[1] = 0;
218 st->tx_buf[2] = value;
220 ret = spi_sync_transfer(st->spi, transfer, ARRAY_SIZE(transfer));
222 dev_err(&st->spi->dev, "Write register failed\n");
232 .tx_buf = &st->tx_buf,
235 .rx_buf = &st->rx_buf,
240 st->tx_buf[0] = ADS131E08_CMD_RDATA;
242 ret = spi_sync_transfer(st->spi, transfer, ARRAY_SIZE(transfer));
244 dev_err(&st->spi->dev, "Read data failed\n");
259 dev_err(&st->spi->dev, "invalid data rate value\n");
260 return -EINVAL;
275 st->data_rate = data_rate;
276 st->readback_len = ADS131E08_NUM_STATUS_BYTES +
277 ADS131E08_NUM_DATA_BYTES(st->data_rate) *
278 st->info->max_channels;
294 dev_err(&st->spi->dev, "invalid PGA gain value\n");
295 return -EINVAL;
331 dev_err(&st->spi->dev, "invalid channel mux value\n");
332 return -EINVAL;
377 if (!st->vref_reg) {
381 st->vref_mv == ADS131E08_VREF_4V_mV);
389 const struct iio_chan_spec *channel = indio_dev->channels;
398 udelay(st->reset_delay_us);
413 for (i = 0; i < indio_dev->num_channels; i++) {
414 ret = ads131e08_set_pga_gain(st, channel->channel,
415 st->channel_config[i].pga_gain);
419 ret = ads131e08_set_channel_mux(st, channel->channel,
420 st->channel_config[i].mux);
424 active_channels |= BIT(channel->channel);
429 for_each_clear_bit(i, &active_channels, st->info->max_channels) {
461 reinit_completion(&st->completion);
468 ret = wait_for_completion_timeout(&st->completion, timeout);
470 return -ETIMEDOUT;
472 ret = ads131e08_read_data(st, st->readback_len);
490 src = st->rx_buf + ADS131E08_NUM_STATUS_BYTES +
491 channel->channel * ADS131E08_NUM_DATA_BYTES(st->data_rate);
493 num_bits = ADS131E08_NUM_DATA_BITS(st->data_rate);
494 *value = sign_extend32(get_unaligned_be32(src) >> (32 - num_bits), num_bits - 1);
520 if (st->vref_reg) {
521 ret = regulator_get_voltage(st->vref_reg);
527 *value = st->vref_mv;
530 *value /= st->channel_config[channel->address].pga_gain;
531 *value2 = ADS131E08_NUM_DATA_BITS(st->data_rate) - 1;
536 *value = st->data_rate;
541 return -EINVAL;
563 return -EINVAL;
616 struct iio_dev *indio_dev = pf->indio_dev;
629 unsigned int num_bytes = ADS131E08_NUM_DATA_BYTES(st->data_rate);
633 ret = ads131e08_read_data(st, st->readback_len);
641 src = st->rx_buf + ADS131E08_NUM_STATUS_BYTES + chn * num_bytes;
642 dest = st->tmp_buf.data + i * ADS131E08_NUM_STORAGE_BYTES;
646 * +---+---+---+---+
648 * +---+---+---+---+
652 * +---+---+---+---+
654 * +---+---+---+---+
669 iio_push_to_buffers_with_timestamp(indio_dev, st->tmp_buf.data,
673 iio_trigger_notify_done(indio_dev->trig);
684 iio_trigger_poll(st->trig);
686 complete(&st->completion);
695 struct device *dev = &st->spi->dev;
700 ret = device_property_read_u32(dev, "ti,vref-internal", &tmp);
706 st->vref_mv = ADS131E08_VREF_2V4_mV;
709 st->vref_mv = ADS131E08_VREF_4V_mV;
712 dev_err(&st->spi->dev, "invalid internal voltage reference\n");
713 return -EINVAL;
718 dev_err(&st->spi->dev, "no channel children\n");
719 return -ENODEV;
722 if (num_channels > st->info->max_channels) {
723 dev_err(&st->spi->dev, "num of channel children out of range\n");
724 return -EINVAL;
727 channels = devm_kcalloc(&st->spi->dev, num_channels,
730 return -ENOMEM;
732 channel_config = devm_kcalloc(&st->spi->dev, num_channels,
735 return -ENOMEM;
781 indio_dev->channels = channels;
782 indio_dev->num_channels = num_channels;
783 st->channel_config = channel_config;
793 regulator_disable(st->vref_reg);
807 dev_err(&spi->dev, "failed to get match data\n");
808 return -ENODEV;
811 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
813 dev_err(&spi->dev, "failed to allocate IIO device\n");
814 return -ENOMEM;
818 st->info = info;
819 st->spi = spi;
825 indio_dev->name = st->info->name;
826 indio_dev->info = &ads131e08_iio_info;
827 indio_dev->modes = INDIO_DIRECT_MODE;
829 init_completion(&st->completion);
831 if (spi->irq) {
832 ret = devm_request_irq(&spi->dev, spi->irq,
835 spi->dev.driver->name, indio_dev);
837 return dev_err_probe(&spi->dev, ret,
838 "request irq failed\n");
840 dev_err(&spi->dev, "data ready IRQ missing\n");
841 return -ENODEV;
844 st->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d",
845 indio_dev->name, iio_device_id(indio_dev));
846 if (!st->trig) {
847 dev_err(&spi->dev, "failed to allocate IIO trigger\n");
848 return -ENOMEM;
851 st->trig->ops = &ads131e08_trigger_ops;
852 st->trig->dev.parent = &spi->dev;
853 iio_trigger_set_drvdata(st->trig, indio_dev);
854 ret = devm_iio_trigger_register(&spi->dev, st->trig);
856 dev_err(&spi->dev, "failed to register IIO trigger\n");
857 return -ENOMEM;
860 indio_dev->trig = iio_trigger_get(st->trig);
862 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
865 dev_err(&spi->dev, "failed to setup IIO buffer\n");
869 st->vref_reg = devm_regulator_get_optional(&spi->dev, "vref");
870 if (!IS_ERR(st->vref_reg)) {
871 ret = regulator_enable(st->vref_reg);
873 dev_err(&spi->dev,
874 "failed to enable external vref supply\n");
878 ret = devm_add_action_or_reset(&spi->dev, ads131e08_regulator_disable, st);
882 if (PTR_ERR(st->vref_reg) != -ENODEV)
883 return PTR_ERR(st->vref_reg);
885 st->vref_reg = NULL;
888 st->adc_clk = devm_clk_get_enabled(&spi->dev, "adc-clk");
889 if (IS_ERR(st->adc_clk))
890 return dev_err_probe(&spi->dev, PTR_ERR(st->adc_clk),
891 "failed to get the ADC clock\n");
893 adc_clk_hz = clk_get_rate(st->adc_clk);
895 dev_err(&spi->dev, "failed to get the ADC clock rate\n");
896 return -EINVAL;
900 st->sdecode_delay_us = DIV_ROUND_UP(
902 st->reset_delay_us = DIV_ROUND_UP(
907 dev_err(&spi->dev, "initial configuration failed\n");
911 return devm_iio_device_register(&spi->dev, indio_dev);