14 #include <linux/iio/adc-helpers.h>
26 #define DRIVER_NAME		"rzg2l-adc"
60  * struct rzg2l_adc_hw_params - ADC hardware specific parameters
61  * @default_adsmp: default ADC sampling period (see ADM3 register); index 0 is
63  * @adsmp_mask: ADC sampling period mask (see ADM3 register)
65  * @default_adcmp: default ADC cmp (see ADM3 register)
96  * struct rzg2l_adc_channel - ADC channel descriptor
97  * @name: ADC channel name
98  * @type: ADC channel type
117 static unsigned int rzg2l_adc_readl(struct rzg2l_adc *adc, u32 reg)  in rzg2l_adc_readl()  argument
119 	return readl(adc->base + reg);  in rzg2l_adc_readl()
122 static void rzg2l_adc_writel(struct rzg2l_adc *adc, unsigned int reg, u32 val)  in rzg2l_adc_writel()  argument
124 	writel(val, adc->base + reg);  in rzg2l_adc_writel()
127 static void rzg2l_adc_pwr(struct rzg2l_adc *adc, bool on)  in rzg2l_adc_pwr()  argument
131 	reg = rzg2l_adc_readl(adc, RZG2L_ADM(0));  in rzg2l_adc_pwr()
136 	rzg2l_adc_writel(adc, RZG2L_ADM(0), reg);  in rzg2l_adc_pwr()
140 static void rzg2l_adc_start_stop(struct rzg2l_adc *adc, bool start)  in rzg2l_adc_start_stop()  argument
145 	reg = rzg2l_adc_readl(adc, RZG2L_ADM(0));  in rzg2l_adc_start_stop()
150 	rzg2l_adc_writel(adc, RZG2L_ADM(0), reg);  in rzg2l_adc_start_stop()
156 				200, 1000, true, adc, RZG2L_ADM(0));  in rzg2l_adc_start_stop()
158 		pr_err("%s stopping ADC timed out\n", __func__);  in rzg2l_adc_start_stop()
161 static void rzg2l_set_trigger(struct rzg2l_adc *adc)  in rzg2l_set_trigger()  argument
172 	reg = rzg2l_adc_readl(adc, RZG2L_ADM(1));  in rzg2l_set_trigger()
177 	rzg2l_adc_writel(adc, RZG2L_ADM(1), reg);  in rzg2l_set_trigger()
188 static int rzg2l_adc_conversion_setup(struct rzg2l_adc *adc, u8 ch)  in rzg2l_adc_conversion_setup()  argument
190 	const struct rzg2l_adc_hw_params *hw_params = adc->hw_params;  in rzg2l_adc_conversion_setup()
194 	if (rzg2l_adc_readl(adc, RZG2L_ADM(0)) & RZG2L_ADM0_ADBSY)  in rzg2l_adc_conversion_setup()
197 	rzg2l_set_trigger(adc);  in rzg2l_adc_conversion_setup()
200 	reg = rzg2l_adc_readl(adc, RZG2L_ADM(2));  in rzg2l_adc_conversion_setup()
203 	rzg2l_adc_writel(adc, RZG2L_ADM(2), reg);  in rzg2l_adc_conversion_setup()
205 	reg = rzg2l_adc_readl(adc, RZG2L_ADM(3));  in rzg2l_adc_conversion_setup()
208 	rzg2l_adc_writel(adc, RZG2L_ADM(3), reg);  in rzg2l_adc_conversion_setup()
216 	reg = rzg2l_adc_readl(adc, RZG2L_ADINT);  in rzg2l_adc_conversion_setup()
220 	rzg2l_adc_writel(adc, RZG2L_ADINT, reg);  in rzg2l_adc_conversion_setup()
225 static int rzg2l_adc_conversion(struct iio_dev *indio_dev, struct rzg2l_adc *adc, u8 ch)  in rzg2l_adc_conversion()  argument
227 	const struct rzg2l_adc_hw_params *hw_params = adc->hw_params;  in rzg2l_adc_conversion()
235 	ret = rzg2l_adc_conversion_setup(adc, ch);  in rzg2l_adc_conversion()
239 	reinit_completion(&adc->completion);  in rzg2l_adc_conversion()
241 	rzg2l_adc_start_stop(adc, true);  in rzg2l_adc_conversion()
243 	if (!wait_for_completion_timeout(&adc->completion, RZG2L_ADC_TIMEOUT)) {  in rzg2l_adc_conversion()
244 		rzg2l_adc_writel(adc, RZG2L_ADINT,  in rzg2l_adc_conversion()
245 				 rzg2l_adc_readl(adc, RZG2L_ADINT) & ~hw_params->adint_inten_mask);  in rzg2l_adc_conversion()
249 	rzg2l_adc_start_stop(adc, false);  in rzg2l_adc_conversion()
261 	struct rzg2l_adc *adc = iio_priv(indio_dev);  in rzg2l_adc_read_raw()  local
269 		guard(mutex)(&adc->lock);  in rzg2l_adc_read_raw()
271 		ret = rzg2l_adc_conversion(indio_dev, adc, chan->channel);  in rzg2l_adc_read_raw()
275 		*val = adc->last_val[chan->channel];  in rzg2l_adc_read_raw()
299 	struct rzg2l_adc *adc = dev_id;  in rzg2l_adc_isr()  local
300 	const struct rzg2l_adc_hw_params *hw_params = adc->hw_params;  in rzg2l_adc_isr()
305 	reg = rzg2l_adc_readl(adc, RZG2L_ADSTS);  in rzg2l_adc_isr()
309 		rzg2l_adc_writel(adc, RZG2L_ADSTS, reg);  in rzg2l_adc_isr()
318 		adc->last_val[ch] = rzg2l_adc_readl(adc, RZG2L_ADCR(ch)) & RZG2L_ADCR_AD_MASK;  in rzg2l_adc_isr()
321 	rzg2l_adc_writel(adc, RZG2L_ADSTS, reg);  in rzg2l_adc_isr()
323 	complete(&adc->completion);  in rzg2l_adc_isr()
333 static int rzg2l_adc_parse_properties(struct platform_device *pdev, struct rzg2l_adc *adc)  in rzg2l_adc_parse_properties()  argument
335 	const struct rzg2l_adc_hw_params *hw_params = adc->hw_params;  in rzg2l_adc_parse_properties()
365 	adc->data = data;  in rzg2l_adc_parse_properties()
370 static int rzg2l_adc_hw_init(struct device *dev, struct rzg2l_adc *adc)  in rzg2l_adc_hw_init()  argument
372 	const struct rzg2l_adc_hw_params *hw_params = adc->hw_params;  in rzg2l_adc_hw_init()
381 	reg = rzg2l_adc_readl(adc, RZG2L_ADM(0));  in rzg2l_adc_hw_init()
383 	rzg2l_adc_writel(adc, RZG2L_ADM(0), reg);  in rzg2l_adc_hw_init()
386 				200, 1000, false, adc, RZG2L_ADM(0));  in rzg2l_adc_hw_init()
392 		reg = rzg2l_adc_readl(adc, RZG2L_ADIVC);  in rzg2l_adc_hw_init()
395 		rzg2l_adc_writel(adc, RZG2L_ADIVC, reg);  in rzg2l_adc_hw_init()
404 	reg = rzg2l_adc_readl(adc, RZG2L_ADM(3));  in rzg2l_adc_hw_init()
411 	rzg2l_adc_writel(adc, RZG2L_ADM(3), reg);  in rzg2l_adc_hw_init()
423 	struct rzg2l_adc *adc;  in rzg2l_adc_probe()  local
427 	indio_dev = devm_iio_device_alloc(dev, sizeof(*adc));  in rzg2l_adc_probe()
431 	adc = iio_priv(indio_dev);  in rzg2l_adc_probe()
433 	adc->hw_params = device_get_match_data(dev);  in rzg2l_adc_probe()
434 	if (!adc->hw_params || adc->hw_params->num_channels > RZG2L_ADC_MAX_CHANNELS)  in rzg2l_adc_probe()
437 	ret = rzg2l_adc_parse_properties(pdev, adc);  in rzg2l_adc_probe()
441 	mutex_init(&adc->lock);  in rzg2l_adc_probe()
443 	adc->base = devm_platform_ioremap_resource(pdev, 0);  in rzg2l_adc_probe()
444 	if (IS_ERR(adc->base))  in rzg2l_adc_probe()
445 		return PTR_ERR(adc->base);  in rzg2l_adc_probe()
447 	adc->adrstn = devm_reset_control_get_exclusive_deasserted(dev, "adrst-n");  in rzg2l_adc_probe()
448 	if (IS_ERR(adc->adrstn))  in rzg2l_adc_probe()
449 		return dev_err_probe(dev, PTR_ERR(adc->adrstn),  in rzg2l_adc_probe()
452 	adc->presetn = devm_reset_control_get_exclusive_deasserted(dev, "presetn");  in rzg2l_adc_probe()
453 	if (IS_ERR(adc->presetn))  in rzg2l_adc_probe()
454 		return dev_err_probe(dev, PTR_ERR(adc->presetn),  in rzg2l_adc_probe()
465 	ret = rzg2l_adc_hw_init(dev, adc);  in rzg2l_adc_probe()
468 				     "failed to initialize ADC HW\n");  in rzg2l_adc_probe()
475 			       0, dev_name(dev), adc);  in rzg2l_adc_probe()
479 	init_completion(&adc->completion);  in rzg2l_adc_probe()
484 	indio_dev->channels = adc->data->channels;  in rzg2l_adc_probe()
485 	indio_dev->num_channels = adc->data->num_channels;  in rzg2l_adc_probe()
508 	{ .compatible = "renesas,r9a08g045-adc", .data = &rzg3s_hw_params },
509 	{ .compatible = "renesas,rzg2l-adc", .data = &rzg2l_hw_params },
517 	struct rzg2l_adc *adc = iio_priv(indio_dev);  in rzg2l_adc_pm_runtime_suspend()  local
519 	rzg2l_adc_pwr(adc, false);  in rzg2l_adc_pm_runtime_suspend()
527 	struct rzg2l_adc *adc = iio_priv(indio_dev);  in rzg2l_adc_pm_runtime_resume()  local
529 	rzg2l_adc_pwr(adc, true);  in rzg2l_adc_pm_runtime_resume()
537 	struct rzg2l_adc *adc = iio_priv(indio_dev);  in rzg2l_adc_suspend()  local
539 		{ .rstc = adc->presetn },  in rzg2l_adc_suspend()
540 		{ .rstc = adc->adrstn },  in rzg2l_adc_suspend()
545 		adc->was_rpm_active = false;  in rzg2l_adc_suspend()
550 		adc->was_rpm_active = true;  in rzg2l_adc_suspend()
560 	if (adc->was_rpm_active)  in rzg2l_adc_suspend()
569 	struct rzg2l_adc *adc = iio_priv(indio_dev);  in rzg2l_adc_resume()  local
571 		{ .rstc = adc->adrstn },  in rzg2l_adc_resume()
572 		{ .rstc = adc->presetn },  in rzg2l_adc_resume()
580 	if (adc->was_rpm_active) {  in rzg2l_adc_resume()
586 	ret = rzg2l_adc_hw_init(dev, adc);  in rzg2l_adc_resume()
593 	if (adc->was_rpm_active) {  in rzg2l_adc_resume()
619 MODULE_DESCRIPTION("Renesas RZ/G2L ADC driver");