1 // SPDX-License-Identifier: GPL-2.0-only
25 #include <dt-bindings/iio/adc/mediatek,mt6357-auxadc.h>
26 #include <dt-bindings/iio/adc/mediatek,mt6358-auxadc.h>
27 #include <dt-bindings/iio/adc/mediatek,mt6359-auxadc.h>
28 #include <dt-bindings/iio/adc/mediatek,mt6363-auxadc.h>
103  * struct mt6359_auxadc - Main driver structure
119  * struct mtk_pmic_auxadc_chan - PMIC AUXADC channel data
143  * struct mtk_pmic_auxadc_info - PMIC specific chip info
145  * @channels:       IIO specification of ADC channels
146  * @num_channels:   Number of ADC channels
151  * @imp_adc_num:    ADC channel for battery impedance readings
153  * @no_reset:       If true, this PMIC does not support ADC reset
168 			const struct iio_chan_spec *chan, int *vbat, int *ibat);
189 			      -1, 0, 0, _samples, _rnum, _rdiv)
455 	const struct mtk_pmic_auxadc_info *cinfo = adc_dev->chip_info;  in mt6358_stop_imp_conv()
456 	struct regmap *regmap = adc_dev->regmap;  in mt6358_stop_imp_conv()
458 	regmap_set_bits(regmap, cinfo->regs[PMIC_AUXADC_IMP0], MT6358_IMP0_CLEAR);  in mt6358_stop_imp_conv()
459 	regmap_clear_bits(regmap, cinfo->regs[PMIC_AUXADC_IMP0], MT6358_IMP0_CLEAR);  in mt6358_stop_imp_conv()
460 	regmap_clear_bits(regmap, cinfo->regs[PMIC_AUXADC_IMP1], MT6358_IMP1_AUTOREPEAT_EN);  in mt6358_stop_imp_conv()
461 	regmap_clear_bits(regmap, cinfo->regs[PMIC_AUXADC_DCM_CON], MT6358_DCM_CK_SW_EN);  in mt6358_stop_imp_conv()
464 static int mt6358_start_imp_conv(struct mt6359_auxadc *adc_dev, const struct iio_chan_spec *chan)  in mt6358_start_imp_conv()  argument
466 	const struct mtk_pmic_auxadc_info *cinfo = adc_dev->chip_info;  in mt6358_start_imp_conv()
467 	const struct mtk_pmic_auxadc_chan *desc = &cinfo->desc[chan->scan_index];  in mt6358_start_imp_conv()
468 	struct regmap *regmap = adc_dev->regmap;  in mt6358_start_imp_conv()
472 	regmap_set_bits(regmap, cinfo->regs[PMIC_AUXADC_DCM_CON], MT6358_DCM_CK_SW_EN);  in mt6358_start_imp_conv()
473 	regmap_set_bits(regmap, cinfo->regs[PMIC_AUXADC_IMP1], MT6358_IMP1_AUTOREPEAT_EN);  in mt6358_start_imp_conv()
475 	ret = regmap_read_poll_timeout(regmap, cinfo->regs[desc->rdy_idx],  in mt6358_start_imp_conv()
476 				       val, val & desc->rdy_mask,  in mt6358_start_imp_conv()
487 			   const struct iio_chan_spec *chan, int *vbat, int *ibat)  in mt6358_read_imp()  argument
489 	const struct mtk_pmic_auxadc_info *cinfo = adc_dev->chip_info;  in mt6358_read_imp()
490 	struct regmap *regmap = adc_dev->regmap;  in mt6358_read_imp()
491 	u16 reg_adc0 = cinfo->regs[PMIC_AUXADC_ADC0];  in mt6358_read_imp()
495 	ret = mt6358_start_imp_conv(adc_dev, chan);  in mt6358_read_imp()
500 	regmap_read(regmap, reg_adc0 + (cinfo->imp_adc_num << 1), &val_v);  in mt6358_read_imp()
513 			   const struct iio_chan_spec *chan, int *vbat, int *ibat)  in mt6359_read_imp()  argument
515 	const struct mtk_pmic_auxadc_info *cinfo = adc_dev->chip_info;  in mt6359_read_imp()
516 	const struct mtk_pmic_auxadc_chan *desc = &cinfo->desc[chan->scan_index];  in mt6359_read_imp()
517 	struct regmap *regmap = adc_dev->regmap;  in mt6359_read_imp()
522 	regmap_write(regmap, cinfo->regs[PMIC_AUXADC_IMP0], MT6359_IMP0_CONV_EN);  in mt6359_read_imp()
523 	ret = regmap_read_poll_timeout(regmap, cinfo->regs[desc->rdy_idx],  in mt6359_read_imp()
524 				       val, val & desc->rdy_mask,  in mt6359_read_imp()
528 	regmap_write(regmap, cinfo->regs[PMIC_AUXADC_IMP0], 0);  in mt6359_read_imp()
535 	ret = regmap_read(regmap, cinfo->regs[PMIC_AUXADC_IMP3], &val_v);  in mt6359_read_imp()
539 	ret = regmap_read(regmap, cinfo->regs[PMIC_FGADC_R_CON0], &val_i);  in mt6359_read_imp()
608 	const struct mtk_pmic_auxadc_info *cinfo = adc_dev->chip_info;  in mt6359_auxadc_reset()
609 	struct regmap *regmap = adc_dev->regmap;  in mt6359_auxadc_reset()
612 	if (cinfo->no_reset)  in mt6359_auxadc_reset()
616 	if (cinfo->sec_unlock_key)  in mt6359_auxadc_reset()
617 		regmap_write(regmap, cinfo->regs[PMIC_HK_TOP_WKEY], cinfo->sec_unlock_key);  in mt6359_auxadc_reset()
619 	/* Assert ADC reset */  in mt6359_auxadc_reset()
620 	regmap_set_bits(regmap, cinfo->regs[PMIC_HK_TOP_RST_CON0], PMIC_RG_RESET_VAL);  in mt6359_auxadc_reset()
622 	/* De-assert ADC reset. No wait required, as pwrap takes care of that for us. */  in mt6359_auxadc_reset()
623 	regmap_clear_bits(regmap, cinfo->regs[PMIC_HK_TOP_RST_CON0], PMIC_RG_RESET_VAL);  in mt6359_auxadc_reset()
626 	if (cinfo->sec_unlock_key)  in mt6359_auxadc_reset()
627 		regmap_write(regmap, cinfo->regs[PMIC_HK_TOP_WKEY], 0);  in mt6359_auxadc_reset()
631  * mt6359_auxadc_sample_adc_val() - Start ADC channel sampling and read value
633  * @chan:    IIO Channel spec for requested ADC
636  * This function starts the sampling for an ADC channel, waits until all
639  * Note that the caller must stop the ADC sampling on its own, as this
647 					const struct iio_chan_spec *chan, u32 *out)  in mt6359_auxadc_sample_adc_val()  argument
649 	const struct mtk_pmic_auxadc_info *cinfo = adc_dev->chip_info;  in mt6359_auxadc_sample_adc_val()
650 	const struct mtk_pmic_auxadc_chan *desc = &cinfo->desc[chan->scan_index];  in mt6359_auxadc_sample_adc_val()
651 	struct regmap *regmap = adc_dev->regmap;  in mt6359_auxadc_sample_adc_val()
655 	/* Request to start sampling for ADC channel */  in mt6359_auxadc_sample_adc_val()
656 	ret = regmap_write(regmap, cinfo->regs[desc->req_idx], desc->req_mask);  in mt6359_auxadc_sample_adc_val()
661 	fsleep(desc->num_samples * AUXADC_AVG_TIME_US);  in mt6359_auxadc_sample_adc_val()
663 	reg = cinfo->regs[PMIC_AUXADC_ADC0] + (chan->address << 1);  in mt6359_auxadc_sample_adc_val()
667 	 * Even though for both PWRAP and SPMI cases the ADC HW signals that  in mt6359_auxadc_sample_adc_val()
670 	 * on the ADC(x)_H register (high bits) and the rdy_mask needs to be  in mt6359_auxadc_sample_adc_val()
673 	if (cinfo->is_spmi) {  in mt6359_auxadc_sample_adc_val()
681 		dev_dbg(adc_dev->dev, "ADC read timeout for chan %lu\n", chan->address);  in mt6359_auxadc_sample_adc_val()
685 	if (cinfo->is_spmi) {  in mt6359_auxadc_sample_adc_val()
686 		ret = regmap_read(regmap, reg - 1, &lval);  in mt6359_auxadc_sample_adc_val()
698 				  const struct iio_chan_spec *chan, int *out)  in mt6359_auxadc_read_adc()  argument
700 	const struct mtk_pmic_auxadc_info *cinfo = adc_dev->chip_info;  in mt6359_auxadc_read_adc()
701 	const struct mtk_pmic_auxadc_chan *desc = &cinfo->desc[chan->scan_index];  in mt6359_auxadc_read_adc()
702 	struct regmap *regmap = adc_dev->regmap;  in mt6359_auxadc_read_adc()
707 	if (desc->ext_sel_idx >= 0) {  in mt6359_auxadc_read_adc()
708 		ext_sel = FIELD_PREP(MT6363_EXT_PURES_MASK, desc->ext_sel_pu);  in mt6359_auxadc_read_adc()
709 		ext_sel |= FIELD_PREP(MT6363_EXT_CHAN_MASK, desc->ext_sel_ch);  in mt6359_auxadc_read_adc()
711 		ret = regmap_update_bits(regmap, cinfo->regs[desc->ext_sel_idx],  in mt6359_auxadc_read_adc()
720 	 * value is good regardless of if the ADC could be stopped.  in mt6359_auxadc_read_adc()
722 	 * Note that if the ADC cannot be stopped but sampling was ok, this  in mt6359_auxadc_read_adc()
724 	 * status: this is not critical, as the ADC may auto recover and auto  in mt6359_auxadc_read_adc()
726 	 * read attempt will return -ETIMEDOUT and, for models that support it,  in mt6359_auxadc_read_adc()
729 	ret = mt6359_auxadc_sample_adc_val(adc_dev, chan, &val);  in mt6359_auxadc_read_adc()
731 	adc_stop_err = regmap_write(regmap, cinfo->regs[desc->req_idx], 0);  in mt6359_auxadc_read_adc()
733 		dev_warn(adc_dev->dev, "Could not stop the ADC: %d\n,", adc_stop_err);  in mt6359_auxadc_read_adc()
734 		adc_dev->timed_out = true;  in mt6359_auxadc_read_adc()
741 	/* ...and deactivate the ADC GPIO if previously done */  in mt6359_auxadc_read_adc()
742 	if (desc->ext_sel_idx >= 0) {  in mt6359_auxadc_read_adc()
745 		ret = regmap_update_bits(regmap, cinfo->regs[desc->ext_sel_idx],  in mt6359_auxadc_read_adc()
751 	/* Everything went fine, give back the ADC reading */  in mt6359_auxadc_read_adc()
752 	*out = val & GENMASK(chan->scan_type.realbits - 1, 0);  in mt6359_auxadc_read_adc()
757 				    const struct iio_chan_spec *chan, char *label)  in mt6359_auxadc_read_label()  argument
759 	return sysfs_emit(label, "%s\n", chan->datasheet_name);  in mt6359_auxadc_read_label()
763 				  const struct iio_chan_spec *chan,  in mt6359_auxadc_read_raw()  argument
767 	const struct mtk_pmic_auxadc_info *cinfo = adc_dev->chip_info;  in mt6359_auxadc_read_raw()
768 	const struct mtk_pmic_auxadc_chan *desc = &cinfo->desc[chan->scan_index];  in mt6359_auxadc_read_raw()
772 		*val = desc->r_ratio.numerator * cinfo->vref_mV;  in mt6359_auxadc_read_raw()
774 		if (desc->r_ratio.denominator > 1) {  in mt6359_auxadc_read_raw()
775 			*val2 = desc->r_ratio.denominator;  in mt6359_auxadc_read_raw()
782 	scoped_guard(mutex, &adc_dev->lock) {  in mt6359_auxadc_read_raw()
783 		switch (chan->scan_index) {  in mt6359_auxadc_read_raw()
785 			if (!adc_dev->chip_info->read_imp)  in mt6359_auxadc_read_raw()
786 				return -EOPNOTSUPP;  in mt6359_auxadc_read_raw()
788 			ret = adc_dev->chip_info->read_imp(adc_dev, chan, NULL, val);  in mt6359_auxadc_read_raw()
791 			if (!adc_dev->chip_info->read_imp)  in mt6359_auxadc_read_raw()
792 				return -EOPNOTSUPP;  in mt6359_auxadc_read_raw()
794 			ret = adc_dev->chip_info->read_imp(adc_dev, chan, val, NULL);  in mt6359_auxadc_read_raw()
797 			ret = mt6359_auxadc_read_adc(adc_dev, chan, val);  in mt6359_auxadc_read_raw()
807 		if (ret == -ETIMEDOUT) {  in mt6359_auxadc_read_raw()
808 			if (adc_dev->timed_out) {  in mt6359_auxadc_read_raw()
809 				dev_warn(adc_dev->dev, "Resetting stuck ADC!\r\n");  in mt6359_auxadc_read_raw()
812 			adc_dev->timed_out = true;  in mt6359_auxadc_read_raw()
816 	adc_dev->timed_out = false;  in mt6359_auxadc_read_raw()
829 	struct device *dev = &pdev->dev;  in mt6359_auxadc_probe()
830 	struct device *mfd_dev = dev->parent;  in mt6359_auxadc_probe()
839 		return -EINVAL;  in mt6359_auxadc_probe()
845 	 * this driver: this_device->parent(mfd).  in mt6359_auxadc_probe()
848 	 * parent of the MT6397 MFD: this_device->parent(mfd)->parent(pwrap)  in mt6359_auxadc_probe()
850 	if (chip_info->is_spmi)  in mt6359_auxadc_probe()
853 		regmap_dev = mfd_dev->parent;  in mt6359_auxadc_probe()
859 		return dev_err_probe(dev, -ENODEV, "Failed to get regmap\n");  in mt6359_auxadc_probe()
863 		return -ENOMEM;  in mt6359_auxadc_probe()
866 	adc_dev->regmap = regmap;  in mt6359_auxadc_probe()
867 	adc_dev->dev = dev;  in mt6359_auxadc_probe()
868 	adc_dev->chip_info = chip_info;  in mt6359_auxadc_probe()
870 	mutex_init(&adc_dev->lock);  in mt6359_auxadc_probe()
874 	indio_dev->name = adc_dev->chip_info->model_name;  in mt6359_auxadc_probe()
875 	indio_dev->info = &mt6359_auxadc_iio_info;  in mt6359_auxadc_probe()
876 	indio_dev->modes = INDIO_DIRECT_MODE;  in mt6359_auxadc_probe()
877 	indio_dev->channels = adc_dev->chip_info->channels;  in mt6359_auxadc_probe()
878 	indio_dev->num_channels = adc_dev->chip_info->num_channels;  in mt6359_auxadc_probe()
888 	{ .compatible = "mediatek,mt6357-auxadc", .data = &mt6357_chip_info },
889 	{ .compatible = "mediatek,mt6358-auxadc", .data = &mt6358_chip_info },
890 	{ .compatible = "mediatek,mt6359-auxadc", .data = &mt6359_chip_info },
891 	{ .compatible = "mediatek,mt6363-auxadc", .data = &mt6363_chip_info },
892 	{ .compatible = "mediatek,mt6373-auxadc", .data = &mt6373_chip_info },
899 		.name = "mt6359-auxadc",