Lines Matching +full:adc +full:- +full:dev
1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Microchip MCP3911, Two-channel Analog Front End
110 int (*config)(struct mcp3911 *adc, bool external_vref);
111 int (*get_osr)(struct mcp3911 *adc, u32 *val);
112 int (*set_osr)(struct mcp3911 *adc, u32 val);
113 int (*enable_offset)(struct mcp3911 *adc, bool enable);
114 int (*get_offset)(struct mcp3911 *adc, int channel, int *val);
115 int (*set_offset)(struct mcp3911 *adc, int channel, int val);
116 int (*set_scale)(struct mcp3911 *adc, int channel, u32 val);
117 int (*get_raw)(struct mcp3911 *adc, int channel, int *val);
137 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) in mcp3911_read() argument
141 reg = MCP3911_REG_READ(reg, adc->dev_addr); in mcp3911_read()
142 ret = spi_write_then_read(adc->spi, ®, 1, val, len); in mcp3911_read()
147 *val >>= ((4 - len) * 8); in mcp3911_read()
148 dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%lx\n", *val, in mcp3911_read()
153 static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len) in mcp3911_write() argument
155 dev_dbg(&adc->spi->dev, "writing 0x%x to register 0x%x\n", val, reg); in mcp3911_write()
157 val <<= (3 - len) * 8; in mcp3911_write()
159 val |= MCP3911_REG_WRITE(reg, adc->dev_addr); in mcp3911_write()
161 return spi_write(adc->spi, &val, len + 1); in mcp3911_write()
164 static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, u32 val, u8 len) in mcp3911_update() argument
169 ret = mcp3911_read(adc, reg, &tmp, len); in mcp3911_update()
175 return mcp3911_write(adc, reg, val, len); in mcp3911_update()
178 static int mcp3911_read_s24(struct mcp3911 *const adc, u8 const reg, s32 *const val) in mcp3911_read_s24() argument
181 int const ret = mcp3911_read(adc, reg, &uval, 3); in mcp3911_read_s24()
190 static int mcp3910_enable_offset(struct mcp3911 *adc, bool enable) in mcp3910_enable_offset() argument
195 return mcp3911_update(adc, MCP3910_REG_CONFIG0, mask, value, 3); in mcp3910_enable_offset()
198 static int mcp3910_get_offset(struct mcp3911 *adc, int channel, int *val) in mcp3910_get_offset() argument
200 return mcp3911_read(adc, MCP3910_OFFCAL(channel), val, 3); in mcp3910_get_offset()
203 static int mcp3910_set_offset(struct mcp3911 *adc, int channel, int val) in mcp3910_set_offset() argument
207 ret = mcp3911_write(adc, MCP3910_OFFCAL(channel), val, 3); in mcp3910_set_offset()
211 return adc->chip->enable_offset(adc, 1); in mcp3910_set_offset()
214 static int mcp3910_get_raw(struct mcp3911 *adc, int channel, s32 *val) in mcp3910_get_raw() argument
216 return mcp3911_read_s24(adc, MCP3910_CHANNEL(channel), val); in mcp3910_get_raw()
219 static int mcp3911_enable_offset(struct mcp3911 *adc, bool enable) in mcp3911_enable_offset() argument
224 return mcp3911_update(adc, MCP3911_REG_STATUSCOM, mask, value, 2); in mcp3911_enable_offset()
227 static int mcp3911_get_offset(struct mcp3911 *adc, int channel, int *val) in mcp3911_get_offset() argument
229 return mcp3911_read(adc, MCP3911_OFFCAL(channel), val, 3); in mcp3911_get_offset()
232 static int mcp3911_set_offset(struct mcp3911 *adc, int channel, int val) in mcp3911_set_offset() argument
236 ret = mcp3911_write(adc, MCP3911_OFFCAL(channel), val, 3); in mcp3911_set_offset()
240 return adc->chip->enable_offset(adc, 1); in mcp3911_set_offset()
243 static int mcp3911_get_raw(struct mcp3911 *adc, int channel, s32 *val) in mcp3911_get_raw() argument
245 return mcp3911_read_s24(adc, MCP3911_CHANNEL(channel), val); in mcp3911_get_raw()
248 static int mcp3910_get_osr(struct mcp3911 *adc, u32 *val) in mcp3910_get_osr() argument
253 ret = mcp3911_read(adc, MCP3910_REG_CONFIG0, val, 3); in mcp3910_get_osr()
262 static int mcp3910_set_osr(struct mcp3911 *adc, u32 val) in mcp3910_set_osr() argument
267 return mcp3911_update(adc, MCP3910_REG_CONFIG0, mask, osr, 3); in mcp3910_set_osr()
270 static int mcp3911_set_osr(struct mcp3911 *adc, u32 val) in mcp3911_set_osr() argument
275 return mcp3911_update(adc, MCP3911_REG_CONFIG, mask, osr, 2); in mcp3911_set_osr()
278 static int mcp3911_get_osr(struct mcp3911 *adc, u32 *val) in mcp3911_get_osr() argument
283 ret = mcp3911_read(adc, MCP3911_REG_CONFIG, val, 2); in mcp3911_get_osr()
292 static int mcp3910_set_scale(struct mcp3911 *adc, int channel, u32 val) in mcp3910_set_scale() argument
294 return mcp3911_update(adc, MCP3910_REG_GAIN, in mcp3910_set_scale()
299 static int mcp3911_set_scale(struct mcp3911 *adc, int channel, u32 val) in mcp3911_set_scale() argument
301 return mcp3911_update(adc, MCP3911_REG_GAIN, in mcp3911_set_scale()
337 return -EINVAL; in mcp3911_read_avail()
345 struct mcp3911 *adc = iio_priv(indio_dev); in mcp3911_read_raw() local
348 guard(mutex)(&adc->lock); in mcp3911_read_raw()
351 ret = adc->chip->get_raw(adc, channel->channel, val); in mcp3911_read_raw()
356 ret = adc->chip->get_offset(adc, channel->channel, val); in mcp3911_read_raw()
362 ret = adc->chip->get_osr(adc, val); in mcp3911_read_raw()
368 *val = mcp3911_scale_table[ilog2(adc->gain[channel->channel])][0]; in mcp3911_read_raw()
369 *val2 = mcp3911_scale_table[ilog2(adc->gain[channel->channel])][1]; in mcp3911_read_raw()
372 return -EINVAL; in mcp3911_read_raw()
380 struct mcp3911 *adc = iio_priv(indio_dev); in mcp3911_write_raw() local
382 guard(mutex)(&adc->lock); in mcp3911_write_raw()
389 adc->gain[channel->channel] = BIT(i); in mcp3911_write_raw()
390 return adc->chip->set_scale(adc, channel->channel, i); in mcp3911_write_raw()
393 return -EINVAL; in mcp3911_write_raw()
396 return -EINVAL; in mcp3911_write_raw()
398 return adc->chip->set_offset(adc, channel->channel, val); in mcp3911_write_raw()
402 return adc->chip->set_osr(adc, i); in mcp3911_write_raw()
405 return -EINVAL; in mcp3911_write_raw()
407 return -EINVAL; in mcp3911_write_raw()
417 * For 24-bit Conversion in mcp3911_calc_scale_table()
513 struct iio_dev *indio_dev = pf->indio_dev; in mcp3911_trigger_handler()
514 struct mcp3911 *adc = iio_priv(indio_dev); in mcp3911_trigger_handler() local
515 struct device *dev = &adc->spi->dev; in mcp3911_trigger_handler() local
518 .tx_buf = &adc->tx_buf, in mcp3911_trigger_handler()
521 .rx_buf = adc->rx_buf, in mcp3911_trigger_handler()
522 .len = (adc->chip->num_channels - 1) * 3, in mcp3911_trigger_handler()
529 guard(mutex)(&adc->lock); in mcp3911_trigger_handler()
530 adc->tx_buf = MCP3911_REG_READ(MCP3911_CHANNEL(0), adc->dev_addr); in mcp3911_trigger_handler()
531 ret = spi_sync_transfer(adc->spi, xfer, ARRAY_SIZE(xfer)); in mcp3911_trigger_handler()
533 dev_warn(dev, "failed to get conversion data\n"); in mcp3911_trigger_handler()
538 const struct iio_chan_spec *scan_chan = &indio_dev->channels[scan_index]; in mcp3911_trigger_handler()
540 adc->scan.channels[i] = get_unaligned_be24(&adc->rx_buf[scan_chan->channel * 3]); in mcp3911_trigger_handler()
543 iio_push_to_buffers_with_ts(indio_dev, &adc->scan, sizeof(adc->scan), in mcp3911_trigger_handler()
546 iio_trigger_notify_done(indio_dev->trig); in mcp3911_trigger_handler()
558 static int mcp3911_config(struct mcp3911 *adc, bool external_vref) in mcp3911_config() argument
560 struct device *dev = &adc->spi->dev; in mcp3911_config() local
564 ret = mcp3911_read(adc, MCP3911_REG_CONFIG, ®val, 2); in mcp3911_config()
570 dev_dbg(dev, "use external voltage reference\n"); in mcp3911_config()
573 dev_dbg(dev, "use internal voltage reference (1.2V)\n"); in mcp3911_config()
578 if (adc->clki) { in mcp3911_config()
579 dev_dbg(dev, "use external clock as clocksource\n"); in mcp3911_config()
582 dev_dbg(dev, "use crystal oscillator as clocksource\n"); in mcp3911_config()
586 ret = mcp3911_write(adc, MCP3911_REG_CONFIG, regval, 2); in mcp3911_config()
590 ret = mcp3911_read(adc, MCP3911_REG_STATUSCOM, ®val, 2); in mcp3911_config()
599 if (device_property_read_bool(dev, "microchip,data-ready-hiz")) in mcp3911_config()
607 ret = mcp3911_write(adc, MCP3911_REG_STATUSCOM, regval, 2); in mcp3911_config()
612 ret = mcp3911_read(adc, MCP3911_REG_GAIN, ®val, 1); in mcp3911_config()
616 for (int i = 0; i < adc->chip->num_channels - 1; i++) { in mcp3911_config()
617 adc->gain[i] = 1; in mcp3911_config()
621 return mcp3911_write(adc, MCP3911_REG_GAIN, regval, 1); in mcp3911_config()
624 static int mcp3910_config(struct mcp3911 *adc, bool external_vref) in mcp3910_config() argument
626 struct device *dev = &adc->spi->dev; in mcp3910_config() local
630 ret = mcp3911_read(adc, MCP3910_REG_CONFIG1, ®val, 3); in mcp3910_config()
636 dev_dbg(dev, "use external voltage reference\n"); in mcp3910_config()
639 dev_dbg(dev, "use internal voltage reference (1.2V)\n"); in mcp3910_config()
644 if (adc->clki) { in mcp3910_config()
645 dev_dbg(dev, "use external clock as clocksource\n"); in mcp3910_config()
648 dev_dbg(dev, "use crystal oscillator as clocksource\n"); in mcp3910_config()
652 ret = mcp3911_write(adc, MCP3910_REG_CONFIG1, regval, 3); in mcp3910_config()
656 ret = mcp3911_read(adc, MCP3910_REG_STATUSCOM, ®val, 3); in mcp3910_config()
665 if (device_property_read_bool(dev, "microchip,data-ready-hiz")) in mcp3910_config()
670 ret = mcp3911_write(adc, MCP3910_REG_STATUSCOM, regval, 3); in mcp3910_config()
675 ret = mcp3911_read(adc, MCP3910_REG_GAIN, ®val, 3); in mcp3910_config()
679 for (int i = 0; i < adc->chip->num_channels - 1; i++) { in mcp3910_config()
680 adc->gain[i] = 1; in mcp3910_config()
683 ret = mcp3911_write(adc, MCP3910_REG_GAIN, regval, 3); in mcp3910_config()
688 return adc->chip->enable_offset(adc, 0); in mcp3910_config()
693 struct mcp3911 *adc = iio_trigger_get_drvdata(trig); in mcp3911_set_trigger_state() local
696 enable_irq(adc->spi->irq); in mcp3911_set_trigger_state()
698 disable_irq(adc->spi->irq); in mcp3911_set_trigger_state()
710 struct device *dev = &spi->dev; in mcp3911_probe() local
713 struct mcp3911 *adc; in mcp3911_probe() local
718 indio_dev = devm_iio_device_alloc(dev, sizeof(*adc)); in mcp3911_probe()
720 return -ENOMEM; in mcp3911_probe()
722 adc = iio_priv(indio_dev); in mcp3911_probe()
723 adc->spi = spi; in mcp3911_probe()
724 adc->chip = spi_get_device_match_data(spi); in mcp3911_probe()
726 ret = devm_regulator_get_enable_read_voltage(dev, "vref"); in mcp3911_probe()
727 if (ret < 0 && ret != -ENODEV) in mcp3911_probe()
728 return dev_err_probe(dev, ret, "failed to get vref voltage\n"); in mcp3911_probe()
730 external_vref = ret != -ENODEV; in mcp3911_probe()
733 adc->clki = devm_clk_get_enabled(dev, NULL); in mcp3911_probe()
734 if (IS_ERR(adc->clki)) { in mcp3911_probe()
735 if (PTR_ERR(adc->clki) == -ENOENT) { in mcp3911_probe()
736 adc->clki = NULL; in mcp3911_probe()
738 return dev_err_probe(dev, PTR_ERR(adc->clki), "failed to get adc clk\n"); in mcp3911_probe()
743 * Fallback to "device-addr" due to historical mismatch between in mcp3911_probe()
744 * dt-bindings and implementation. in mcp3911_probe()
746 ret = device_property_read_u32(dev, "microchip,device-addr", &adc->dev_addr); in mcp3911_probe()
748 device_property_read_u32(dev, "device-addr", &adc->dev_addr); in mcp3911_probe()
749 if (adc->dev_addr > 3) { in mcp3911_probe()
750 return dev_err_probe(dev, -EINVAL, in mcp3911_probe()
751 "invalid device address (%i). Must be in range 0-3.\n", in mcp3911_probe()
752 adc->dev_addr); in mcp3911_probe()
754 dev_dbg(dev, "use device address %i\n", adc->dev_addr); in mcp3911_probe()
756 gpio_reset = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_HIGH); in mcp3911_probe()
758 return dev_err_probe(dev, PTR_ERR(gpio_reset), in mcp3911_probe()
766 * 330 micro-seconds are too few; 470 micro-seconds are sufficient. in mcp3911_probe()
772 ret = adc->chip->config(adc, external_vref); in mcp3911_probe()
781 for (int i = 0; i < adc->chip->num_channels - 1; i++) { in mcp3911_probe()
782 adc->gain[i] = 1; in mcp3911_probe()
783 ret = mcp3911_update(adc, MCP3911_REG_GAIN, in mcp3911_probe()
790 indio_dev->name = spi_get_device_id(spi)->name; in mcp3911_probe()
791 indio_dev->modes = INDIO_DIRECT_MODE; in mcp3911_probe()
792 indio_dev->info = &mcp3911_info; in mcp3911_probe()
795 indio_dev->channels = adc->chip->channels; in mcp3911_probe()
796 indio_dev->num_channels = adc->chip->num_channels; in mcp3911_probe()
798 mutex_init(&adc->lock); in mcp3911_probe()
800 if (spi->irq > 0) { in mcp3911_probe()
801 adc->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name, in mcp3911_probe()
803 if (!adc->trig) in mcp3911_probe()
804 return -ENOMEM; in mcp3911_probe()
806 adc->trig->ops = &mcp3911_trigger_ops; in mcp3911_probe()
807 iio_trigger_set_drvdata(adc->trig, adc); in mcp3911_probe()
808 ret = devm_iio_trigger_register(dev, adc->trig); in mcp3911_probe()
817 ret = devm_request_irq(dev, spi->irq, &iio_trigger_generic_data_rdy_poll, in mcp3911_probe()
819 indio_dev->name, adc->trig); in mcp3911_probe()
824 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL, in mcp3911_probe()
829 return devm_iio_device_register(dev, indio_dev); in mcp3911_probe()