1 // SPDX-License-Identifier: GPL-2.0-only
4   * Copyright (C) 2008-2010 Jonathan Cameron
7   * Copyright (C) 2002-2004 Stefan Eletzhofer
53 /* think about including max11600 etc - more settings */
60 /* max1363 only - though don't care on others.
81 /* max123{6-9} only */
84 /* max1363 only - merely part of channel selects or don't care for others */
89 /* max1363 strictly 0x06 - but doesn't matter */
96  * struct max1363_mode - scan mode information
124  * struct max1363_chip_info - chip specifc information
132  * @bits:		accuracy of the adc in bits
142 	u8				bits;  member
146  * struct max1363_state - driver instance specific data
253 	MAX1363_MODE_SINGLE(10, 1 << 10),
261 	MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17),
267 	MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23),
283 	MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10, 0x7C0),
284 	MAX1363_MODE_SCAN_TO_CHANNEL(10, 0x7FF),
293 	MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(10, 3, 0x038000),
294 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(10, 6, 0x3F000),
310 		for (i = 0; i < ci->num_modes; i++)  in max1363_match_mode()
312 					  max1363_mode_table[ci->mode_list[i]].  in max1363_match_mode()
315 				return &max1363_mode_table[ci->mode_list[i]];  in max1363_match_mode()
347 	u8 tx_buf[2] = { st->setupbyte, st->configbyte };  in max1363_write_basic_config()
349 	return st->send(st->client, tx_buf, 2);  in max1363_write_basic_config()
354 	st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK  in max1363_set_scan_mode()
357 	st->configbyte |= st->current_mode->conf;  in max1363_set_scan_mode()
370 	struct i2c_client *client = st->client;  in max1363_read_single_chan()
372 	guard(mutex)(&st->lock);  in max1363_read_single_chan()
381 	if (st->monitor_on)  in max1363_read_single_chan()
382 		return -EBUSY;  in max1363_read_single_chan()
385 	if (st->current_mode != &max1363_mode_table[chan->address]) {  in max1363_read_single_chan()
389 		st->current_mode = &max1363_mode_table[chan->address];  in max1363_read_single_chan()
394 	if (st->chip_info->bits != 8) {  in max1363_read_single_chan()
396 		data = st->recv(client, rxbuf, 2);  in max1363_read_single_chan()
401 			((1 << st->chip_info->bits) - 1);  in max1363_read_single_chan()
404 		data = st->recv(client, rxbuf, 1);  in max1363_read_single_chan()
427 			return -EBUSY;  in max1363_read_raw()
435 		*val = st->vref_uv / 1000;  in max1363_read_raw()
436 		*val2 = st->chip_info->bits;  in max1363_read_raw()
439 		return -EINVAL;  in max1363_read_raw()
466 #define MAX1363_CHAN_U(num, addr, si, bits, ev_spec, num_ev_spec)	\  argument
477 			.realbits = bits,				\
478 			.storagebits = (bits > 8) ? 16 : 8,		\
487 #define MAX1363_CHAN_B(num, num2, addr, si, bits, ev_spec, num_ev_spec)	\  argument
497 		.datasheet_name = "AIN"#num"-AIN"#num2,			\
500 			.realbits = bits,				\
501 			.storagebits = (bits > 8) ? 16 : 8,		\
509 #define MAX1363_4X_CHANS(bits, ev_spec, num_ev_spec) {			\  argument
510 	MAX1363_CHAN_U(0, _s0, 0, bits, ev_spec, num_ev_spec),		\
511 	MAX1363_CHAN_U(1, _s1, 1, bits, ev_spec, num_ev_spec),		\
512 	MAX1363_CHAN_U(2, _s2, 2, bits, ev_spec, num_ev_spec),		\
513 	MAX1363_CHAN_U(3, _s3, 3, bits, ev_spec, num_ev_spec),		\
514 	MAX1363_CHAN_B(0, 1, d0m1, 12, bits, ev_spec, num_ev_spec),	\
515 	MAX1363_CHAN_B(2, 3, d2m3, 13, bits, ev_spec, num_ev_spec),	\
516 	MAX1363_CHAN_B(1, 0, d1m0, 18, bits, ev_spec, num_ev_spec),	\
517 	MAX1363_CHAN_B(3, 2, d3m2, 19, bits, ev_spec, num_ev_spec),	\
524 	MAX1363_4X_CHANS(10, NULL, 0);
528 	MAX1363_4X_CHANS(10, max1363_events, ARRAY_SIZE(max1363_events));
554 #define MAX1363_12X_CHANS(bits) {				\  argument
555 	MAX1363_CHAN_U(0, _s0, 0, bits, NULL, 0),		\
556 	MAX1363_CHAN_U(1, _s1, 1, bits, NULL, 0),		\
557 	MAX1363_CHAN_U(2, _s2, 2, bits, NULL, 0),		\
558 	MAX1363_CHAN_U(3, _s3, 3, bits, NULL, 0),		\
559 	MAX1363_CHAN_U(4, _s4, 4, bits, NULL, 0),		\
560 	MAX1363_CHAN_U(5, _s5, 5, bits, NULL, 0),		\
561 	MAX1363_CHAN_U(6, _s6, 6, bits, NULL, 0),		\
562 	MAX1363_CHAN_U(7, _s7, 7, bits, NULL, 0),		\
563 	MAX1363_CHAN_U(8, _s8, 8, bits, NULL, 0),		\
564 	MAX1363_CHAN_U(9, _s9, 9, bits, NULL, 0),		\
565 	MAX1363_CHAN_U(10, _s10, 10, bits, NULL, 0),		\
566 	MAX1363_CHAN_U(11, _s11, 11, bits, NULL, 0),		\
567 	MAX1363_CHAN_B(0, 1, d0m1, 12, bits, NULL, 0),		\
568 	MAX1363_CHAN_B(2, 3, d2m3, 13, bits, NULL, 0),		\
569 	MAX1363_CHAN_B(4, 5, d4m5, 14, bits, NULL, 0),		\
570 	MAX1363_CHAN_B(6, 7, d6m7, 15, bits, NULL, 0),		\
571 	MAX1363_CHAN_B(8, 9, d8m9, 16, bits, NULL, 0),		\
572 	MAX1363_CHAN_B(10, 11, d10m11, 17, bits, NULL, 0),	\
573 	MAX1363_CHAN_B(1, 0, d1m0, 18, bits, NULL, 0),		\
574 	MAX1363_CHAN_B(3, 2, d3m2, 19, bits, NULL, 0),		\
575 	MAX1363_CHAN_B(5, 4, d5m4, 20, bits, NULL, 0),		\
576 	MAX1363_CHAN_B(7, 6, d7m6, 21, bits, NULL, 0),		\
577 	MAX1363_CHAN_B(9, 8, d9m8, 22, bits, NULL, 0),		\
578 	MAX1363_CHAN_B(11, 10, d11m10, 23, bits, NULL, 0),	\
582 static const struct iio_chan_spec max1138_channels[] = MAX1363_12X_CHANS(10);
602 #define MAX1363_8X_CHANS(bits) {			\  argument
603 	MAX1363_CHAN_U(0, _s0, 0, bits, NULL, 0),	\
604 	MAX1363_CHAN_U(1, _s1, 1, bits, NULL, 0),	\
605 	MAX1363_CHAN_U(2, _s2, 2, bits, NULL, 0),	\
606 	MAX1363_CHAN_U(3, _s3, 3, bits, NULL, 0),	\
607 	MAX1363_CHAN_U(4, _s4, 4, bits, NULL, 0),	\
608 	MAX1363_CHAN_U(5, _s5, 5, bits, NULL, 0),	\
609 	MAX1363_CHAN_U(6, _s6, 6, bits, NULL, 0),	\
610 	MAX1363_CHAN_U(7, _s7, 7, bits, NULL, 0),	\
611 	MAX1363_CHAN_B(0, 1, d0m1, 12, bits, NULL, 0),	\
612 	MAX1363_CHAN_B(2, 3, d2m3, 13, bits, NULL, 0),	\
613 	MAX1363_CHAN_B(4, 5, d4m5, 14, bits, NULL, 0),	\
614 	MAX1363_CHAN_B(6, 7, d6m7, 15, bits, NULL, 0),	\
615 	MAX1363_CHAN_B(1, 0, d1m0, 18, bits, NULL, 0),	\
616 	MAX1363_CHAN_B(3, 2, d3m2, 19, bits, NULL, 0),	\
617 	MAX1363_CHAN_B(5, 4, d5m4, 20, bits, NULL, 0),	\
618 	MAX1363_CHAN_B(7, 6, d7m6, 21, bits, NULL, 0),	\
622 static const struct iio_chan_spec max11608_channels[] = MAX1363_8X_CHANS(10);
629 #define MAX1363_2X_CHANS(bits) {			\  argument
630 	MAX1363_CHAN_U(0, _s0, 0, bits, NULL, 0),	\
631 	MAX1363_CHAN_U(1, _s1, 1, bits, NULL, 0),	\
632 	MAX1363_CHAN_B(0, 1, d0m1, 2, bits, NULL, 0),	\
633 	MAX1363_CHAN_B(1, 0, d1m0, 3, bits, NULL, 0),	\
637 static const struct iio_chan_spec max11646_channels[] = MAX1363_2X_CHANS(10);
688 	return sprintf(buf, "%d\n", max1363_monitor_speeds[st->monitor_speed]);  in max1363_monitor_show_freq()
702 	ret = kstrtoul(buf, 10, &val);  in max1363_monitor_store_freq()
704 		return -EINVAL;  in max1363_monitor_store_freq()
711 		return -EINVAL;  in max1363_monitor_store_freq()
713 	scoped_guard(mutex, &st->lock)  in max1363_monitor_store_freq()
714 		st->monitor_speed = i;  in max1363_monitor_store_freq()
733 		*val = st->thresh_low[chan->channel];  in max1363_read_thresh()
735 		*val = st->thresh_high[chan->channel];  in max1363_read_thresh()
746 	switch (st->chip_info->bits) {  in max1363_write_thresh()
747 	case 10:  in max1363_write_thresh()
749 			return -EINVAL;  in max1363_write_thresh()
753 			return -EINVAL;  in max1363_write_thresh()
759 		st->thresh_low[chan->channel] = val;  in max1363_write_thresh()
762 		st->thresh_high[chan->channel] = val;  in max1363_write_thresh()
765 		return -EINVAL;  in max1363_write_thresh()
797 	u8 tx[2] = { st->setupbyte,  in max1363_event_handler()
798 		     MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0 };  in max1363_event_handler()
800 	st->recv(st->client, &rx, 1);  in max1363_event_handler()
804 	st->send(st->client, tx, 2);  in max1363_event_handler()
815 	int number = chan->channel;  in max1363_read_event_config()
817 	guard(mutex)(&st->lock);  in max1363_read_event_config()
819 		val = (1 << number) & st->mask_low;  in max1363_read_event_config()
821 		val = (1 << number) & st->mask_high;  in max1363_read_event_config()
835 		st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP;  in max1363_monitor_mode_update()
836 		st->configbyte &= ~MAX1363_SCAN_MASK;  in max1363_monitor_mode_update()
837 		st->monitor_on = false;  in max1363_monitor_mode_update()
842 	st->setupbyte |= MAX1363_SETUP_MONITOR_SETUP;  in max1363_monitor_mode_update()
843 	st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK  in max1363_monitor_mode_update()
846 	st->configbyte |= MAX1363_CONFIG_SCAN_MONITOR_MODE;  in max1363_monitor_mode_update()
847 	if ((st->mask_low | st->mask_high) & 0x0F) {  in max1363_monitor_mode_update()
848 		st->configbyte |= max1363_mode_table[s0to3].conf;  in max1363_monitor_mode_update()
850 	} else if ((st->mask_low | st->mask_high) & 0x30) {  in max1363_monitor_mode_update()
851 		st->configbyte |= max1363_mode_table[d0m1to2m3].conf;  in max1363_monitor_mode_update()
854 		st->configbyte |= max1363_mode_table[d1m0to3m2].conf;  in max1363_monitor_mode_update()
861 		return -ENOMEM;  in max1363_monitor_mode_update()
863 	tx_buf[0] = st->configbyte;  in max1363_monitor_mode_update()
864 	tx_buf[1] = st->setupbyte;  in max1363_monitor_mode_update()
865 	tx_buf[2] = (st->monitor_speed << 1);  in max1363_monitor_mode_update()
874 			if (st->mask_low & (1 << j)) {  in max1363_monitor_mode_update()
875 				tx_buf[i] = (st->thresh_low[j] >> 4) & 0xFF;  in max1363_monitor_mode_update()
876 				tx_buf[i + 1] = (st->thresh_low[j] << 4) & 0xF0;  in max1363_monitor_mode_update()
884 			if (st->mask_high & (1 << j)) {  in max1363_monitor_mode_update()
886 					(st->thresh_high[j] >> 8) & 0x0F;  in max1363_monitor_mode_update()
887 				tx_buf[i + 2] = st->thresh_high[j] & 0xFF;  in max1363_monitor_mode_update()
899 	ret = st->send(st->client, tx_buf, len);  in max1363_monitor_mode_update()
903 		return -EIO;  in max1363_monitor_mode_update()
912 	tx_buf[0] = st->setupbyte;  in max1363_monitor_mode_update()
913 	tx_buf[1] = MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0;  in max1363_monitor_mode_update()
914 	ret = st->send(st->client, tx_buf, 2);  in max1363_monitor_mode_update()
918 		return -EIO;  in max1363_monitor_mode_update()
920 	st->monitor_on = true;  in max1363_monitor_mode_update()
927  * Scan 0...3, 0-1,2-3 and 1-0,3-2
936 			ret = -EBUSY;  in __max1363_check_event_mask()
941 			ret = -EBUSY;  in __max1363_check_event_mask()
945 		ret = -EBUSY;  in __max1363_check_event_mask()
954 	int number = chan->channel;  in __max1363_write_event_config()
958 	guard(mutex)(&st->lock);  in __max1363_write_event_config()
960 	unifiedmask = st->mask_low | st->mask_high;  in __max1363_write_event_config()
964 			st->mask_low &= ~(1 << number);  in __max1363_write_event_config()
970 			st->mask_low |= (1 << number);  in __max1363_write_event_config()
974 			st->mask_high &= ~(1 << number);  in __max1363_write_event_config()
980 			st->mask_high |= (1 << number);  in __max1363_write_event_config()
995 		return -EBUSY;  in max1363_write_event_config()
999 	max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low));  in max1363_write_event_config()
1027 	st->current_mode = max1363_match_mode(scan_mask, st->chip_info);  in max1363_update_scan_mode()
1028 	if (!st->current_mode)  in max1363_update_scan_mode()
1029 		return -EINVAL;  in max1363_update_scan_mode()
1049 /* max1363 and max1368 tested - rest from data sheet */
1052 		.bits = 10,
1062 		.bits = 10,
1072 		.bits = 12,
1082 		.bits = 12,
1092 		.bits = 8,
1102 		.bits = 8,
1112 		.bits = 8,
1122 		.bits = 8,
1132 		.bits = 10,
1142 		.bits = 10,
1152 		.bits = 10,
1162 		.bits = 10,
1172 		.bits = 12,
1182 		.bits = 12,
1192 		.bits = 12,
1202 		.bits = 12,
1212 		.bits = 8,
1222 		.bits = 8,
1232 		.bits = 8,
1242 		.bits = 8,
1252 		.bits = 8,
1262 		.bits = 8,
1272 		.bits = 10,
1282 		.bits = 10,
1292 		.bits = 10,
1302 		.bits = 10,
1312 		.bits = 10,
1322 		.bits = 10,
1332 		.bits = 12,
1342 		.bits = 12,
1352 		.bits = 12,
1362 		.bits = 12,
1372 		.bits = 12,
1382 		.bits = 12,
1392 		.bits = 12,
1402 		.bits = 12,
1412 		.bits = 10,
1422 		.bits = 10,
1435 	st->setupbyte = MAX1363_SETUP_INT_CLOCK  in max1363_initial_setup()
1439 	if (st->vref)  in max1363_initial_setup()
1440 		st->setupbyte |= MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF;  in max1363_initial_setup()
1442 		st->setupbyte |= MAX1363_SETUP_POWER_UP_INT_REF  in max1363_initial_setup()
1446 	st->setupbyte = MAX1363_SETUP_BYTE(st->setupbyte);  in max1363_initial_setup()
1447 	st->current_mode = &max1363_mode_table[st->chip_info->default_mode];  in max1363_initial_setup()
1448 	st->configbyte = MAX1363_CONFIG_BYTE(st->configbyte);  in max1363_initial_setup()
1459 	masks = devm_kzalloc(&indio_dev->dev,  in max1363_alloc_scan_masks()
1462 				    st->chip_info->num_modes + 1),  in max1363_alloc_scan_masks()
1465 		return -ENOMEM;  in max1363_alloc_scan_masks()
1467 	for (i = 0; i < st->chip_info->num_modes; i++)  in max1363_alloc_scan_masks()
1469 			    max1363_mode_table[st->chip_info->mode_list[i]]  in max1363_alloc_scan_masks()
1472 	indio_dev->available_scan_masks = masks;  in max1363_alloc_scan_masks()
1480 	struct iio_dev *indio_dev = pf->indio_dev;  in max1363_trigger_handler()
1483 	unsigned long numvals = bitmap_weight(st->current_mode->modemask,  in max1363_trigger_handler()
1493 	if (st->chip_info->bits != 8)  in max1363_trigger_handler()
1494 		b_sent = st->recv(st->client, st->data.buf, numvals * 2);  in max1363_trigger_handler()
1496 		b_sent = st->recv(st->client, st->data.buf, numvals);  in max1363_trigger_handler()
1500 	iio_push_to_buffers_with_ts(indio_dev, &st->data, sizeof(st->data),  in max1363_trigger_handler()
1504 	iio_trigger_notify_done(indio_dev->trig);  in max1363_trigger_handler()
1564 	indio_dev = devm_iio_device_alloc(&client->dev,  in max1363_probe()
1567 		return -ENOMEM;  in max1363_probe()
1571 	mutex_init(&st->lock);  in max1363_probe()
1572 	ret = devm_regulator_get_enable(&client->dev, "vcc");  in max1363_probe()
1576 	st->chip_info = i2c_get_match_data(client);  in max1363_probe()
1577 	st->client = client;  in max1363_probe()
1579 	ret = devm_regulator_get_enable_read_voltage(&client->dev, "vref");  in max1363_probe()
1580 	if (ret < 0 && ret != -ENODEV)  in max1363_probe()
1584 	st->vref_uv = ret == -ENODEV ? st->chip_info->int_vref_mv * 1000 : ret;  in max1363_probe()
1586 	if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {  in max1363_probe()
1587 		st->send = i2c_master_send;  in max1363_probe()
1588 		st->recv = i2c_master_recv;  in max1363_probe()
1589 	} else if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE)  in max1363_probe()
1590 			&& st->chip_info->bits == 8) {  in max1363_probe()
1591 		st->send = max1363_smbus_send;  in max1363_probe()
1592 		st->recv = max1363_smbus_recv;  in max1363_probe()
1594 		return -EOPNOTSUPP;  in max1363_probe()
1601 	indio_dev->name = id->name;  in max1363_probe()
1602 	indio_dev->channels = st->chip_info->channels;  in max1363_probe()
1603 	indio_dev->num_channels = st->chip_info->num_channels;  in max1363_probe()
1604 	indio_dev->info = st->chip_info->info;  in max1363_probe()
1605 	indio_dev->modes = INDIO_DIRECT_MODE;  in max1363_probe()
1610 	ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev, NULL,  in max1363_probe()
1615 	if (client->irq) {  in max1363_probe()
1616 		ret = devm_request_threaded_irq(&client->dev, st->client->irq,  in max1363_probe()
1627 	return devm_iio_device_register(&client->dev, indio_dev);  in max1363_probe()