1 // SPDX-License-Identifier: GPL-2.0-only
3  * Atmel ADC driver for SAMA5D2 devices and compatible.
14 #include <linux/dma-mapping.h>
31 #include <linux/nvmem-consumer.h>
36 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
110 /* Interrupt Enable Register - TS X measurement ready */
112 /* Interrupt Enable Register - TS Y measurement ready */
114 /* Interrupt Enable Register - TS pressure measurement ready */
116 /* Interrupt Enable Register - Data ready */
118 /* Interrupt Enable Register - general overrun error */
120 /* Interrupt Enable Register - Pen detect */
122 /* Interrupt Enable Register - No pen detect */
139 /* Interrupt Status Register - Pen touching sense status */
149 /* Extended Mode Register - Oversampling rate */
157 /* Extended Mode Register - TRACKX */
164 /* Extended Mode Register - Averaging on single trigger event */
173 /* Channel Offset Register differential offset - constant, not a register */
177 /* Analog Control Register - Pen detect sensitivity mask */
179 /* Analog Control Register - Source last channel */
184 /* Touchscreen Mode Register - No touch mode */
186 /* Touchscreen Mode Register - 4 wire screen, no pressure measurement */
188 /* Touchscreen Mode Register - 4 wire screen, pressure measurement */
190 /* Touchscreen Mode Register - 5 wire screen */
192 /* Touchscreen Mode Register - Average samples mask */
194 /* Touchscreen Mode Register - Average samples */
196 /* Touchscreen Mode Register - Touch/trigger frequency ratio mask */
198 /* Touchscreen Mode Register - Touch/trigger frequency ratio */
200 /* Touchscreen Mode Register - Pen Debounce Time mask */
202 /* Touchscreen Mode Register - Pen Debounce Time */
204 /* Touchscreen Mode Register - No DMA for touch measurements */
206 /* Touchscreen Mode Register - Disable pen detection */
208 /* Touchscreen Mode Register - Enable pen detection */
231 /* Trigger Mode - trigger period mask */
233 /* Trigger Mode - trigger period */
250 /* Temperature Sensor Mode - Temperature sensor on */
372 		.datasheet_name = "CH"#num"-CH"#num2,			\
429 	readl_relaxed((st)->base + (st)->soc_info.platform->layout->reg)
431 	readl_relaxed((st)->base + reg)
433 	writel_relaxed(val, (st)->base + (st)->soc_info.platform->layout->reg)
436  * struct at91_adc_platform - at91-sama5d2 platform information struct
474  * struct at91_adc_temp_sensor_clb - at91-sama5d2 temperature sensor
487  * enum at91_adc_ts_clb_idx - calibration indexes in NVMEM buffer
500 /* Temperature sensor calibration - Vtemp voltage sensitivity to temperature. */
504  * struct at91_adc_soc_info - at91-sama5d2 soc information struct
527  * struct at91_adc_dma - at91-sama5d2 dma information struct
531  * @phys_addr:		physical address of the ADC base register
549  * struct at91_adc_touch - at91-sama5d2 touchscreen information struct
565  * struct at91_adc_temp - at91-sama5d2 temperature information structure
750 	for (i = 0; i < indio_dev->num_channels; i++) {  in at91_adc_chan_xlate()
751 		if (indio_dev->channels[i].scan_index == chan)  in at91_adc_chan_xlate()
754 	return -EINVAL;  in at91_adc_chan_xlate()
764 	return indio_dev->channels + index;  in at91_adc_chan_get()
770 	return at91_adc_chan_xlate(indio_dev, iiospec->args[0]);  in at91_adc_fwnode_xlate()
779 	for_each_set_bit(bit, indio_dev->active_scan_mask,  in at91_adc_active_scan_mask_to_reg()
780 			 indio_dev->num_channels) {  in at91_adc_active_scan_mask_to_reg()
783 		mask |= BIT(chan->channel);  in at91_adc_active_scan_mask_to_reg()
786 	return mask & GENMASK(st->soc_info.platform->nr_channels, 0);  in at91_adc_active_scan_mask_to_reg()
794 	cor = BIT(chan->channel) | BIT(chan->channel2);  in at91_adc_cor()
797 	cor <<= st->soc_info.platform->layout->COR_diff_offset;  in at91_adc_cor()
798 	if (chan->differential)  in at91_adc_cor()
808 	if (st->soc_info.platform->layout->EOC_ISR)  in at91_adc_irq_status()
817 	if (st->soc_info.platform->layout->EOC_IMR)  in at91_adc_irq_mask()
830 	if (!st->soc_info.platform->layout->EOC_IDR)  in at91_adc_eoc_dis()
836 	if (!st->soc_info.platform->layout->EOC_IDR)  in at91_adc_eoc_ena()
847 	unsigned int osr_mask = st->soc_info.platform->osr_mask;  in at91_adc_config_emr()
851 	for (i = 0; i < st->soc_info.platform->oversampling_avail_no; i++) {  in at91_adc_config_emr()
852 		if (oversampling_ratio == st->soc_info.platform->oversampling_avail[i])  in at91_adc_config_emr()
855 	if (i == st->soc_info.platform->oversampling_avail_no)  in at91_adc_config_emr()
856 		return -EINVAL;  in at91_adc_config_emr()
882 	ret = pm_runtime_resume_and_get(st->dev);  in at91_adc_config_emr()
895 	pm_runtime_mark_last_busy(st->dev);  in at91_adc_config_emr()
896 	pm_runtime_put_autosuspend(st->dev);  in at91_adc_config_emr()
898 	st->oversampling_ratio = oversampling_ratio;  in at91_adc_config_emr()
907 	if (st->oversampling_ratio == 1)  in at91_adc_adjust_val_osr()
909 	else if (st->oversampling_ratio == 4)  in at91_adc_adjust_val_osr()
911 	else if (st->oversampling_ratio == 16)  in at91_adc_adjust_val_osr()
913 	else if (st->oversampling_ratio == 64)  in at91_adc_adjust_val_osr()
915 	else if (st->oversampling_ratio == 256)  in at91_adc_adjust_val_osr()
919 		return -EINVAL;  in at91_adc_adjust_val_osr()
923 	 * st->soc_info.platform->chan_realbits, so shift left diff bits.  in at91_adc_adjust_val_osr()
925 	diff = st->soc_info.platform->chan_realbits - nbits;  in at91_adc_adjust_val_osr()
955 	u32 clk_khz = st->current_sample_rate / 1000;  in at91_adc_configure_touch()
961 		ret = pm_runtime_resume_and_get(st->dev);  in at91_adc_configure_touch()
970 		pm_runtime_mark_last_busy(st->dev);  in at91_adc_configure_touch()
971 		pm_runtime_put_autosuspend(st->dev);  in at91_adc_configure_touch()
1005 	st->touch_st.sample_period_val =  in at91_adc_configure_touch()
1007 				 clk_khz / 1000) - 1, 1);  in at91_adc_configure_touch()
1022 	 * max = 2^AT91_SAMA5D2_MAX_POS_BITS - 1  in at91_adc_touch_pos()
1025 	if (reg == st->soc_info.platform->layout->XPOSR)  in at91_adc_touch_pos()
1027 	else if (reg == st->soc_info.platform->layout->YPOSR)  in at91_adc_touch_pos()
1031 		dev_dbg(&st->indio_dev->dev, "pos is 0\n");  in at91_adc_touch_pos()
1034 	result = (pos << AT91_SAMA5D2_MAX_POS_BITS) - pos;  in at91_adc_touch_pos()
1037 		dev_err(&st->indio_dev->dev, "scale is 0\n");  in at91_adc_touch_pos()
1047 	st->touch_st.x_pos = at91_adc_touch_pos(st, st->soc_info.platform->layout->XPOSR);  in at91_adc_touch_x_pos()
1048 	return st->touch_st.x_pos;  in at91_adc_touch_x_pos()
1053 	return at91_adc_touch_pos(st, st->soc_info.platform->layout->YPOSR);  in at91_adc_touch_y_pos()
1070 		pres = rxp * (st->touch_st.x_pos * factor / 1024) *  in at91_adc_touch_pressure()
1071 			(z2 * factor / z1 - factor) /  in at91_adc_touch_pressure()
1081 	return 0xFFFF - pres;  in at91_adc_touch_pressure()
1087 	if (!st->touch_st.touching)  in at91_adc_read_position()
1088 		return -ENODATA;  in at91_adc_read_position()
1089 	if (chan == st->soc_info.platform->touch_chan_x)  in at91_adc_read_position()
1091 	else if (chan == st->soc_info.platform->touch_chan_y)  in at91_adc_read_position()
1094 		return -ENODATA;  in at91_adc_read_position()
1102 	if (!st->touch_st.touching)  in at91_adc_read_pressure()
1103 		return -ENODATA;  in at91_adc_read_pressure()
1104 	if (chan == st->soc_info.platform->touch_chan_p)  in at91_adc_read_pressure()
1107 		return -ENODATA;  in at91_adc_read_pressure()
1121 		status |= st->selected_trig->trgmod_value;  in at91_adc_configure_trigger_registers()
1134 		ret = pm_runtime_resume_and_get(st->dev);  in at91_adc_configure_trigger()
1142 		pm_runtime_mark_last_busy(st->dev);  in at91_adc_configure_trigger()
1143 		pm_runtime_put_autosuspend(st->dev);  in at91_adc_configure_trigger()
1155 	if (st->dma_st.dma_chan)  in at91_adc_reenable_trigger()
1158 	enable_irq(st->irq);  in at91_adc_reenable_trigger()
1176 	status = dmaengine_tx_status(st->dma_st.dma_chan,  in at91_adc_dma_size_done()
1177 				     st->dma_st.dma_chan->cookie,  in at91_adc_dma_size_done()
1183 	i = st->dma_st.rx_buf_sz - state.residue;  in at91_adc_dma_size_done()
1186 	if (i >= st->dma_st.buf_idx)  in at91_adc_dma_size_done()
1187 		size = i - st->dma_st.buf_idx;  in at91_adc_dma_size_done()
1189 		size = st->dma_st.rx_buf_sz + i - st->dma_st.buf_idx;  in at91_adc_dma_size_done()
1197 	iio_trigger_poll_nested(indio_dev->trig);  in at91_dma_buffer_done()
1208 	if (!st->dma_st.dma_chan)  in at91_adc_dma_start()
1212 	st->dma_st.buf_idx = 0;  in at91_adc_dma_start()
1218 	st->dma_st.rx_buf_sz = 0;  in at91_adc_dma_start()
1220 	for_each_set_bit(bit, indio_dev->active_scan_mask,  in at91_adc_dma_start()
1221 			 indio_dev->num_channels) {  in at91_adc_dma_start()
1228 		st->dma_st.rx_buf_sz += chan->scan_type.storagebits / 8;  in at91_adc_dma_start()
1230 	st->dma_st.rx_buf_sz *= st->dma_st.watermark;  in at91_adc_dma_start()
1233 	desc = dmaengine_prep_dma_cyclic(st->dma_st.dma_chan,  in at91_adc_dma_start()
1234 					 st->dma_st.rx_dma_buf,  in at91_adc_dma_start()
1235 					 st->dma_st.rx_buf_sz,  in at91_adc_dma_start()
1236 					 st->dma_st.rx_buf_sz / 2,  in at91_adc_dma_start()
1240 		dev_err(&indio_dev->dev, "cannot prepare DMA cyclic\n");  in at91_adc_dma_start()
1241 		return -EBUSY;  in at91_adc_dma_start()
1244 	desc->callback = at91_dma_buffer_done;  in at91_adc_dma_start()
1245 	desc->callback_param = indio_dev;  in at91_adc_dma_start()
1250 		dev_err(&indio_dev->dev, "cannot submit DMA cyclic\n");  in at91_adc_dma_start()
1251 		dmaengine_terminate_async(st->dma_st.dma_chan);  in at91_adc_dma_start()
1258 	dma_async_issue_pending(st->dma_st.dma_chan);  in at91_adc_dma_start()
1261 	st->dma_st.dma_ts = iio_get_time_ns(indio_dev);  in at91_adc_dma_start()
1263 	dev_dbg(&indio_dev->dev, "DMA cyclic started\n");  in at91_adc_dma_start()
1271 	/* if using DMA, we do not use our own IRQ (we use DMA-controller) */  in at91_adc_buffer_check_use_irq()
1272 	if (st->dma_st.dma_chan)  in at91_adc_buffer_check_use_irq()
1275 	if (iio_trigger_validate_own_device(indio->trig, indio))  in at91_adc_buffer_check_use_irq()
1284 	return !!bitmap_subset(indio_dev->active_scan_mask,  in at91_adc_current_chan_is_touch()
1285 			       &st->touch_st.channels_bitmask,  in at91_adc_current_chan_is_touch()
1286 			       st->soc_info.platform->max_index + 1);  in at91_adc_current_chan_is_touch()
1301 		return -EINVAL;  in at91_adc_buffer_prepare()
1303 	ret = pm_runtime_resume_and_get(st->dev);  in at91_adc_buffer_prepare()
1310 		dev_err(&indio_dev->dev, "buffer prepare failed\n");  in at91_adc_buffer_prepare()
1314 	for_each_set_bit(bit, indio_dev->active_scan_mask,  in at91_adc_buffer_prepare()
1315 			 indio_dev->num_channels) {  in at91_adc_buffer_prepare()
1321 		if (chan->type == IIO_POSITIONRELATIVE ||  in at91_adc_buffer_prepare()
1322 		    chan->type == IIO_PRESSURE ||  in at91_adc_buffer_prepare()
1323 		    chan->type == IIO_TEMP)  in at91_adc_buffer_prepare()
1328 		at91_adc_writel(st, CHER, BIT(chan->channel));  in at91_adc_buffer_prepare()
1335 	pm_runtime_mark_last_busy(st->dev);  in at91_adc_buffer_prepare()
1336 	pm_runtime_put_autosuspend(st->dev);  in at91_adc_buffer_prepare()
1352 		return -EINVAL;  in at91_adc_buffer_postdisable()
1354 	ret = pm_runtime_resume_and_get(st->dev);  in at91_adc_buffer_postdisable()
1364 	for_each_set_bit(bit, indio_dev->active_scan_mask,  in at91_adc_buffer_postdisable()
1365 			 indio_dev->num_channels) {  in at91_adc_buffer_postdisable()
1372 		if (chan->type == IIO_POSITIONRELATIVE ||  in at91_adc_buffer_postdisable()
1373 		    chan->type == IIO_PRESSURE ||  in at91_adc_buffer_postdisable()
1374 		    chan->type == IIO_TEMP)  in at91_adc_buffer_postdisable()
1377 		at91_adc_writel(st, CHDR, BIT(chan->channel));  in at91_adc_buffer_postdisable()
1379 		if (st->dma_st.dma_chan)  in at91_adc_buffer_postdisable()
1380 			at91_adc_read_chan(st, chan->address);  in at91_adc_buffer_postdisable()
1390 	if (st->dma_st.dma_chan)  in at91_adc_buffer_postdisable()
1391 		dmaengine_terminate_sync(st->dma_st.dma_chan);  in at91_adc_buffer_postdisable()
1393 	pm_runtime_mark_last_busy(st->dev);  in at91_adc_buffer_postdisable()
1394 	pm_runtime_put_autosuspend(st->dev);  in at91_adc_buffer_postdisable()
1409 	trig = devm_iio_trigger_alloc(&indio->dev, "%s-dev%d-%s", indio->name,  in at91_adc_allocate_trigger()
1412 		return ERR_PTR(-ENOMEM);  in at91_adc_allocate_trigger()
1414 	trig->dev.parent = indio->dev.parent;  in at91_adc_allocate_trigger()
1416 	trig->ops = &at91_adc_trigger_ops;  in at91_adc_allocate_trigger()
1418 	ret = devm_iio_trigger_register(&indio->dev, trig);  in at91_adc_allocate_trigger()
1444 		timeout--;  in at91_adc_trigger_handler_nodma()
1451 	for_each_set_bit(bit, indio_dev->active_scan_mask,  in at91_adc_trigger_handler_nodma()
1452 			 indio_dev->num_channels) {  in at91_adc_trigger_handler_nodma()
1468 		if (chan->type == IIO_VOLTAGE) {  in at91_adc_trigger_handler_nodma()
1469 			val = at91_adc_read_chan(st, chan->address);  in at91_adc_trigger_handler_nodma()
1471 			st->buffer[i] = val;  in at91_adc_trigger_handler_nodma()
1473 			st->buffer[i] = 0;  in at91_adc_trigger_handler_nodma()
1478 	iio_push_to_buffers_with_timestamp(indio_dev, st->buffer,  in at91_adc_trigger_handler_nodma()
1479 					   pf->timestamp);  in at91_adc_trigger_handler_nodma()
1494 				    indio_dev->name);  in at91_adc_trigger_handler_dma()
1496 	sample_size = div_s64(st->dma_st.rx_buf_sz, st->dma_st.watermark);  in at91_adc_trigger_handler_dma()
1504 	interval = div_s64((ns - st->dma_st.dma_ts), sample_count);  in at91_adc_trigger_handler_dma()
1512 					&st->dma_st.rx_buf[st->dma_st.buf_idx],  in at91_adc_trigger_handler_dma()
1516 				(st->dma_st.rx_buf + st->dma_st.buf_idx),  in at91_adc_trigger_handler_dma()
1517 				(st->dma_st.dma_ts + interval * sample_index));  in at91_adc_trigger_handler_dma()
1519 		transferred_len -= sample_size;  in at91_adc_trigger_handler_dma()
1521 		st->dma_st.buf_idx += sample_size;  in at91_adc_trigger_handler_dma()
1523 		if (st->dma_st.buf_idx >= st->dma_st.rx_buf_sz)  in at91_adc_trigger_handler_dma()
1524 			st->dma_st.buf_idx = 0;  in at91_adc_trigger_handler_dma()
1528 	st->dma_st.dma_ts = iio_get_time_ns(indio_dev);  in at91_adc_trigger_handler_dma()
1534 	struct iio_dev *indio_dev = pf->indio_dev;  in at91_adc_trigger_handler()
1541 	if (iio_trigger_validate_own_device(indio_dev->trig, indio_dev))  in at91_adc_trigger_handler()
1544 	if (st->dma_st.dma_chan)  in at91_adc_trigger_handler()
1549 	iio_trigger_notify_done(indio_dev->trig);  in at91_adc_trigger_handler()
1566 	 * Since the adc frequency is checked before, there is no reason  in at91_adc_startup_time()
1586 	f_per = clk_get_rate(st->per_clk);  in at91_adc_setup_samp_freq()
1587 	prescal = (f_per / (2 * freq)) - 1;  in at91_adc_setup_samp_freq()
1591 	ret = pm_runtime_resume_and_get(st->dev);  in at91_adc_setup_samp_freq()
1602 	pm_runtime_mark_last_busy(st->dev);  in at91_adc_setup_samp_freq()
1603 	pm_runtime_put_autosuspend(st->dev);  in at91_adc_setup_samp_freq()
1605 	dev_dbg(&indio_dev->dev, "freq: %u, startup: %u, prescal: %u, tracktim=%u\n",  in at91_adc_setup_samp_freq()
1607 	st->current_sample_rate = freq;  in at91_adc_setup_samp_freq()
1612 	return st->current_sample_rate;  in at91_adc_get_sample_freq()
1622 	for_each_set_bit(bit, indio_dev->active_scan_mask,  in at91_adc_touch_data_handler()
1623 			 st->soc_info.platform->max_index + 1) {  in at91_adc_touch_data_handler()
1627 		if (chan->type == IIO_POSITIONRELATIVE)  in at91_adc_touch_data_handler()
1628 			at91_adc_read_position(st, chan->channel, &val);  in at91_adc_touch_data_handler()
1629 		else if (chan->type == IIO_PRESSURE)  in at91_adc_touch_data_handler()
1630 			at91_adc_read_pressure(st, chan->channel, &val);  in at91_adc_touch_data_handler()
1633 		st->buffer[i] = val;  in at91_adc_touch_data_handler()
1644 	schedule_work(&st->touch_st.workq);  in at91_adc_touch_data_handler()
1654 			AT91_SAMA5D2_TRGR_TRGPER(st->touch_st.sample_period_val));  in at91_adc_pen_detect_interrupt()
1655 	st->touch_st.touching = true;  in at91_adc_pen_detect_interrupt()
1666 	st->touch_st.touching = false;  in at91_adc_no_pen_detect_interrupt()
1679 	struct iio_dev *indio_dev = st->indio_dev;  in at91_adc_workq_handler()
1681 	iio_push_to_buffers(indio_dev, st->buffer);  in at91_adc_workq_handler()
1705 		/* periodic trigger IRQ - during pen sense */  in at91_adc_interrupt()
1719 		iio_trigger_poll(indio->trig);  in at91_adc_interrupt()
1720 	} else if (iio_buffer_enabled(indio) && st->dma_st.dma_chan) {  in at91_adc_interrupt()
1721 		/* triggered buffer with DMA - should not happen */  in at91_adc_interrupt()
1726 		st->conversion_value = at91_adc_read_chan(st, st->chan->address);  in at91_adc_interrupt()
1727 		st->conversion_done = true;  in at91_adc_interrupt()
1728 		wake_up_interruptible(&st->wq_data_available);  in at91_adc_interrupt()
1733 /* This needs to be called with direct mode claimed and st->lock locked. */
1741 	ret = pm_runtime_resume_and_get(st->dev);  in at91_adc_read_info_raw()
1749 	if (chan->type == IIO_POSITIONRELATIVE) {  in at91_adc_read_info_raw()
1750 		ret = at91_adc_read_position(st, chan->channel,  in at91_adc_read_info_raw()
1758 	if (chan->type == IIO_PRESSURE) {  in at91_adc_read_info_raw()
1759 		ret = at91_adc_read_pressure(st, chan->channel,  in at91_adc_read_info_raw()
1770 	st->chan = chan;  in at91_adc_read_info_raw()
1773 	at91_adc_writel(st, CHER, BIT(chan->channel));  in at91_adc_read_info_raw()
1779 	if (chan->type == IIO_TEMP)  in at91_adc_read_info_raw()
1781 	at91_adc_eoc_ena(st, chan->channel);  in at91_adc_read_info_raw()
1784 	ret = wait_event_interruptible_timeout(st->wq_data_available,  in at91_adc_read_info_raw()
1785 					       st->conversion_done,  in at91_adc_read_info_raw()
1788 		ret = -ETIMEDOUT;  in at91_adc_read_info_raw()
1791 		*val = st->conversion_value;  in at91_adc_read_info_raw()
1793 		if (chan->scan_type.sign == 's')  in at91_adc_read_info_raw()
1795 					     chan->scan_type.realbits - 1);  in at91_adc_read_info_raw()
1796 		st->conversion_done = false;  in at91_adc_read_info_raw()
1799 	at91_adc_eoc_dis(st, st->chan->channel);  in at91_adc_read_info_raw()
1800 	if (chan->type == IIO_TEMP)  in at91_adc_read_info_raw()
1802 	at91_adc_writel(st, CHDR, BIT(chan->channel));  in at91_adc_read_info_raw()
1808 	pm_runtime_mark_last_busy(st->dev);  in at91_adc_read_info_raw()
1809 	pm_runtime_put_autosuspend(st->dev);  in at91_adc_read_info_raw()
1823 	mutex_lock(&st->lock);  in at91_adc_read_info_locked()
1825 	mutex_unlock(&st->lock);  in at91_adc_read_info_locked()
1849 		st->temp_st.saved_sample_rate = st->current_sample_rate;  in at91_adc_temp_sensor_configure()
1850 		st->temp_st.saved_oversampling = st->oversampling_ratio;  in at91_adc_temp_sensor_configure()
1853 		sample_rate = st->temp_st.saved_sample_rate;  in at91_adc_temp_sensor_configure()
1854 		oversampling_ratio = st->temp_st.saved_oversampling;  in at91_adc_temp_sensor_configure()
1855 		startup_time = st->soc_info.startup_time;  in at91_adc_temp_sensor_configure()
1860 	at91_adc_setup_samp_freq(st->indio_dev, sample_rate, startup_time,  in at91_adc_temp_sensor_configure()
1869 	struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb;  in at91_adc_read_temp()
1877 	mutex_lock(&st->lock);  in at91_adc_read_temp()
1879 	ret = pm_runtime_resume_and_get(st->dev);  in at91_adc_read_temp()
1901 	pm_runtime_mark_last_busy(st->dev);  in at91_adc_read_temp()
1902 	pm_runtime_put_autosuspend(st->dev);  in at91_adc_read_temp()
1904 	mutex_unlock(&st->lock);  in at91_adc_read_temp()
1910 	 * Temp[milli] = p1[milli] + (vtemp * clb->p6 - clb->p4 * vbg)/  in at91_adc_read_temp()
1913 	div1 = DIV_ROUND_CLOSEST_ULL(((u64)vtemp * clb->p6), vbg);  in at91_adc_read_temp()
1915 	div2 = DIV_ROUND_CLOSEST_ULL((u64)clb->p4, AT91_ADC_TS_VTEMP_DT);  in at91_adc_read_temp()
1917 	*val = clb->p1 + (int)div1 - (int)div2;  in at91_adc_read_temp()
1933 		*val = st->vref_uv / 1000;  in at91_adc_read_raw()
1934 		if (chan->differential)  in at91_adc_read_raw()
1936 		*val2 = chan->scan_type.realbits;  in at91_adc_read_raw()
1940 		if (chan->type != IIO_TEMP)  in at91_adc_read_raw()
1941 			return -EINVAL;  in at91_adc_read_raw()
1949 		*val = st->oversampling_ratio;  in at91_adc_read_raw()
1953 		return -EINVAL;  in at91_adc_read_raw()
1967 		if (val == st->oversampling_ratio)  in at91_adc_write_raw()
1973 		mutex_lock(&st->lock);  in at91_adc_write_raw()
1976 		mutex_unlock(&st->lock);  in at91_adc_write_raw()
1980 		if (val < st->soc_info.min_sample_rate ||  in at91_adc_write_raw()
1981 		    val > st->soc_info.max_sample_rate)  in at91_adc_write_raw()
1982 			return -EINVAL;  in at91_adc_write_raw()
1987 		mutex_lock(&st->lock);  in at91_adc_write_raw()
1989 					 st->soc_info.startup_time, 0);  in at91_adc_write_raw()
1990 		mutex_unlock(&st->lock);  in at91_adc_write_raw()
1994 		return -EINVAL;  in at91_adc_write_raw()
2007 		*vals = (int *)st->soc_info.platform->oversampling_avail;  in at91_adc_read_avail()
2009 		*length = st->soc_info.platform->oversampling_avail_no;  in at91_adc_read_avail()
2012 		return -EINVAL;  in at91_adc_read_avail()
2018 	struct device *dev = &st->indio_dev->dev;  in at91_adc_dma_init()
2021 	unsigned int sample_size = st->soc_info.platform->nr_channels * 2;  in at91_adc_dma_init()
2030 	if (st->dma_st.dma_chan)  in at91_adc_dma_init()
2033 	st->dma_st.dma_chan = dma_request_chan(dev, "rx");  in at91_adc_dma_init()
2034 	if (IS_ERR(st->dma_st.dma_chan))  {  in at91_adc_dma_init()
2036 		st->dma_st.dma_chan = NULL;  in at91_adc_dma_init()
2040 	st->dma_st.rx_buf = dma_alloc_coherent(st->dma_st.dma_chan->device->dev,  in at91_adc_dma_init()
2042 					       &st->dma_st.rx_dma_buf,  in at91_adc_dma_init()
2044 	if (!st->dma_st.rx_buf) {  in at91_adc_dma_init()
2051 	config.src_addr = (phys_addr_t)(st->dma_st.phys_addr  in at91_adc_dma_init()
2052 			  + st->soc_info.platform->layout->LCDR);  in at91_adc_dma_init()
2057 	if (dmaengine_slave_config(st->dma_st.dma_chan, &config)) {  in at91_adc_dma_init()
2063 		 dma_chan_name(st->dma_st.dma_chan));  in at91_adc_dma_init()
2068 	dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE,  in at91_adc_dma_init()
2069 			  st->dma_st.rx_buf, st->dma_st.rx_dma_buf);  in at91_adc_dma_init()
2071 	dma_release_channel(st->dma_st.dma_chan);  in at91_adc_dma_init()
2072 	st->dma_st.dma_chan = NULL;  in at91_adc_dma_init()
2079 	struct device *dev = &st->indio_dev->dev;  in at91_adc_dma_disable()
2081 	unsigned int sample_size = st->soc_info.platform->nr_channels * 2;  in at91_adc_dma_disable()
2086 	if (!st->dma_st.dma_chan)  in at91_adc_dma_disable()
2090 	dmaengine_terminate_sync(st->dma_st.dma_chan);  in at91_adc_dma_disable()
2092 	dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE,  in at91_adc_dma_disable()
2093 			  st->dma_st.rx_buf, st->dma_st.rx_dma_buf);  in at91_adc_dma_disable()
2094 	dma_release_channel(st->dma_st.dma_chan);  in at91_adc_dma_disable()
2095 	st->dma_st.dma_chan = NULL;  in at91_adc_dma_disable()
2108 	if (!st->selected_trig->hw_trig) {  in at91_adc_set_watermark()
2109 		dev_dbg(&indio_dev->dev, "we need hw trigger for DMA\n");  in at91_adc_set_watermark()
2113 	dev_dbg(&indio_dev->dev, "new watermark is %u\n", val);  in at91_adc_set_watermark()
2114 	st->dma_st.watermark = val;  in at91_adc_set_watermark()
2143 	if (bitmap_subset(scan_mask, &st->touch_st.channels_bitmask,  in at91_adc_update_scan_mode()
2144 			  st->soc_info.platform->max_index + 1))  in at91_adc_update_scan_mode()
2150 	if (bitmap_intersects(&st->touch_st.channels_bitmask, scan_mask,  in at91_adc_update_scan_mode()
2151 			      st->soc_info.platform->max_index + 1))  in at91_adc_update_scan_mode()
2152 		return -EINVAL;  in at91_adc_update_scan_mode()
2161 	if (st->soc_info.platform->layout->EOC_IDR)  in at91_adc_hw_init()
2171 	at91_adc_setup_samp_freq(indio_dev, st->soc_info.min_sample_rate,  in at91_adc_hw_init()
2172 				 st->soc_info.startup_time, 0);  in at91_adc_hw_init()
2175 	at91_adc_config_emr(st, st->oversampling_ratio, 0);  in at91_adc_hw_init()
2184 	return sysfs_emit(buf, "%d\n", !!st->dma_st.dma_chan);  in at91_adc_get_fifo_state()
2193 	return sysfs_emit(buf, "%d\n", st->dma_st.watermark);  in at91_adc_get_watermark()
2228 	if (st->selected_trig->hw_trig)  in at91_adc_buffer_and_trigger_init()
2233 	ret = devm_iio_triggered_buffer_setup_ext(&indio->dev, indio,  in at91_adc_buffer_and_trigger_init()
2241 	if (!st->selected_trig->hw_trig)  in at91_adc_buffer_and_trigger_init()
2244 	st->trig = at91_adc_allocate_trigger(indio, st->selected_trig->name);  in at91_adc_buffer_and_trigger_init()
2245 	if (IS_ERR(st->trig)) {  in at91_adc_buffer_and_trigger_init()
2247 		return PTR_ERR(st->trig);  in at91_adc_buffer_and_trigger_init()
2254 	st->dma_st.watermark = 1;  in at91_adc_buffer_and_trigger_init()
2262 	struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb;  in at91_adc_temp_sensor_init()
2268 	if (!st->soc_info.platform->temp_sensor)  in at91_adc_temp_sensor_init()
2275 		if (ret != -ENOENT)  in at91_adc_temp_sensor_init()
2287 		ret = -EINVAL;  in at91_adc_temp_sensor_init()
2292 	clb->p1 = buf[AT91_ADC_TS_CLB_IDX_P1];  in at91_adc_temp_sensor_init()
2293 	clb->p4 = buf[AT91_ADC_TS_CLB_IDX_P4];  in at91_adc_temp_sensor_init()
2294 	clb->p6 = buf[AT91_ADC_TS_CLB_IDX_P6];  in at91_adc_temp_sensor_init()
2299 	clb->p1 = clb->p1 * 1000;  in at91_adc_temp_sensor_init()
2308 	struct device *dev = &pdev->dev;  in at91_adc_probe()
2315 	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st));  in at91_adc_probe()
2317 		return -ENOMEM;  in at91_adc_probe()
2320 	st->indio_dev = indio_dev;  in at91_adc_probe()
2322 	st->soc_info.platform = device_get_match_data(dev);  in at91_adc_probe()
2324 	ret = at91_adc_temp_sensor_init(st, &pdev->dev);  in at91_adc_probe()
2327 		num_channels = st->soc_info.platform->max_channels - 1;  in at91_adc_probe()
2329 		num_channels = st->soc_info.platform->max_channels;  in at91_adc_probe()
2331 	indio_dev->name = dev_name(&pdev->dev);  in at91_adc_probe()
2332 	indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;  in at91_adc_probe()
2333 	indio_dev->info = &at91_adc_info;  in at91_adc_probe()
2334 	indio_dev->channels = *st->soc_info.platform->adc_channels;  in at91_adc_probe()
2335 	indio_dev->num_channels = num_channels;  in at91_adc_probe()
2337 	bitmap_set(&st->touch_st.channels_bitmask,  in at91_adc_probe()
2338 		   st->soc_info.platform->touch_chan_x, 1);  in at91_adc_probe()
2339 	bitmap_set(&st->touch_st.channels_bitmask,  in at91_adc_probe()
2340 		   st->soc_info.platform->touch_chan_y, 1);  in at91_adc_probe()
2341 	bitmap_set(&st->touch_st.channels_bitmask,  in at91_adc_probe()
2342 		   st->soc_info.platform->touch_chan_p, 1);  in at91_adc_probe()
2344 	st->oversampling_ratio = 1;  in at91_adc_probe()
2346 	ret = device_property_read_u32(dev, "atmel,min-sample-rate-hz",  in at91_adc_probe()
2347 				       &st->soc_info.min_sample_rate);  in at91_adc_probe()
2349 		dev_err(&pdev->dev,  in at91_adc_probe()
2350 			"invalid or missing value for atmel,min-sample-rate-hz\n");  in at91_adc_probe()
2354 	ret = device_property_read_u32(dev, "atmel,max-sample-rate-hz",  in at91_adc_probe()
2355 				       &st->soc_info.max_sample_rate);  in at91_adc_probe()
2357 		dev_err(&pdev->dev,  in at91_adc_probe()
2358 			"invalid or missing value for atmel,max-sample-rate-hz\n");  in at91_adc_probe()
2362 	ret = device_property_read_u32(dev, "atmel,startup-time-ms",  in at91_adc_probe()
2363 				       &st->soc_info.startup_time);  in at91_adc_probe()
2365 		dev_err(&pdev->dev,  in at91_adc_probe()
2366 			"invalid or missing value for atmel,startup-time-ms\n");  in at91_adc_probe()
2370 	ret = device_property_read_u32(dev, "atmel,trigger-edge-type",  in at91_adc_probe()
2373 		dev_dbg(&pdev->dev,  in at91_adc_probe()
2374 			"atmel,trigger-edge-type not specified, only software trigger available\n");  in at91_adc_probe()
2377 	st->selected_trig = NULL;  in at91_adc_probe()
2380 	for (i = 0; i < st->soc_info.platform->hw_trig_cnt + 1; i++)  in at91_adc_probe()
2382 			st->selected_trig = &at91_adc_trigger_list[i];  in at91_adc_probe()
2386 	if (!st->selected_trig) {  in at91_adc_probe()
2387 		dev_err(&pdev->dev, "invalid external trigger edge value\n");  in at91_adc_probe()
2388 		return -EINVAL;  in at91_adc_probe()
2391 	init_waitqueue_head(&st->wq_data_available);  in at91_adc_probe()
2392 	mutex_init(&st->lock);  in at91_adc_probe()
2393 	INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler);  in at91_adc_probe()
2395 	st->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);  in at91_adc_probe()
2396 	if (IS_ERR(st->base))  in at91_adc_probe()
2397 		return PTR_ERR(st->base);  in at91_adc_probe()
2400 	st->dma_st.phys_addr = res->start;  in at91_adc_probe()
2402 	st->irq = platform_get_irq(pdev, 0);  in at91_adc_probe()
2403 	if (st->irq < 0)  in at91_adc_probe()
2404 		return st->irq;  in at91_adc_probe()
2406 	st->per_clk = devm_clk_get(&pdev->dev, "adc_clk");  in at91_adc_probe()
2407 	if (IS_ERR(st->per_clk))  in at91_adc_probe()
2408 		return PTR_ERR(st->per_clk);  in at91_adc_probe()
2410 	st->reg = devm_regulator_get(&pdev->dev, "vddana");  in at91_adc_probe()
2411 	if (IS_ERR(st->reg))  in at91_adc_probe()
2412 		return PTR_ERR(st->reg);  in at91_adc_probe()
2414 	st->vref = devm_regulator_get(&pdev->dev, "vref");  in at91_adc_probe()
2415 	if (IS_ERR(st->vref))  in at91_adc_probe()
2416 		return PTR_ERR(st->vref);  in at91_adc_probe()
2418 	ret = devm_request_irq(&pdev->dev, st->irq, at91_adc_interrupt, 0,  in at91_adc_probe()
2419 			       pdev->dev.driver->name, indio_dev);  in at91_adc_probe()
2423 	ret = regulator_enable(st->reg);  in at91_adc_probe()
2427 	ret = regulator_enable(st->vref);  in at91_adc_probe()
2431 	st->vref_uv = regulator_get_voltage(st->vref);  in at91_adc_probe()
2432 	if (st->vref_uv <= 0) {  in at91_adc_probe()
2433 		ret = -EINVAL;  in at91_adc_probe()
2437 	ret = clk_prepare_enable(st->per_clk);  in at91_adc_probe()
2442 	st->dev = &pdev->dev;  in at91_adc_probe()
2443 	pm_runtime_set_autosuspend_delay(st->dev, 500);  in at91_adc_probe()
2444 	pm_runtime_use_autosuspend(st->dev);  in at91_adc_probe()
2445 	pm_runtime_set_active(st->dev);  in at91_adc_probe()
2446 	pm_runtime_enable(st->dev);  in at91_adc_probe()
2447 	pm_runtime_get_noresume(st->dev);  in at91_adc_probe()
2451 	ret = at91_adc_buffer_and_trigger_init(&pdev->dev, indio_dev);  in at91_adc_probe()
2455 	if (dma_coerce_mask_and_coherent(&indio_dev->dev, DMA_BIT_MASK(32)))  in at91_adc_probe()
2456 		dev_info(&pdev->dev, "cannot set DMA mask to 32-bit\n");  in at91_adc_probe()
2462 	if (st->selected_trig->hw_trig)  in at91_adc_probe()
2463 		dev_info(&pdev->dev, "setting up trigger as %s\n",  in at91_adc_probe()
2464 			 st->selected_trig->name);  in at91_adc_probe()
2466 	dev_info(&pdev->dev, "version: %x\n",  in at91_adc_probe()
2467 		 readl_relaxed(st->base + st->soc_info.platform->layout->VERSION));  in at91_adc_probe()
2469 	pm_runtime_mark_last_busy(st->dev);  in at91_adc_probe()
2470 	pm_runtime_put_autosuspend(st->dev);  in at91_adc_probe()
2477 	pm_runtime_put_noidle(st->dev);  in at91_adc_probe()
2478 	pm_runtime_disable(st->dev);  in at91_adc_probe()
2479 	pm_runtime_set_suspended(st->dev);  in at91_adc_probe()
2480 	pm_runtime_dont_use_autosuspend(st->dev);  in at91_adc_probe()
2481 	clk_disable_unprepare(st->per_clk);  in at91_adc_probe()
2483 	regulator_disable(st->vref);  in at91_adc_probe()
2485 	regulator_disable(st->reg);  in at91_adc_probe()
2498 	pm_runtime_disable(st->dev);  in at91_adc_remove()
2499 	pm_runtime_set_suspended(st->dev);  in at91_adc_remove()
2500 	clk_disable_unprepare(st->per_clk);  in at91_adc_remove()
2502 	regulator_disable(st->vref);  in at91_adc_remove()
2503 	regulator_disable(st->reg);  in at91_adc_remove()
2512 	ret = pm_runtime_resume_and_get(st->dev);  in at91_adc_suspend()
2520 	 * Do a sofware reset of the ADC before we go to suspend.  in at91_adc_suspend()
2521 	 * this will ensure that all pins are free from being muxed by the ADC  in at91_adc_suspend()
2523 	 * Otherwise, ADC will hog them and we can't go to suspend mode.  in at91_adc_suspend()
2527 	pm_runtime_mark_last_busy(st->dev);  in at91_adc_suspend()
2528 	pm_runtime_put_noidle(st->dev);  in at91_adc_suspend()
2529 	clk_disable_unprepare(st->per_clk);  in at91_adc_suspend()
2530 	regulator_disable(st->vref);  in at91_adc_suspend()
2531 	regulator_disable(st->reg);  in at91_adc_suspend()
2546 	ret = regulator_enable(st->reg);  in at91_adc_resume()
2550 	ret = regulator_enable(st->vref);  in at91_adc_resume()
2554 	ret = clk_prepare_enable(st->per_clk);  in at91_adc_resume()
2558 	pm_runtime_get_noresume(st->dev);  in at91_adc_resume()
2571 	pm_runtime_mark_last_busy(st->dev);  in at91_adc_resume()
2572 	pm_runtime_put_autosuspend(st->dev);  in at91_adc_resume()
2577 	pm_runtime_mark_last_busy(st->dev);  in at91_adc_resume()
2578 	pm_runtime_put_noidle(st->dev);  in at91_adc_resume()
2579 	clk_disable_unprepare(st->per_clk);  in at91_adc_resume()
2581 	regulator_disable(st->vref);  in at91_adc_resume()
2583 	regulator_disable(st->reg);  in at91_adc_resume()
2585 	dev_err(&indio_dev->dev, "failed to resume\n");  in at91_adc_resume()
2594 	clk_disable(st->per_clk);  in at91_adc_runtime_suspend()
2604 	return clk_enable(st->per_clk);  in at91_adc_runtime_resume()
2615 		.compatible = "atmel,sama5d2-adc",
2618 		.compatible = "microchip,sama7g5-adc",
2630 		.name = "at91-sama5d2_adc",
2639 MODULE_DESCRIPTION("Atmel AT91 SAMA5D2 ADC");