Lines Matching +full:adc +full:- +full:diff +full:- +full:channels
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Atmel ADC driver for SAMA5D2 devices and compatible.
15 #include <linux/dma-mapping.h>
32 #include <linux/nvmem-consumer.h>
37 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
111 /* Interrupt Enable Register - TS X measurement ready */
113 /* Interrupt Enable Register - TS Y measurement ready */
115 /* Interrupt Enable Register - TS pressure measurement ready */
117 /* Interrupt Enable Register - Data ready */
119 /* Interrupt Enable Register - general overrun error */
121 /* Interrupt Enable Register - Pen detect */
123 /* Interrupt Enable Register - No pen detect */
140 /* Interrupt Status Register - Pen touching sense status */
150 /* Extended Mode Register - Oversampling rate */
158 /* Extended Mode Register - TRACKX */
165 /* Extended Mode Register - Averaging on single trigger event */
174 /* Channel Offset Register differential offset - constant, not a register */
178 /* Analog Control Register - Pen detect sensitivity mask */
180 /* Analog Control Register - Source last channel */
185 /* Touchscreen Mode Register - No touch mode */
187 /* Touchscreen Mode Register - 4 wire screen, no pressure measurement */
189 /* Touchscreen Mode Register - 4 wire screen, pressure measurement */
191 /* Touchscreen Mode Register - 5 wire screen */
193 /* Touchscreen Mode Register - Average samples mask */
195 /* Touchscreen Mode Register - Average samples */
197 /* Touchscreen Mode Register - Touch/trigger frequency ratio mask */
199 /* Touchscreen Mode Register - Touch/trigger frequency ratio */
201 /* Touchscreen Mode Register - Pen Debounce Time mask */
203 /* Touchscreen Mode Register - Pen Debounce Time */
205 /* Touchscreen Mode Register - No DMA for touch measurements */
207 /* Touchscreen Mode Register - Disable pen detection */
209 /* Touchscreen Mode Register - Enable pen detection */
232 /* Trigger Mode - trigger period mask */
234 /* Trigger Mode - trigger period */
251 /* Temperature Sensor Mode - Temperature sensor on */
379 .datasheet_name = "CH"#num"-CH"#num2, \
442 readl_relaxed((st)->base + (st)->soc_info.platform->layout->reg)
444 readl_relaxed((st)->base + reg)
446 writel_relaxed(val, (st)->base + (st)->soc_info.platform->layout->reg)
449 * struct at91_adc_platform - at91-sama5d2 platform information struct
451 * @adc_channels: pointer to an array of channels for registering in
453 * @nr_channels: number of physical channels available
457 * @max_channels: number of total channels
464 * @chan_realbits: realbits for registered channels
487 * struct at91_adc_temp_sensor_clb - at91-sama5d2 temperature sensor
500 * enum at91_adc_ts_clb_idx - calibration indexes in NVMEM buffer
513 /* Temperature sensor calibration - Vtemp voltage sensitivity to temperature. */
517 * struct at91_adc_soc_info - at91-sama5d2 soc information struct
540 * struct at91_adc_dma - at91-sama5d2 dma information struct
544 * @phys_addr: physical address of the ADC base register
562 * struct at91_adc_touch - at91-sama5d2 touchscreen information struct
566 * @channels_bitmask: bitmask with the touchscreen channels enabled
578 * struct at91_adc_temp - at91-sama5d2 temperature information structure
610 /* We assume 32 channels for now, has to be increased if needed. */
659 /* original ABI has the differential channels with a gap in between */
754 for (i = 0; i < indio_dev->num_channels; i++) { in at91_adc_chan_xlate()
755 if (indio_dev->channels[i].scan_index == chan) in at91_adc_chan_xlate()
758 return -EINVAL; in at91_adc_chan_xlate()
768 return indio_dev->channels + index; in at91_adc_chan_get()
774 return at91_adc_chan_xlate(indio_dev, iiospec->args[0]); in at91_adc_fwnode_xlate()
783 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_active_scan_mask_to_reg()
784 indio_dev->num_channels) { in at91_adc_active_scan_mask_to_reg()
787 mask |= BIT(chan->channel); in at91_adc_active_scan_mask_to_reg()
790 return mask & GENMASK(st->soc_info.platform->nr_channels, 0); in at91_adc_active_scan_mask_to_reg()
798 cor = BIT(chan->channel) | BIT(chan->channel2); in at91_adc_cor()
801 cor <<= st->soc_info.platform->layout->COR_diff_offset; in at91_adc_cor()
802 if (chan->differential) in at91_adc_cor()
812 if (st->soc_info.platform->layout->EOC_ISR) in at91_adc_irq_status()
821 if (st->soc_info.platform->layout->EOC_IMR) in at91_adc_irq_mask()
834 if (!st->soc_info.platform->layout->EOC_IDR) in at91_adc_eoc_dis()
840 if (!st->soc_info.platform->layout->EOC_IDR) in at91_adc_eoc_ena()
851 unsigned int osr_mask = st->soc_info.platform->osr_mask; in at91_adc_config_emr()
855 for (i = 0; i < st->soc_info.platform->oversampling_avail_no; i++) { in at91_adc_config_emr()
856 if (oversampling_ratio == st->soc_info.platform->oversampling_avail[i]) in at91_adc_config_emr()
859 if (i == st->soc_info.platform->oversampling_avail_no) in at91_adc_config_emr()
860 return -EINVAL; in at91_adc_config_emr()
886 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_config_emr()
899 pm_runtime_mark_last_busy(st->dev); in at91_adc_config_emr()
900 pm_runtime_put_autosuspend(st->dev); in at91_adc_config_emr()
902 st->oversampling_ratio = oversampling_ratio; in at91_adc_config_emr()
909 int nbits, diff; in at91_adc_adjust_val_osr() local
911 if (st->oversampling_ratio == 1) in at91_adc_adjust_val_osr()
913 else if (st->oversampling_ratio == 4) in at91_adc_adjust_val_osr()
915 else if (st->oversampling_ratio == 16) in at91_adc_adjust_val_osr()
917 else if (st->oversampling_ratio == 64) in at91_adc_adjust_val_osr()
919 else if (st->oversampling_ratio == 256) in at91_adc_adjust_val_osr()
923 return -EINVAL; in at91_adc_adjust_val_osr()
927 * st->soc_info.platform->chan_realbits, so shift left diff bits. in at91_adc_adjust_val_osr()
929 diff = st->soc_info.platform->chan_realbits - nbits; in at91_adc_adjust_val_osr()
930 *val <<= diff; in at91_adc_adjust_val_osr()
959 u32 clk_khz = st->current_sample_rate / 1000; in at91_adc_configure_touch()
965 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_configure_touch()
974 pm_runtime_mark_last_busy(st->dev); in at91_adc_configure_touch()
975 pm_runtime_put_autosuspend(st->dev); in at91_adc_configure_touch()
1009 st->touch_st.sample_period_val = in at91_adc_configure_touch()
1011 clk_khz / 1000) - 1, 1); in at91_adc_configure_touch()
1026 * max = 2^AT91_SAMA5D2_MAX_POS_BITS - 1 in at91_adc_touch_pos()
1029 if (reg == st->soc_info.platform->layout->XPOSR) in at91_adc_touch_pos()
1031 else if (reg == st->soc_info.platform->layout->YPOSR) in at91_adc_touch_pos()
1035 dev_dbg(&st->indio_dev->dev, "pos is 0\n"); in at91_adc_touch_pos()
1038 result = (pos << AT91_SAMA5D2_MAX_POS_BITS) - pos; in at91_adc_touch_pos()
1041 dev_err(&st->indio_dev->dev, "scale is 0\n"); in at91_adc_touch_pos()
1051 st->touch_st.x_pos = at91_adc_touch_pos(st, st->soc_info.platform->layout->XPOSR); in at91_adc_touch_x_pos()
1052 return st->touch_st.x_pos; in at91_adc_touch_x_pos()
1057 return at91_adc_touch_pos(st, st->soc_info.platform->layout->YPOSR); in at91_adc_touch_y_pos()
1074 pres = rxp * (st->touch_st.x_pos * factor / 1024) * in at91_adc_touch_pressure()
1075 (z2 * factor / z1 - factor) / in at91_adc_touch_pressure()
1085 return 0xFFFF - pres; in at91_adc_touch_pressure()
1091 if (!st->touch_st.touching) in at91_adc_read_position()
1092 return -ENODATA; in at91_adc_read_position()
1093 if (chan == st->soc_info.platform->touch_chan_x) in at91_adc_read_position()
1095 else if (chan == st->soc_info.platform->touch_chan_y) in at91_adc_read_position()
1098 return -ENODATA; in at91_adc_read_position()
1106 if (!st->touch_st.touching) in at91_adc_read_pressure()
1107 return -ENODATA; in at91_adc_read_pressure()
1108 if (chan == st->soc_info.platform->touch_chan_p) in at91_adc_read_pressure()
1111 return -ENODATA; in at91_adc_read_pressure()
1125 status |= st->selected_trig->trgmod_value; in at91_adc_configure_trigger_registers()
1138 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_configure_trigger()
1146 pm_runtime_mark_last_busy(st->dev); in at91_adc_configure_trigger()
1147 pm_runtime_put_autosuspend(st->dev); in at91_adc_configure_trigger()
1159 if (st->dma_st.dma_chan) in at91_adc_reenable_trigger()
1162 enable_irq(st->irq); in at91_adc_reenable_trigger()
1180 status = dmaengine_tx_status(st->dma_st.dma_chan, in at91_adc_dma_size_done()
1181 st->dma_st.dma_chan->cookie, in at91_adc_dma_size_done()
1187 i = st->dma_st.rx_buf_sz - state.residue; in at91_adc_dma_size_done()
1190 if (i >= st->dma_st.buf_idx) in at91_adc_dma_size_done()
1191 size = i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
1193 size = st->dma_st.rx_buf_sz + i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
1201 iio_trigger_poll_nested(indio_dev->trig); in at91_dma_buffer_done()
1212 if (!st->dma_st.dma_chan) in at91_adc_dma_start()
1216 st->dma_st.buf_idx = 0; in at91_adc_dma_start()
1219 * compute buffer size w.r.t. watermark and enabled channels. in at91_adc_dma_start()
1222 st->dma_st.rx_buf_sz = 0; in at91_adc_dma_start()
1224 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_dma_start()
1225 indio_dev->num_channels) { in at91_adc_dma_start()
1232 st->dma_st.rx_buf_sz += chan->scan_type.storagebits / 8; in at91_adc_dma_start()
1234 st->dma_st.rx_buf_sz *= st->dma_st.watermark; in at91_adc_dma_start()
1237 desc = dmaengine_prep_dma_cyclic(st->dma_st.dma_chan, in at91_adc_dma_start()
1238 st->dma_st.rx_dma_buf, in at91_adc_dma_start()
1239 st->dma_st.rx_buf_sz, in at91_adc_dma_start()
1240 st->dma_st.rx_buf_sz / 2, in at91_adc_dma_start()
1244 dev_err(&indio_dev->dev, "cannot prepare DMA cyclic\n"); in at91_adc_dma_start()
1245 return -EBUSY; in at91_adc_dma_start()
1248 desc->callback = at91_dma_buffer_done; in at91_adc_dma_start()
1249 desc->callback_param = indio_dev; in at91_adc_dma_start()
1254 dev_err(&indio_dev->dev, "cannot submit DMA cyclic\n"); in at91_adc_dma_start()
1255 dmaengine_terminate_async(st->dma_st.dma_chan); in at91_adc_dma_start()
1262 dma_async_issue_pending(st->dma_st.dma_chan); in at91_adc_dma_start()
1265 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_dma_start()
1267 dev_dbg(&indio_dev->dev, "DMA cyclic started\n"); in at91_adc_dma_start()
1275 /* if using DMA, we do not use our own IRQ (we use DMA-controller) */ in at91_adc_buffer_check_use_irq()
1276 if (st->dma_st.dma_chan) in at91_adc_buffer_check_use_irq()
1279 if (iio_trigger_validate_own_device(indio->trig, indio)) in at91_adc_buffer_check_use_irq()
1288 return !!bitmap_subset(indio_dev->active_scan_mask, in at91_adc_current_chan_is_touch()
1289 &st->touch_st.channels_bitmask, in at91_adc_current_chan_is_touch()
1290 st->soc_info.platform->max_index + 1); in at91_adc_current_chan_is_touch()
1305 return -EINVAL; in at91_adc_buffer_prepare()
1307 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_buffer_prepare()
1314 dev_err(&indio_dev->dev, "buffer prepare failed\n"); in at91_adc_buffer_prepare()
1318 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_buffer_prepare()
1319 indio_dev->num_channels) { in at91_adc_buffer_prepare()
1325 if (chan->type == IIO_POSITIONRELATIVE || in at91_adc_buffer_prepare()
1326 chan->type == IIO_PRESSURE || in at91_adc_buffer_prepare()
1327 chan->type == IIO_TEMP) in at91_adc_buffer_prepare()
1332 at91_adc_writel(st, CHER, BIT(chan->channel)); in at91_adc_buffer_prepare()
1339 pm_runtime_mark_last_busy(st->dev); in at91_adc_buffer_prepare()
1340 pm_runtime_put_autosuspend(st->dev); in at91_adc_buffer_prepare()
1356 return -EINVAL; in at91_adc_buffer_postdisable()
1358 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_buffer_postdisable()
1368 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_buffer_postdisable()
1369 indio_dev->num_channels) { in at91_adc_buffer_postdisable()
1376 if (chan->type == IIO_POSITIONRELATIVE || in at91_adc_buffer_postdisable()
1377 chan->type == IIO_PRESSURE || in at91_adc_buffer_postdisable()
1378 chan->type == IIO_TEMP) in at91_adc_buffer_postdisable()
1381 at91_adc_writel(st, CHDR, BIT(chan->channel)); in at91_adc_buffer_postdisable()
1383 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
1384 at91_adc_read_chan(st, chan->address); in at91_adc_buffer_postdisable()
1394 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
1395 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_buffer_postdisable()
1397 pm_runtime_mark_last_busy(st->dev); in at91_adc_buffer_postdisable()
1398 pm_runtime_put_autosuspend(st->dev); in at91_adc_buffer_postdisable()
1413 trig = devm_iio_trigger_alloc(&indio->dev, "%s-dev%d-%s", indio->name, in at91_adc_allocate_trigger()
1416 return ERR_PTR(-ENOMEM); in at91_adc_allocate_trigger()
1418 trig->dev.parent = indio->dev.parent; in at91_adc_allocate_trigger()
1420 trig->ops = &at91_adc_trigger_ops; in at91_adc_allocate_trigger()
1422 ret = devm_iio_trigger_register(&indio->dev, trig); in at91_adc_allocate_trigger()
1448 timeout--; in at91_adc_trigger_handler_nodma()
1455 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_trigger_handler_nodma()
1456 indio_dev->num_channels) { in at91_adc_trigger_handler_nodma()
1463 * Our external trigger only supports the voltage channels. in at91_adc_trigger_handler_nodma()
1472 if (chan->type == IIO_VOLTAGE) { in at91_adc_trigger_handler_nodma()
1473 val = at91_adc_read_chan(st, chan->address); in at91_adc_trigger_handler_nodma()
1475 st->buffer[i] = val; in at91_adc_trigger_handler_nodma()
1477 st->buffer[i] = 0; in at91_adc_trigger_handler_nodma()
1482 iio_push_to_buffers_with_timestamp(indio_dev, st->buffer, in at91_adc_trigger_handler_nodma()
1483 pf->timestamp); in at91_adc_trigger_handler_nodma()
1498 indio_dev->name); in at91_adc_trigger_handler_dma()
1500 sample_size = div_s64(st->dma_st.rx_buf_sz, st->dma_st.watermark); in at91_adc_trigger_handler_dma()
1508 interval = div_s64((ns - st->dma_st.dma_ts), sample_count); in at91_adc_trigger_handler_dma()
1516 &st->dma_st.rx_buf[st->dma_st.buf_idx], in at91_adc_trigger_handler_dma()
1520 (st->dma_st.rx_buf + st->dma_st.buf_idx), in at91_adc_trigger_handler_dma()
1521 (st->dma_st.dma_ts + interval * sample_index)); in at91_adc_trigger_handler_dma()
1523 transferred_len -= sample_size; in at91_adc_trigger_handler_dma()
1525 st->dma_st.buf_idx += sample_size; in at91_adc_trigger_handler_dma()
1527 if (st->dma_st.buf_idx >= st->dma_st.rx_buf_sz) in at91_adc_trigger_handler_dma()
1528 st->dma_st.buf_idx = 0; in at91_adc_trigger_handler_dma()
1532 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_trigger_handler_dma()
1538 struct iio_dev *indio_dev = pf->indio_dev; in at91_adc_trigger_handler()
1545 if (iio_trigger_validate_own_device(indio_dev->trig, indio_dev)) in at91_adc_trigger_handler()
1548 if (st->dma_st.dma_chan) in at91_adc_trigger_handler()
1553 iio_trigger_notify_done(indio_dev->trig); in at91_adc_trigger_handler()
1570 * Since the adc frequency is checked before, there is no reason in at91_adc_startup_time()
1590 f_per = clk_get_rate(st->per_clk); in at91_adc_setup_samp_freq()
1591 prescal = (f_per / (2 * freq)) - 1; in at91_adc_setup_samp_freq()
1595 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_setup_samp_freq()
1606 pm_runtime_mark_last_busy(st->dev); in at91_adc_setup_samp_freq()
1607 pm_runtime_put_autosuspend(st->dev); in at91_adc_setup_samp_freq()
1609 dev_dbg(&indio_dev->dev, "freq: %u, startup: %u, prescal: %u, tracktim=%u\n", in at91_adc_setup_samp_freq()
1611 st->current_sample_rate = freq; in at91_adc_setup_samp_freq()
1616 return st->current_sample_rate; in at91_adc_get_sample_freq()
1626 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_touch_data_handler()
1627 st->soc_info.platform->max_index + 1) { in at91_adc_touch_data_handler()
1631 if (chan->type == IIO_POSITIONRELATIVE) in at91_adc_touch_data_handler()
1632 at91_adc_read_position(st, chan->channel, &val); in at91_adc_touch_data_handler()
1633 else if (chan->type == IIO_PRESSURE) in at91_adc_touch_data_handler()
1634 at91_adc_read_pressure(st, chan->channel, &val); in at91_adc_touch_data_handler()
1637 st->buffer[i] = val; in at91_adc_touch_data_handler()
1648 schedule_work(&st->touch_st.workq); in at91_adc_touch_data_handler()
1658 AT91_SAMA5D2_TRGR_TRGPER(st->touch_st.sample_period_val)); in at91_adc_pen_detect_interrupt()
1659 st->touch_st.touching = true; in at91_adc_pen_detect_interrupt()
1670 st->touch_st.touching = false; in at91_adc_no_pen_detect_interrupt()
1683 struct iio_dev *indio_dev = st->indio_dev; in at91_adc_workq_handler()
1685 iio_push_to_buffers(indio_dev, st->buffer); in at91_adc_workq_handler()
1709 /* periodic trigger IRQ - during pen sense */ in at91_adc_interrupt()
1723 iio_trigger_poll(indio->trig); in at91_adc_interrupt()
1724 } else if (iio_buffer_enabled(indio) && st->dma_st.dma_chan) { in at91_adc_interrupt()
1725 /* triggered buffer with DMA - should not happen */ in at91_adc_interrupt()
1730 st->conversion_value = at91_adc_read_chan(st, st->chan->address); in at91_adc_interrupt()
1731 st->conversion_done = true; in at91_adc_interrupt()
1732 wake_up_interruptible(&st->wq_data_available); in at91_adc_interrupt()
1737 /* This needs to be called with direct mode claimed and st->lock locked. */
1745 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_read_info_raw()
1753 if (chan->type == IIO_POSITIONRELATIVE) { in at91_adc_read_info_raw()
1754 ret = at91_adc_read_position(st, chan->channel, in at91_adc_read_info_raw()
1762 if (chan->type == IIO_PRESSURE) { in at91_adc_read_info_raw()
1763 ret = at91_adc_read_pressure(st, chan->channel, in at91_adc_read_info_raw()
1774 st->chan = chan; in at91_adc_read_info_raw()
1777 at91_adc_writel(st, CHER, BIT(chan->channel)); in at91_adc_read_info_raw()
1780 * of the channels are enabled and TEMPMR.TEMPON = 1 will in at91_adc_read_info_raw()
1783 if (chan->type == IIO_TEMP) in at91_adc_read_info_raw()
1785 at91_adc_eoc_ena(st, chan->channel); in at91_adc_read_info_raw()
1788 ret = wait_event_interruptible_timeout(st->wq_data_available, in at91_adc_read_info_raw()
1789 st->conversion_done, in at91_adc_read_info_raw()
1792 ret = -ETIMEDOUT; in at91_adc_read_info_raw()
1795 *val = st->conversion_value; in at91_adc_read_info_raw()
1797 if (chan->scan_type.sign == 's') in at91_adc_read_info_raw()
1799 chan->scan_type.realbits - 1); in at91_adc_read_info_raw()
1800 st->conversion_done = false; in at91_adc_read_info_raw()
1803 at91_adc_eoc_dis(st, st->chan->channel); in at91_adc_read_info_raw()
1804 if (chan->type == IIO_TEMP) in at91_adc_read_info_raw()
1806 at91_adc_writel(st, CHDR, BIT(chan->channel)); in at91_adc_read_info_raw()
1812 pm_runtime_mark_last_busy(st->dev); in at91_adc_read_info_raw()
1813 pm_runtime_put_autosuspend(st->dev); in at91_adc_read_info_raw()
1822 guard(mutex)(&st->lock); in at91_adc_read_info_locked()
1844 st->temp_st.saved_sample_rate = st->current_sample_rate; in at91_adc_temp_sensor_configure()
1845 st->temp_st.saved_oversampling = st->oversampling_ratio; in at91_adc_temp_sensor_configure()
1848 sample_rate = st->temp_st.saved_sample_rate; in at91_adc_temp_sensor_configure()
1849 oversampling_ratio = st->temp_st.saved_oversampling; in at91_adc_temp_sensor_configure()
1850 startup_time = st->soc_info.startup_time; in at91_adc_temp_sensor_configure()
1855 at91_adc_setup_samp_freq(st->indio_dev, sample_rate, startup_time, in at91_adc_temp_sensor_configure()
1864 struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb; in at91_adc_read_temp()
1869 guard(mutex)(&st->lock); in at91_adc_read_temp()
1871 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_read_temp()
1893 pm_runtime_mark_last_busy(st->dev); in at91_adc_read_temp()
1894 pm_runtime_put_autosuspend(st->dev); in at91_adc_read_temp()
1899 * Temp[milli] = p1[milli] + (vtemp * clb->p6 - clb->p4 * vbg)/ in at91_adc_read_temp()
1902 div1 = DIV_ROUND_CLOSEST_ULL(((u64)vtemp * clb->p6), vbg); in at91_adc_read_temp()
1904 div2 = DIV_ROUND_CLOSEST_ULL((u64)clb->p4, AT91_ADC_TS_VTEMP_DT); in at91_adc_read_temp()
1906 *val = clb->p1 + (int)div1 - (int)div2; in at91_adc_read_temp()
1921 return -EBUSY; in at91_adc_read_raw()
1928 *val = st->vref_uv / 1000; in at91_adc_read_raw()
1929 if (chan->differential) in at91_adc_read_raw()
1931 *val2 = chan->scan_type.realbits; in at91_adc_read_raw()
1935 if (chan->type != IIO_TEMP) in at91_adc_read_raw()
1936 return -EINVAL; in at91_adc_read_raw()
1938 return -EBUSY; in at91_adc_read_raw()
1950 *val = st->oversampling_ratio; in at91_adc_read_raw()
1954 return -EINVAL; in at91_adc_read_raw()
1968 if (val == st->oversampling_ratio) in at91_adc_write_raw()
1972 return -EBUSY; in at91_adc_write_raw()
1973 mutex_lock(&st->lock); in at91_adc_write_raw()
1976 mutex_unlock(&st->lock); in at91_adc_write_raw()
1980 if (val < st->soc_info.min_sample_rate || in at91_adc_write_raw()
1981 val > st->soc_info.max_sample_rate) in at91_adc_write_raw()
1982 return -EINVAL; in at91_adc_write_raw()
1985 return -EBUSY; in at91_adc_write_raw()
1986 mutex_lock(&st->lock); in at91_adc_write_raw()
1988 st->soc_info.startup_time, 0); in at91_adc_write_raw()
1989 mutex_unlock(&st->lock); in at91_adc_write_raw()
1993 return -EINVAL; in at91_adc_write_raw()
2006 *vals = (int *)st->soc_info.platform->oversampling_avail; in at91_adc_read_avail()
2008 *length = st->soc_info.platform->oversampling_avail_no; in at91_adc_read_avail()
2011 return -EINVAL; in at91_adc_read_avail()
2017 struct device *dev = &st->indio_dev->dev; in at91_adc_dma_init()
2020 unsigned int sample_size = st->soc_info.platform->nr_channels * 2; in at91_adc_dma_init()
2029 if (st->dma_st.dma_chan) in at91_adc_dma_init()
2032 st->dma_st.dma_chan = dma_request_chan(dev, "rx"); in at91_adc_dma_init()
2033 if (IS_ERR(st->dma_st.dma_chan)) { in at91_adc_dma_init()
2035 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
2039 st->dma_st.rx_buf = dma_alloc_coherent(st->dma_st.dma_chan->device->dev, in at91_adc_dma_init()
2041 &st->dma_st.rx_dma_buf, in at91_adc_dma_init()
2043 if (!st->dma_st.rx_buf) { in at91_adc_dma_init()
2050 config.src_addr = (phys_addr_t)(st->dma_st.phys_addr in at91_adc_dma_init()
2051 + st->soc_info.platform->layout->LCDR); in at91_adc_dma_init()
2056 if (dmaengine_slave_config(st->dma_st.dma_chan, &config)) { in at91_adc_dma_init()
2062 dma_chan_name(st->dma_st.dma_chan)); in at91_adc_dma_init()
2067 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_init()
2068 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_init()
2070 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_init()
2071 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
2078 struct device *dev = &st->indio_dev->dev; in at91_adc_dma_disable()
2080 unsigned int sample_size = st->soc_info.platform->nr_channels * 2; in at91_adc_dma_disable()
2085 if (!st->dma_st.dma_chan) in at91_adc_dma_disable()
2089 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_dma_disable()
2091 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_disable()
2092 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_disable()
2093 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_disable()
2094 st->dma_st.dma_chan = NULL; in at91_adc_dma_disable()
2107 if (!st->selected_trig->hw_trig) { in at91_adc_set_watermark()
2108 dev_dbg(&indio_dev->dev, "we need hw trigger for DMA\n"); in at91_adc_set_watermark()
2112 dev_dbg(&indio_dev->dev, "new watermark is %u\n", val); in at91_adc_set_watermark()
2113 st->dma_st.watermark = val; in at91_adc_set_watermark()
2142 if (bitmap_subset(scan_mask, &st->touch_st.channels_bitmask, in at91_adc_update_scan_mode()
2143 st->soc_info.platform->max_index + 1)) in at91_adc_update_scan_mode()
2147 * channels, then we are not fine in at91_adc_update_scan_mode()
2149 if (bitmap_intersects(&st->touch_st.channels_bitmask, scan_mask, in at91_adc_update_scan_mode()
2150 st->soc_info.platform->max_index + 1)) in at91_adc_update_scan_mode()
2151 return -EINVAL; in at91_adc_update_scan_mode()
2160 if (st->soc_info.platform->layout->EOC_IDR) in at91_adc_hw_init()
2170 at91_adc_setup_samp_freq(indio_dev, st->soc_info.min_sample_rate, in at91_adc_hw_init()
2171 st->soc_info.startup_time, 0); in at91_adc_hw_init()
2174 at91_adc_config_emr(st, st->oversampling_ratio, 0); in at91_adc_hw_init()
2183 return sysfs_emit(buf, "%d\n", !!st->dma_st.dma_chan); in at91_adc_get_fifo_state()
2192 return sysfs_emit(buf, "%d\n", st->dma_st.watermark); in at91_adc_get_watermark()
2227 if (st->selected_trig->hw_trig) in at91_adc_buffer_and_trigger_init()
2232 ret = devm_iio_triggered_buffer_setup_ext(&indio->dev, indio, in at91_adc_buffer_and_trigger_init()
2240 if (!st->selected_trig->hw_trig) in at91_adc_buffer_and_trigger_init()
2243 st->trig = at91_adc_allocate_trigger(indio, st->selected_trig->name); in at91_adc_buffer_and_trigger_init()
2244 if (IS_ERR(st->trig)) { in at91_adc_buffer_and_trigger_init()
2246 return PTR_ERR(st->trig); in at91_adc_buffer_and_trigger_init()
2253 st->dma_st.watermark = 1; in at91_adc_buffer_and_trigger_init()
2261 struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb; in at91_adc_temp_sensor_init()
2267 if (!st->soc_info.platform->temp_sensor) in at91_adc_temp_sensor_init()
2274 if (ret != -ENOENT) in at91_adc_temp_sensor_init()
2286 ret = -EINVAL; in at91_adc_temp_sensor_init()
2291 clb->p1 = buf[AT91_ADC_TS_CLB_IDX_P1]; in at91_adc_temp_sensor_init()
2292 clb->p4 = buf[AT91_ADC_TS_CLB_IDX_P4]; in at91_adc_temp_sensor_init()
2293 clb->p6 = buf[AT91_ADC_TS_CLB_IDX_P6]; in at91_adc_temp_sensor_init()
2298 clb->p1 = clb->p1 * 1000; in at91_adc_temp_sensor_init()
2307 struct device *dev = &pdev->dev; in at91_adc_probe()
2314 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); in at91_adc_probe()
2316 return -ENOMEM; in at91_adc_probe()
2319 st->indio_dev = indio_dev; in at91_adc_probe()
2321 st->soc_info.platform = device_get_match_data(dev); in at91_adc_probe()
2323 ret = at91_adc_temp_sensor_init(st, &pdev->dev); in at91_adc_probe()
2326 num_channels = st->soc_info.platform->max_channels - 1; in at91_adc_probe()
2328 num_channels = st->soc_info.platform->max_channels; in at91_adc_probe()
2330 indio_dev->name = dev_name(&pdev->dev); in at91_adc_probe()
2331 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; in at91_adc_probe()
2332 indio_dev->info = &at91_adc_info; in at91_adc_probe()
2333 indio_dev->channels = *st->soc_info.platform->adc_channels; in at91_adc_probe()
2334 indio_dev->num_channels = num_channels; in at91_adc_probe()
2336 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
2337 st->soc_info.platform->touch_chan_x, 1); in at91_adc_probe()
2338 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
2339 st->soc_info.platform->touch_chan_y, 1); in at91_adc_probe()
2340 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
2341 st->soc_info.platform->touch_chan_p, 1); in at91_adc_probe()
2343 st->oversampling_ratio = 1; in at91_adc_probe()
2345 ret = device_property_read_u32(dev, "atmel,min-sample-rate-hz", in at91_adc_probe()
2346 &st->soc_info.min_sample_rate); in at91_adc_probe()
2348 dev_err(&pdev->dev, in at91_adc_probe()
2349 "invalid or missing value for atmel,min-sample-rate-hz\n"); in at91_adc_probe()
2353 ret = device_property_read_u32(dev, "atmel,max-sample-rate-hz", in at91_adc_probe()
2354 &st->soc_info.max_sample_rate); in at91_adc_probe()
2356 dev_err(&pdev->dev, in at91_adc_probe()
2357 "invalid or missing value for atmel,max-sample-rate-hz\n"); in at91_adc_probe()
2361 ret = device_property_read_u32(dev, "atmel,startup-time-ms", in at91_adc_probe()
2362 &st->soc_info.startup_time); in at91_adc_probe()
2364 dev_err(&pdev->dev, in at91_adc_probe()
2365 "invalid or missing value for atmel,startup-time-ms\n"); in at91_adc_probe()
2369 ret = device_property_read_u32(dev, "atmel,trigger-edge-type", in at91_adc_probe()
2372 dev_dbg(&pdev->dev, in at91_adc_probe()
2373 "atmel,trigger-edge-type not specified, only software trigger available\n"); in at91_adc_probe()
2376 st->selected_trig = NULL; in at91_adc_probe()
2379 for (i = 0; i < st->soc_info.platform->hw_trig_cnt + 1; i++) in at91_adc_probe()
2381 st->selected_trig = &at91_adc_trigger_list[i]; in at91_adc_probe()
2385 if (!st->selected_trig) { in at91_adc_probe()
2386 dev_err(&pdev->dev, "invalid external trigger edge value\n"); in at91_adc_probe()
2387 return -EINVAL; in at91_adc_probe()
2390 init_waitqueue_head(&st->wq_data_available); in at91_adc_probe()
2391 mutex_init(&st->lock); in at91_adc_probe()
2392 INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler); in at91_adc_probe()
2394 st->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in at91_adc_probe()
2395 if (IS_ERR(st->base)) in at91_adc_probe()
2396 return PTR_ERR(st->base); in at91_adc_probe()
2399 st->dma_st.phys_addr = res->start; in at91_adc_probe()
2401 st->irq = platform_get_irq(pdev, 0); in at91_adc_probe()
2402 if (st->irq < 0) in at91_adc_probe()
2403 return st->irq; in at91_adc_probe()
2405 st->per_clk = devm_clk_get(&pdev->dev, "adc_clk"); in at91_adc_probe()
2406 if (IS_ERR(st->per_clk)) in at91_adc_probe()
2407 return PTR_ERR(st->per_clk); in at91_adc_probe()
2409 st->reg = devm_regulator_get(&pdev->dev, "vddana"); in at91_adc_probe()
2410 if (IS_ERR(st->reg)) in at91_adc_probe()
2411 return PTR_ERR(st->reg); in at91_adc_probe()
2413 st->vref = devm_regulator_get(&pdev->dev, "vref"); in at91_adc_probe()
2414 if (IS_ERR(st->vref)) in at91_adc_probe()
2415 return PTR_ERR(st->vref); in at91_adc_probe()
2417 ret = devm_request_irq(&pdev->dev, st->irq, at91_adc_interrupt, 0, in at91_adc_probe()
2418 pdev->dev.driver->name, indio_dev); in at91_adc_probe()
2422 ret = regulator_enable(st->reg); in at91_adc_probe()
2426 ret = regulator_enable(st->vref); in at91_adc_probe()
2430 st->vref_uv = regulator_get_voltage(st->vref); in at91_adc_probe()
2431 if (st->vref_uv <= 0) { in at91_adc_probe()
2432 ret = -EINVAL; in at91_adc_probe()
2436 ret = clk_prepare_enable(st->per_clk); in at91_adc_probe()
2441 st->dev = &pdev->dev; in at91_adc_probe()
2442 pm_runtime_set_autosuspend_delay(st->dev, 500); in at91_adc_probe()
2443 pm_runtime_use_autosuspend(st->dev); in at91_adc_probe()
2444 pm_runtime_set_active(st->dev); in at91_adc_probe()
2445 pm_runtime_enable(st->dev); in at91_adc_probe()
2446 pm_runtime_get_noresume(st->dev); in at91_adc_probe()
2450 ret = at91_adc_buffer_and_trigger_init(&pdev->dev, indio_dev); in at91_adc_probe()
2454 if (dma_coerce_mask_and_coherent(&indio_dev->dev, DMA_BIT_MASK(32))) in at91_adc_probe()
2455 dev_info(&pdev->dev, "cannot set DMA mask to 32-bit\n"); in at91_adc_probe()
2461 if (st->selected_trig->hw_trig) in at91_adc_probe()
2462 dev_info(&pdev->dev, "setting up trigger as %s\n", in at91_adc_probe()
2463 st->selected_trig->name); in at91_adc_probe()
2465 dev_info(&pdev->dev, "version: %x\n", in at91_adc_probe()
2466 readl_relaxed(st->base + st->soc_info.platform->layout->VERSION)); in at91_adc_probe()
2468 pm_runtime_mark_last_busy(st->dev); in at91_adc_probe()
2469 pm_runtime_put_autosuspend(st->dev); in at91_adc_probe()
2476 pm_runtime_put_noidle(st->dev); in at91_adc_probe()
2477 pm_runtime_disable(st->dev); in at91_adc_probe()
2478 pm_runtime_set_suspended(st->dev); in at91_adc_probe()
2479 pm_runtime_dont_use_autosuspend(st->dev); in at91_adc_probe()
2480 clk_disable_unprepare(st->per_clk); in at91_adc_probe()
2482 regulator_disable(st->vref); in at91_adc_probe()
2484 regulator_disable(st->reg); in at91_adc_probe()
2497 pm_runtime_disable(st->dev); in at91_adc_remove()
2498 pm_runtime_set_suspended(st->dev); in at91_adc_remove()
2499 clk_disable_unprepare(st->per_clk); in at91_adc_remove()
2501 regulator_disable(st->vref); in at91_adc_remove()
2502 regulator_disable(st->reg); in at91_adc_remove()
2511 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_suspend()
2519 * Do a sofware reset of the ADC before we go to suspend. in at91_adc_suspend()
2520 * this will ensure that all pins are free from being muxed by the ADC in at91_adc_suspend()
2522 * Otherwise, ADC will hog them and we can't go to suspend mode. in at91_adc_suspend()
2526 pm_runtime_mark_last_busy(st->dev); in at91_adc_suspend()
2527 pm_runtime_put_noidle(st->dev); in at91_adc_suspend()
2528 clk_disable_unprepare(st->per_clk); in at91_adc_suspend()
2529 regulator_disable(st->vref); in at91_adc_suspend()
2530 regulator_disable(st->reg); in at91_adc_suspend()
2545 ret = regulator_enable(st->reg); in at91_adc_resume()
2549 ret = regulator_enable(st->vref); in at91_adc_resume()
2553 ret = clk_prepare_enable(st->per_clk); in at91_adc_resume()
2557 pm_runtime_get_noresume(st->dev); in at91_adc_resume()
2570 pm_runtime_mark_last_busy(st->dev); in at91_adc_resume()
2571 pm_runtime_put_autosuspend(st->dev); in at91_adc_resume()
2576 pm_runtime_mark_last_busy(st->dev); in at91_adc_resume()
2577 pm_runtime_put_noidle(st->dev); in at91_adc_resume()
2578 clk_disable_unprepare(st->per_clk); in at91_adc_resume()
2580 regulator_disable(st->vref); in at91_adc_resume()
2582 regulator_disable(st->reg); in at91_adc_resume()
2584 dev_err(&indio_dev->dev, "failed to resume\n"); in at91_adc_resume()
2593 clk_disable(st->per_clk); in at91_adc_runtime_suspend()
2603 return clk_enable(st->per_clk); in at91_adc_runtime_resume()
2614 .compatible = "atmel,sama5d2-adc",
2617 .compatible = "microchip,sama7g5-adc",
2629 .name = "at91-sama5d2_adc",
2638 MODULE_DESCRIPTION("Atmel AT91 SAMA5D2 ADC");