Lines Matching +full:vlogic +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only
9 * ad7380/1 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7380-7381.pdf
10 * ad7383/4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-7384.pdf
11 …* ad7386/7/8 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7386-7387-738…
12 * ad7380-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7380-4.pdf
13 * ad7381-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7381-4.pdf
14 …* ad7383/4-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-4-ad7384…
15 …* ad7386/7/8-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7386-4-7387…
16 * ad7389-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7389-4.pdf
17 * adaq4370-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4370-4.pdf
18 * adaq4380-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4380-4.pdf
19 * adaq4381-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4381-4.pdf
43 #include <linux/iio/buffer-dmaengine.h>
106 #define AD7380_SPI_BYTES(scan_type) ((scan_type)->realbits > 16 ? 4 : 2)
155 /* Extended scan types for 12-bit unsigned chips. */
171 /* Extended scan types for 14-bit signed chips. */
187 /* Extended scan types for 14-bit unsigned chips. */
203 /* Extended scan types for 16-bit signed_chips. */
219 /* Extended scan types for 16-bit unsigned chips. */
240 /* Extended scan types for 12-bit unsigned chips, offload support. */
256 /* Extended scan types for 14-bit signed chips, offload support. */
272 /* Extended scan types for 14-bit unsigned chips, offload support. */
288 /* Extended scan types for 16-bit signed_chips, offload support. */
304 /* Extended scan types for 16-bit unsigned chips, offload support. */
367 * - There is no soft timestamp since everything is done in hardware.
368 * - There is a sampling frequency attribute added. This controls the SPI
370 * - The storagebits value depends on the SPI offload provider. Currently there
372 * which always uses 32-bit words for data values, even for <= 16-bit ADCs.
504 "vcc", "vlogic",
508 "ldo", "vcc", "vlogic", "vs-p", "vs-n", "refin",
534 * export 4 channels and ad7386-4/7-4/8-4 export 8 channels.
537 * (i.e 0-1 or 0-3) and inputs AinX1 correspond to second half (i.e 2-3 or
538 * 4-7). Example for AD7386/7/8 (2 channels parts):
541 * | +----------------------------
544 * voltage0 | AinA0 --|--->| | | |
545 * | | | mux |----->| ADCA |---
546 * voltage2 | AinA1 --|--->| | | |
550 * voltage1 | AinB0 --|--->| | | |
551 * | | | mux |----->| ADCB |---
552 * voltage3 | AinB1 --|--->| | | |
555 * | +----------------------------
712 .name = "ad7380-4",
726 .name = "ad7381-4",
740 .name = "ad7383-4",
756 .name = "ad7384-4",
772 .name = "ad7386-4",
787 .name = "ad7387-4",
802 .name = "ad7388-4",
817 .name = "ad7389-4",
832 .name = "adaq4370-4",
848 .name = "adaq4380-4",
864 .name = "adaq4381-4",
910 * Make the buffer large enough for MAX_NUM_CHANNELS 32-bit samples and
911 * one 64-bit aligned 64-bit timestamp.
927 .tx_buf = &st->tx, in ad7380_regmap_reg_write()
930 st->tx = FIELD_PREP(AD7380_REG_WR, 1) | in ad7380_regmap_reg_write()
934 return spi_sync_transfer(st->spi, &xfer, 1); in ad7380_regmap_reg_write()
946 .tx_buf = &st->tx, in ad7380_regmap_reg_read()
949 .value = st->chip_info->timing_specs->t_csh_ns, in ad7380_regmap_reg_read()
956 .rx_buf = &st->rx, in ad7380_regmap_reg_read()
961 st->tx = FIELD_PREP(AD7380_REG_WR, 0) | in ad7380_regmap_reg_read()
965 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); in ad7380_regmap_reg_read()
969 *val = FIELD_GET(AD7380_REG_DATA, st->rx); in ad7380_regmap_reg_read()
1008 return -EBUSY; in ad7380_debugfs_reg_access()
1011 ret = regmap_read(st->regmap, reg, readval); in ad7380_debugfs_reg_access()
1013 ret = regmap_write(st->regmap, reg, writeval); in ad7380_debugfs_reg_access()
1021 * ad7380_regval_to_osr - convert OSR register value to ratio
1041 ret = regmap_read(st->regmap, AD7380_REG_ADDR_CONFIG1, &tmp); in ad7380_get_osr()
1067 if (st->ch == ch) in ad7380_set_ch()
1074 ret = regmap_update_bits(st->regmap, in ad7380_set_ch()
1082 st->ch = ch; in ad7380_set_ch()
1086 T_CONVERT_X_NS * (oversampling_ratio - 1) * in ad7380_set_ch()
1087 st->chip_info->num_simult_channels / AD7380_NUM_SDO_LINES; in ad7380_set_ch()
1089 return spi_sync_transfer(st->spi, &xfer, 1); in ad7380_set_ch()
1093 * ad7380_update_xfers - update the SPI transfers base on the current scan type
1100 struct spi_transfer *xfer = st->seq ? st->seq_xfer : st->normal_xfer; in ad7380_update_xfers()
1115 (oversampling_ratio - 1) * in ad7380_update_xfers()
1116 st->chip_info->num_simult_channels / AD7380_NUM_SDO_LINES; in ad7380_update_xfers()
1118 if (st->seq) { in ad7380_update_xfers()
1122 scan_type->realbits; in ad7380_update_xfers()
1125 st->chip_info->num_simult_channels; in ad7380_update_xfers()
1136 xfer[1].bits_per_word = scan_type->realbits; in ad7380_update_xfers()
1138 st->chip_info->num_simult_channels; in ad7380_update_xfers()
1154 ret = spi_offload_trigger_validate(st->offload_trigger, &config); in ad7380_set_sample_freq()
1158 st->offload_trigger_hz = config.periodic.frequency_hz; in ad7380_set_sample_freq()
1166 struct spi_transfer *xfer = &st->offload_xfer; in ad7380_init_offload_msg()
1167 struct device *dev = &st->spi->dev; in ad7380_init_offload_msg()
1172 &indio_dev->channels[0]); in ad7380_init_offload_msg()
1176 if (st->chip_info->has_mux) { in ad7380_init_offload_msg()
1185 ret = regmap_set_bits(st->regmap, AD7380_REG_ADDR_CONFIG1, in ad7380_init_offload_msg()
1190 st->seq = true; in ad7380_init_offload_msg()
1198 xfer->bits_per_word = scan_type->realbits; in ad7380_init_offload_msg()
1199 xfer->offload_flags = SPI_OFFLOAD_XFER_RX_STREAM; in ad7380_init_offload_msg()
1200 xfer->len = AD7380_SPI_BYTES(scan_type) * st->chip_info->num_simult_channels; in ad7380_init_offload_msg()
1202 spi_message_init_with_transfers(&st->offload_msg, xfer, 1); in ad7380_init_offload_msg()
1203 st->offload_msg.offload = st->offload; in ad7380_init_offload_msg()
1205 ret = spi_optimize_message(st->spi, &st->offload_msg); in ad7380_init_offload_msg()
1221 .frequency_hz = st->offload_trigger_hz, in ad7380_offload_buffer_postenable()
1230 ret = spi_offload_trigger_enable(st->offload, st->offload_trigger, &config); in ad7380_offload_buffer_postenable()
1232 spi_unoptimize_message(&st->offload_msg); in ad7380_offload_buffer_postenable()
1242 spi_offload_trigger_disable(st->offload, st->offload_trigger); in ad7380_offload_buffer_predisable()
1243 spi_unoptimize_message(&st->offload_msg); in ad7380_offload_buffer_predisable()
1245 if (st->seq) { in ad7380_offload_buffer_predisable()
1246 ret = regmap_update_bits(st->regmap, in ad7380_offload_buffer_predisable()
1253 st->seq = false; in ad7380_offload_buffer_predisable()
1268 struct spi_message *msg = &st->normal_msg; in ad7380_triggered_buffer_preenable()
1275 scan_type = iio_get_current_scan_type(indio_dev, &indio_dev->channels[0]); in ad7380_triggered_buffer_preenable()
1279 if (st->chip_info->has_mux) { in ad7380_triggered_buffer_preenable()
1295 ret = regmap_update_bits(st->regmap, in ad7380_triggered_buffer_preenable()
1301 msg = &st->seq_msg; in ad7380_triggered_buffer_preenable()
1302 st->seq = true; in ad7380_triggered_buffer_preenable()
1315 return spi_optimize_message(st->spi, msg); in ad7380_triggered_buffer_preenable()
1321 struct spi_message *msg = &st->normal_msg; in ad7380_triggered_buffer_postdisable()
1324 if (st->seq) { in ad7380_triggered_buffer_postdisable()
1325 ret = regmap_update_bits(st->regmap, in ad7380_triggered_buffer_postdisable()
1332 msg = &st->seq_msg; in ad7380_triggered_buffer_postdisable()
1333 st->seq = false; in ad7380_triggered_buffer_postdisable()
1349 struct iio_dev *indio_dev = pf->indio_dev; in ad7380_trigger_handler()
1351 struct spi_message *msg = st->seq ? &st->seq_msg : &st->normal_msg; in ad7380_trigger_handler()
1354 ret = spi_sync(st->spi, msg); in ad7380_trigger_handler()
1358 iio_push_to_buffers_with_ts(indio_dev, &st->scan_data, sizeof(st->scan_data), in ad7380_trigger_handler()
1359 pf->timestamp); in ad7380_trigger_handler()
1362 iio_trigger_notify_done(indio_dev->trig); in ad7380_trigger_handler()
1373 if (st->chip_info->has_mux) { in ad7380_read_direct()
1376 if (index >= st->chip_info->num_simult_channels) { in ad7380_read_direct()
1377 index -= st->chip_info->num_simult_channels; in ad7380_read_direct()
1390 ret = spi_sync(st->spi, &st->normal_msg); in ad7380_read_direct()
1394 if (scan_type->realbits > 16) { in ad7380_read_direct()
1395 if (scan_type->sign == 's') in ad7380_read_direct()
1396 *val = sign_extend32(*(u32 *)(st->scan_data + 4 * index), in ad7380_read_direct()
1397 scan_type->realbits - 1); in ad7380_read_direct()
1399 *val = *(u32 *)(st->scan_data + 4 * index) & in ad7380_read_direct()
1400 GENMASK(scan_type->realbits - 1, 0); in ad7380_read_direct()
1402 if (scan_type->sign == 's') in ad7380_read_direct()
1403 *val = sign_extend32(*(u16 *)(st->scan_data + 2 * index), in ad7380_read_direct()
1404 scan_type->realbits - 1); in ad7380_read_direct()
1406 *val = *(u16 *)(st->scan_data + 2 * index) & in ad7380_read_direct()
1407 GENMASK(scan_type->realbits - 1, 0); in ad7380_read_direct()
1429 return -EBUSY; in ad7380_read_raw()
1431 ret = ad7380_read_direct(st, chan->scan_index, in ad7380_read_raw()
1441 * * VREF / 2^N, for pseudo-differential chips in ad7380_read_raw()
1447 if (st->chip_info->has_hardware_gain) in ad7380_read_raw()
1448 *val = mult_frac(st->vref_mv, MILLI, in ad7380_read_raw()
1449 st->gain_milli[chan->scan_index]); in ad7380_read_raw()
1451 *val = st->vref_mv; in ad7380_read_raw()
1452 *val2 = scan_type->realbits - chan->differential; in ad7380_read_raw()
1460 *val = st->vcm_mv[chan->channel] * (1 << scan_type->realbits) in ad7380_read_raw()
1461 / st->vref_mv; in ad7380_read_raw()
1466 return -EBUSY; in ad7380_read_raw()
1477 *val = st->offload_trigger_hz; in ad7380_read_raw()
1480 return -EINVAL; in ad7380_read_raw()
1499 *vals = st->sample_freq_range; in ad7380_read_avail()
1503 return -EINVAL; in ad7380_read_avail()
1508 * ad7380_osr_to_regval - convert ratio to OSR register value
1515 * Returns: register value (0 to 7) or -EINVAL if there is not an exact match
1526 return -EINVAL; in ad7380_osr_to_regval()
1540 ret = regmap_update_bits(st->regmap, in ad7380_set_oversampling_ratio()
1549 st->resolution_boost_enabled = boost; in ad7380_set_oversampling_ratio()
1556 ret = regmap_update_bits(st->regmap, in ad7380_set_oversampling_ratio()
1573 return -EINVAL; in ad7380_write_raw()
1577 return -EBUSY; in ad7380_write_raw()
1585 return -EINVAL; in ad7380_write_raw()
1594 return st->resolution_boost_enabled ? AD7380_SCAN_TYPE_RESOLUTION_BOOST in ad7380_get_current_scan_type()
1607 return -EBUSY; in ad7380_read_event_config()
1609 ret = regmap_read(st->regmap, AD7380_REG_ADDR_CONFIG1, &tmp); in ad7380_read_event_config()
1629 return -EBUSY; in ad7380_write_event_config()
1631 ret = regmap_update_bits(st->regmap, in ad7380_write_event_config()
1655 * The register value is 12-bits and is compared to the most significant in ad7380_get_alert_th()
1659 shift = scan_type->realbits - 12; in ad7380_get_alert_th()
1663 ret = regmap_read(st->regmap, in ad7380_get_alert_th()
1672 ret = regmap_read(st->regmap, in ad7380_get_alert_th()
1681 return -EINVAL; in ad7380_get_alert_th()
1697 return -EBUSY; in ad7380_read_event_value()
1704 return -EINVAL; in ad7380_read_event_value()
1720 * 16-bits internal alert high register. LSB are set to 0xf. in ad7380_set_alert_th()
1735 th = val >> (scan_type->realbits - 12); in ad7380_set_alert_th()
1739 return regmap_write(st->regmap, in ad7380_set_alert_th()
1743 return regmap_write(st->regmap, in ad7380_set_alert_th()
1747 return -EINVAL; in ad7380_set_alert_th()
1763 return -EBUSY; in ad7380_write_event_value()
1770 return -EINVAL; in ad7380_write_event_value()
1791 ret = regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG2, in ad7380_init()
1800 ret = regmap_set_bits(st->regmap, AD7380_REG_ADDR_CONFIG1, in ad7380_init()
1807 st->ch = 0; in ad7380_init()
1808 st->seq = false; in ad7380_init()
1810 /* SPI 1-wire mode */ in ad7380_init()
1811 return regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG2, in ad7380_init()
1820 struct spi_device *spi = st->spi; in ad7380_probe_spi_offload()
1821 struct device *dev = &spi->dev; in ad7380_probe_spi_offload()
1825 indio_dev->setup_ops = &ad7380_offload_buffer_setup_ops; in ad7380_probe_spi_offload()
1826 indio_dev->channels = st->chip_info->offload_channels; in ad7380_probe_spi_offload()
1828 indio_dev->num_channels--; in ad7380_probe_spi_offload()
1830 st->offload_trigger = devm_spi_offload_trigger_get(dev, st->offload, in ad7380_probe_spi_offload()
1832 if (IS_ERR(st->offload_trigger)) in ad7380_probe_spi_offload()
1833 return dev_err_probe(dev, PTR_ERR(st->offload_trigger), in ad7380_probe_spi_offload()
1836 sample_rate = st->chip_info->max_conversion_rate_hz * in ad7380_probe_spi_offload()
1837 AD7380_NUM_SDO_LINES / st->chip_info->num_simult_channels; in ad7380_probe_spi_offload()
1839 st->sample_freq_range[0] = 1; /* min */ in ad7380_probe_spi_offload()
1840 st->sample_freq_range[1] = 1; /* step */ in ad7380_probe_spi_offload()
1841 st->sample_freq_range[2] = sample_rate; /* max */ in ad7380_probe_spi_offload()
1851 rx_dma = devm_spi_offload_rx_stream_request_dma_chan(dev, st->offload); in ad7380_probe_spi_offload()
1866 struct device *dev = &spi->dev; in ad7380_probe()
1874 return -ENOMEM; in ad7380_probe()
1877 st->spi = spi; in ad7380_probe()
1878 st->chip_info = spi_get_device_match_data(spi); in ad7380_probe()
1879 if (!st->chip_info) in ad7380_probe()
1880 return dev_err_probe(dev, -EINVAL, "missing match data\n"); in ad7380_probe()
1882 ret = devm_regulator_bulk_get_enable(dev, st->chip_info->num_supplies, in ad7380_probe()
1883 st->chip_info->supplies); in ad7380_probe()
1890 if (st->chip_info->internal_ref_only) { in ad7380_probe()
1893 * require a specific reference supply to power it. in ad7380_probe()
1898 st->vref_mv = st->chip_info->internal_ref_mv; in ad7380_probe()
1902 } else if (st->chip_info->external_ref_only) { in ad7380_probe()
1908 st->vref_mv = ret / 1000; in ad7380_probe()
1914 * If there is no REFIO supply, then it means that we are using in ad7380_probe()
1918 if (ret < 0 && ret != -ENODEV) in ad7380_probe()
1922 external_ref_en = ret != -ENODEV; in ad7380_probe()
1923 st->vref_mv = external_ref_en ? ret / 1000 in ad7380_probe()
1924 : st->chip_info->internal_ref_mv; in ad7380_probe()
1927 if (st->chip_info->num_vcm_supplies > ARRAY_SIZE(st->vcm_mv)) in ad7380_probe()
1928 return dev_err_probe(dev, -EINVAL, in ad7380_probe()
1932 * pseudo-differential chips have common mode supplies for the negative in ad7380_probe()
1935 for (i = 0; i < st->chip_info->num_vcm_supplies; i++) { in ad7380_probe()
1936 const char *vcm = st->chip_info->vcm_supplies[i]; in ad7380_probe()
1944 st->vcm_mv[i] = ret / 1000; in ad7380_probe()
1948 st->gain_milli[i] = AD7380_DEFAULT_GAIN_MILLI; in ad7380_probe()
1950 if (st->chip_info->has_hardware_gain) { in ad7380_probe()
1961 if (channel >= st->chip_info->num_channels - 1) in ad7380_probe()
1962 return dev_err_probe(dev, -EINVAL, in ad7380_probe()
1966 ret = fwnode_property_read_u16(node, "adi,gain-milli", in ad7380_probe()
1968 if (ret && ret != -EINVAL) in ad7380_probe()
1972 if (ret != -EINVAL) { in ad7380_probe()
1979 st->gain_milli[channel] = ad7380_gains[gain_idx]; in ad7380_probe()
1984 st->regmap = devm_regmap_init(dev, NULL, st, &ad7380_regmap_config); in ad7380_probe()
1985 if (IS_ERR(st->regmap)) in ad7380_probe()
1986 return dev_err_probe(dev, PTR_ERR(st->regmap), in ad7380_probe()
1998 * - first, toggle CS (no data xfer) to trigger a conversion in ad7380_probe()
1999 * - then, read data in ad7380_probe()
2001 st->normal_xfer[0].cs_change = 1; in ad7380_probe()
2002 st->normal_xfer[0].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
2003 st->normal_xfer[0].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
2004 st->normal_xfer[1].rx_buf = st->scan_data; in ad7380_probe()
2006 spi_message_init_with_transfers(&st->normal_msg, st->normal_xfer, in ad7380_probe()
2007 ARRAY_SIZE(st->normal_xfer)); in ad7380_probe()
2010 * - CS toggle (no data xfer) to get the right point in the sequence in ad7380_probe()
2011 * - CS toggle (no data xfer) to trigger a conversion of AinX0 and in ad7380_probe()
2013 * - 2 data reads, to read AinX0 and AinX1 in ad7380_probe()
2015 st->seq_xfer[0].cs_change = 1; in ad7380_probe()
2016 st->seq_xfer[0].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
2017 st->seq_xfer[0].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
2018 st->seq_xfer[1].cs_change = 1; in ad7380_probe()
2019 st->seq_xfer[1].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
2020 st->seq_xfer[1].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
2022 st->seq_xfer[2].rx_buf = st->scan_data; in ad7380_probe()
2023 st->seq_xfer[2].cs_change = 1; in ad7380_probe()
2024 st->seq_xfer[2].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
2025 st->seq_xfer[2].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
2027 spi_message_init_with_transfers(&st->seq_msg, st->seq_xfer, in ad7380_probe()
2028 ARRAY_SIZE(st->seq_xfer)); in ad7380_probe()
2030 indio_dev->channels = st->chip_info->channels; in ad7380_probe()
2031 indio_dev->num_channels = st->chip_info->num_channels; in ad7380_probe()
2032 indio_dev->name = st->chip_info->name; in ad7380_probe()
2033 indio_dev->info = &ad7380_info; in ad7380_probe()
2034 indio_dev->modes = INDIO_DIRECT_MODE; in ad7380_probe()
2035 indio_dev->available_scan_masks = st->chip_info->available_scan_masks; in ad7380_probe()
2037 st->offload = devm_spi_offload_get(dev, spi, &ad7380_offload_config); in ad7380_probe()
2038 ret = PTR_ERR_OR_ZERO(st->offload); in ad7380_probe()
2039 if (ret && ret != -ENODEV) in ad7380_probe()
2043 if (ret == -ENODEV) { in ad7380_probe()
2071 { .compatible = "adi,ad7380-4", .data = &ad7380_4_chip_info },
2072 { .compatible = "adi,ad7381-4", .data = &ad7381_4_chip_info },
2073 { .compatible = "adi,ad7383-4", .data = &ad7383_4_chip_info },
2074 { .compatible = "adi,ad7384-4", .data = &ad7384_4_chip_info },
2075 { .compatible = "adi,ad7386-4", .data = &ad7386_4_chip_info },
2076 { .compatible = "adi,ad7387-4", .data = &ad7387_4_chip_info },
2077 { .compatible = "adi,ad7388-4", .data = &ad7388_4_chip_info },
2078 { .compatible = "adi,ad7389-4", .data = &ad7389_4_chip_info },
2079 { .compatible = "adi,adaq4370-4", .data = &adaq4370_4_chip_info },
2080 { .compatible = "adi,adaq4380-4", .data = &adaq4380_4_chip_info },
2081 { .compatible = "adi,adaq4381-4", .data = &adaq4381_4_chip_info },
2093 { "ad7380-4", (kernel_ulong_t)&ad7380_4_chip_info },
2094 { "ad7381-4", (kernel_ulong_t)&ad7381_4_chip_info },
2095 { "ad7383-4", (kernel_ulong_t)&ad7383_4_chip_info },
2096 { "ad7384-4", (kernel_ulong_t)&ad7384_4_chip_info },
2097 { "ad7386-4", (kernel_ulong_t)&ad7386_4_chip_info },
2098 { "ad7387-4", (kernel_ulong_t)&ad7387_4_chip_info },
2099 { "ad7388-4", (kernel_ulong_t)&ad7388_4_chip_info },
2100 { "ad7389-4", (kernel_ulong_t)&ad7389_4_chip_info },
2101 { "adaq4370-4", (kernel_ulong_t)&adaq4370_4_chip_info },
2102 { "adaq4380-4", (kernel_ulong_t)&adaq4380_4_chip_info },
2103 { "adaq4381-4", (kernel_ulong_t)&adaq4381_4_chip_info },