Lines Matching +full:diff +full:- +full:channels
1 // SPDX-License-Identifier: GPL-2.0+
178 struct ad7124_channel *channels; member
207 .name = "ad7124-4",
212 .name = "ad7124-8",
228 diff_new = abs(val - array[i]); in ad7124_find_closest_match()
247 ret = ad_sd_read_reg(&st->sd, addr, bytes, &readval); in ad7124_spi_write_mask()
254 return ad_sd_write_reg(&st->sd, addr, bytes, readval); in ad7124_spi_write_mask()
262 st->adc_control &= ~AD7124_ADC_CTRL_MODE_MSK; in ad7124_set_mode()
263 st->adc_control |= AD7124_ADC_CTRL_MODE(mode); in ad7124_set_mode()
265 return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_set_mode()
272 fclk = clk_get_rate(st->mclk); in ad7124_set_channel_odr()
286 if (odr_sel_bits != st->channels[channel].cfg.odr_sel_bits) in ad7124_set_channel_odr()
287 st->channels[channel].cfg.live = false; in ad7124_set_channel_odr()
290 st->channels[channel].cfg.odr = DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32); in ad7124_set_channel_odr()
291 st->channels[channel].cfg.odr_sel_bits = odr_sel_bits; in ad7124_set_channel_odr()
299 fadc = st->channels[channel].cfg.odr; in ad7124_get_3db_filter_freq()
301 switch (st->channels[channel].cfg.filter_type) { in ad7124_get_3db_filter_freq()
307 return -EINVAL; in ad7124_get_3db_filter_freq()
330 if (new_odr != st->channels[channel].cfg.odr) in ad7124_set_3db_filter_freq()
331 st->channels[channel].cfg.live = false; in ad7124_set_3db_filter_freq()
333 st->channels[channel].cfg.filter_type = new_filter; in ad7124_set_3db_filter_freq()
334 st->channels[channel].cfg.odr = new_odr; in ad7124_set_3db_filter_freq()
345 for (i = 0; i < st->num_channels; i++) { in ad7124_find_similar_live_cfg()
346 cfg_aux = &st->channels[i].cfg; in ad7124_find_similar_live_cfg()
348 if (cfg_aux->live && in ad7124_find_similar_live_cfg()
349 !memcmp(&cfg->config_props, &cfg_aux->config_props, cmp_size)) in ad7124_find_similar_live_cfg()
360 free_cfg_slot = find_first_zero_bit(&st->cfg_slots_status, AD7124_MAX_CONFIGS); in ad7124_find_free_config_slot()
362 return -1; in ad7124_find_free_config_slot()
370 struct device *dev = &st->sd.spi->dev; in ad7124_init_config_vref()
371 unsigned int refsel = cfg->refsel; in ad7124_init_config_vref()
377 if (IS_ERR(st->vref[refsel])) in ad7124_init_config_vref()
378 return dev_err_probe(dev, PTR_ERR(st->vref[refsel]), in ad7124_init_config_vref()
382 cfg->vref_mv = regulator_get_voltage(st->vref[refsel]); in ad7124_init_config_vref()
384 cfg->vref_mv /= 1000; in ad7124_init_config_vref()
387 cfg->vref_mv = 2500; in ad7124_init_config_vref()
388 st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK; in ad7124_init_config_vref()
389 st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); in ad7124_init_config_vref()
392 return dev_err_probe(dev, -EINVAL, "Invalid reference %d\n", refsel); in ad7124_init_config_vref()
403 cfg->cfg_slot = cfg_slot; in ad7124_write_config()
405 tmp = (cfg->buf_positive << 1) + cfg->buf_negative; in ad7124_write_config()
406 val = AD7124_CONFIG_BIPOLAR(cfg->bipolar) | AD7124_CONFIG_REF_SEL(cfg->refsel) | in ad7124_write_config()
407 AD7124_CONFIG_IN_BUFF(tmp) | AD7124_CONFIG_PGA(cfg->pga_bits); in ad7124_write_config()
409 ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(cfg->cfg_slot), 2, val); in ad7124_write_config()
413 tmp = AD7124_FILTER_TYPE_SEL(cfg->filter_type) | in ad7124_write_config()
414 AD7124_FILTER_FS(cfg->odr_sel_bits); in ad7124_write_config()
415 return ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), in ad7124_write_config()
431 ret = kfifo_get(&st->live_cfgs_fifo, &lru_cfg); in ad7124_pop_config()
435 lru_cfg->live = false; in ad7124_pop_config()
438 assign_bit(lru_cfg->cfg_slot, &st->cfg_slots_status, 0); in ad7124_pop_config()
441 for (i = 0; i < st->num_channels; i++) { in ad7124_pop_config()
442 cfg = &st->channels[i].cfg; in ad7124_pop_config()
444 if (cfg->cfg_slot == lru_cfg->cfg_slot) in ad7124_pop_config()
445 cfg->live = false; in ad7124_pop_config()
459 kfifo_put(&st->live_cfgs_fifo, cfg); in ad7124_push_config()
464 return -EINVAL; in ad7124_push_config()
467 free_cfg_slot = lru_cfg->cfg_slot; in ad7124_push_config()
468 kfifo_put(&st->live_cfgs_fifo, cfg); in ad7124_push_config()
472 assign_bit(free_cfg_slot, &st->cfg_slots_status, 1); in ad7124_push_config()
479 ch->cfg.live = true; in ad7124_enable_channel()
480 return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(ch->nr), 2, ch->ain | in ad7124_enable_channel()
481 AD7124_CHANNEL_SETUP(ch->cfg.cfg_slot) | AD7124_CHANNEL_EN(1)); in ad7124_enable_channel()
486 struct ad7124_channel_config *cfg = &st->channels[address].cfg; in ad7124_prepare_read()
493 if (!cfg->live) { in ad7124_prepare_read()
499 cfg->cfg_slot = live_cfg->cfg_slot; in ad7124_prepare_read()
503 return ad7124_enable_channel(st, &st->channels[address]); in ad7124_prepare_read()
518 mutex_lock(&st->cfgs_lock); in ad7124_set_channel()
520 mutex_unlock(&st->cfgs_lock); in ad7124_set_channel()
528 unsigned int adc_control = st->adc_control; in ad7124_append_status()
534 ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, adc_control); in ad7124_append_status()
538 st->adc_control = adc_control; in ad7124_append_status()
549 for (i = 0; i < st->num_channels; i++) { in ad7124_disable_all()
596 switch (chan->type) { in ad7124_read_raw()
598 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
600 idx = st->channels[chan->address].cfg.pga_bits; in ad7124_read_raw()
601 *val = st->channels[chan->address].cfg.vref_mv; in ad7124_read_raw()
602 if (st->channels[chan->address].cfg.bipolar) in ad7124_read_raw()
603 *val2 = chan->scan_type.realbits - 1 + idx; in ad7124_read_raw()
605 *val2 = chan->scan_type.realbits + idx; in ad7124_read_raw()
607 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
615 * = (Conversion − 0x800000 - 13584 * 272.5) / 13584 in ad7124_read_raw()
625 return -EINVAL; in ad7124_read_raw()
629 switch (chan->type) { in ad7124_read_raw()
631 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
632 if (st->channels[chan->address].cfg.bipolar) in ad7124_read_raw()
633 *val = -(1 << (chan->scan_type.realbits - 1)); in ad7124_read_raw()
637 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
642 *val = -12090248; in ad7124_read_raw()
646 return -EINVAL; in ad7124_read_raw()
650 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
651 *val = st->channels[chan->address].cfg.odr; in ad7124_read_raw()
652 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
656 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
657 *val = ad7124_get_3db_filter_freq(st, chan->scan_index); in ad7124_read_raw()
658 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
662 return -EINVAL; in ad7124_read_raw()
674 mutex_lock(&st->cfgs_lock); in ad7124_write_raw()
679 ret = -EINVAL; in ad7124_write_raw()
683 ad7124_set_channel_odr(st, chan->address, val); in ad7124_write_raw()
687 ret = -EINVAL; in ad7124_write_raw()
691 if (st->channels[chan->address].cfg.bipolar) in ad7124_write_raw()
692 full_scale = 1 << (chan->scan_type.realbits - 1); in ad7124_write_raw()
694 full_scale = 1 << chan->scan_type.realbits; in ad7124_write_raw()
696 vref = st->channels[chan->address].cfg.vref_mv * 1000000LL; in ad7124_write_raw()
701 if (st->channels[chan->address].cfg.pga_bits != res) in ad7124_write_raw()
702 st->channels[chan->address].cfg.live = false; in ad7124_write_raw()
704 st->channels[chan->address].cfg.pga_bits = res; in ad7124_write_raw()
708 ret = -EINVAL; in ad7124_write_raw()
712 ad7124_set_3db_filter_freq(st, chan->address, val); in ad7124_write_raw()
715 ret = -EINVAL; in ad7124_write_raw()
718 mutex_unlock(&st->cfgs_lock); in ad7124_write_raw()
731 return -EINVAL; in ad7124_reg_access()
734 ret = ad_sd_read_reg(&st->sd, reg, ad7124_reg_size[reg], in ad7124_reg_access()
737 ret = ad_sd_write_reg(&st->sd, reg, ad7124_reg_size[reg], in ad7124_reg_access()
763 mutex_lock(&st->cfgs_lock); in ad7124_update_scan_mode()
764 for (i = 0; i < st->num_channels; i++) { in ad7124_update_scan_mode()
767 ret = __ad7124_set_channel(&st->sd, i); in ad7124_update_scan_mode()
772 mutex_unlock(&st->cfgs_lock); in ad7124_update_scan_mode()
778 mutex_unlock(&st->cfgs_lock); in ad7124_update_scan_mode()
795 struct device *dev = &st->sd.spi->dev; in ad7124_soft_reset()
799 ret = ad_sd_reset(&st->sd); in ad7124_soft_reset()
806 ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval); in ad7124_soft_reset()
815 } while (--timeout); in ad7124_soft_reset()
817 return dev_err_probe(dev, -EIO, "Soft reset failed\n"); in ad7124_soft_reset()
822 struct device *dev = &st->sd.spi->dev; in ad7124_check_chip_id()
826 ret = ad_sd_read_reg(&st->sd, AD7124_ID, 1, &readval); in ad7124_check_chip_id()
833 if (chip_id != st->chip_info->chip_id) in ad7124_check_chip_id()
834 return dev_err_probe(dev, -ENODEV, in ad7124_check_chip_id()
836 st->chip_info->chip_id, chip_id); in ad7124_check_chip_id()
839 return dev_err_probe(dev, -ENODEV, in ad7124_check_chip_id()
846 * Input specifiers 8 - 15 are explicitly reserved for ad7124-4
847 * while they are fine for ad7124-8. Values above 31 don't fit
852 if (ain >= info->num_inputs && ain < 16) in ad7124_valid_input_select()
863 struct ad7124_channel *channels; in ad7124_parse_channel_config() local
874 * channels to not treat CONFIG_0 (i.e. the register following in ad7124_parse_channel_config()
879 return dev_err_probe(dev, -EINVAL, "Too many channels defined\n"); in ad7124_parse_channel_config()
882 st->num_channels = min(num_channels + 1, AD7124_MAX_CHANNELS); in ad7124_parse_channel_config()
884 chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, in ad7124_parse_channel_config()
887 return -ENOMEM; in ad7124_parse_channel_config()
889 channels = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*channels), in ad7124_parse_channel_config()
891 if (!channels) in ad7124_parse_channel_config()
892 return -ENOMEM; in ad7124_parse_channel_config()
894 indio_dev->channels = chan; in ad7124_parse_channel_config()
895 indio_dev->num_channels = st->num_channels; in ad7124_parse_channel_config()
896 st->channels = channels; in ad7124_parse_channel_config()
905 return dev_err_probe(dev, -EINVAL, in ad7124_parse_channel_config()
906 "Channel index >= number of channels in %pfwP\n", child); in ad7124_parse_channel_config()
908 ret = fwnode_property_read_u32_array(child, "diff-channels", in ad7124_parse_channel_config()
912 "Failed to parse diff-channels property of %pfwP\n", child); in ad7124_parse_channel_config()
914 if (!ad7124_valid_input_select(ain[0], st->chip_info) || in ad7124_parse_channel_config()
915 !ad7124_valid_input_select(ain[1], st->chip_info)) in ad7124_parse_channel_config()
916 return dev_err_probe(dev, -EINVAL, in ad7124_parse_channel_config()
917 "diff-channels property of %pfwP contains invalid data\n", child); in ad7124_parse_channel_config()
919 st->channels[channel].nr = channel; in ad7124_parse_channel_config()
920 st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) | in ad7124_parse_channel_config()
923 cfg = &st->channels[channel].cfg; in ad7124_parse_channel_config()
924 cfg->bipolar = fwnode_property_read_bool(child, "bipolar"); in ad7124_parse_channel_config()
926 ret = fwnode_property_read_u32(child, "adi,reference-select", &tmp); in ad7124_parse_channel_config()
928 cfg->refsel = AD7124_INT_REF; in ad7124_parse_channel_config()
930 cfg->refsel = tmp; in ad7124_parse_channel_config()
932 cfg->buf_positive = in ad7124_parse_channel_config()
933 fwnode_property_read_bool(child, "adi,buffered-positive"); in ad7124_parse_channel_config()
934 cfg->buf_negative = in ad7124_parse_channel_config()
935 fwnode_property_read_bool(child, "adi,buffered-negative"); in ad7124_parse_channel_config()
945 st->channels[num_channels] = (struct ad7124_channel) { in ad7124_parse_channel_config()
980 struct device *dev = &st->sd.spi->dev; in ad7124_setup()
984 fclk = clk_get_rate(st->mclk); in ad7124_setup()
986 return dev_err_probe(dev, -EINVAL, "Failed to get mclk rate\n"); in ad7124_setup()
993 ret = clk_set_rate(st->mclk, fclk); in ad7124_setup()
999 st->adc_control &= ~AD7124_ADC_CTRL_PWR_MSK; in ad7124_setup()
1000 st->adc_control |= AD7124_ADC_CTRL_PWR(power_mode); in ad7124_setup()
1002 st->adc_control &= ~AD7124_ADC_CTRL_MODE_MSK; in ad7124_setup()
1003 st->adc_control |= AD7124_ADC_CTRL_MODE(AD_SD_MODE_IDLE); in ad7124_setup()
1005 mutex_init(&st->cfgs_lock); in ad7124_setup()
1006 INIT_KFIFO(st->live_cfgs_fifo); in ad7124_setup()
1007 for (i = 0; i < st->num_channels; i++) { in ad7124_setup()
1009 ret = ad7124_init_config_vref(st, &st->channels[i].cfg); in ad7124_setup()
1016 * set all channels to this default value. in ad7124_setup()
1020 /* Disable all channels to prevent unintended conversions. */ in ad7124_setup()
1021 ad_sd_write_reg(&st->sd, AD7124_CHANNEL(i), 2, 0); in ad7124_setup()
1024 ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_setup()
1039 struct device *dev = &spi->dev; in ad7124_probe()
1046 return dev_err_probe(dev, -ENODEV, "Failed to get match data\n"); in ad7124_probe()
1048 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in ad7124_probe()
1050 return -ENOMEM; in ad7124_probe()
1054 st->chip_info = info; in ad7124_probe()
1056 indio_dev->name = st->chip_info->name; in ad7124_probe()
1057 indio_dev->modes = INDIO_DIRECT_MODE; in ad7124_probe()
1058 indio_dev->info = &ad7124_info; in ad7124_probe()
1060 ret = ad_sd_init(&st->sd, indio_dev, spi, &ad7124_sigma_delta_info); in ad7124_probe()
1064 ret = ad7124_parse_channel_config(indio_dev, &spi->dev); in ad7124_probe()
1068 for (i = 0; i < ARRAY_SIZE(st->vref); i++) { in ad7124_probe()
1072 st->vref[i] = devm_regulator_get_optional(&spi->dev, in ad7124_probe()
1074 if (PTR_ERR(st->vref[i]) == -ENODEV) in ad7124_probe()
1076 else if (IS_ERR(st->vref[i])) in ad7124_probe()
1077 return PTR_ERR(st->vref[i]); in ad7124_probe()
1079 ret = regulator_enable(st->vref[i]); in ad7124_probe()
1083 ret = devm_add_action_or_reset(&spi->dev, ad7124_reg_disable, in ad7124_probe()
1084 st->vref[i]); in ad7124_probe()
1089 st->mclk = devm_clk_get_enabled(&spi->dev, "mclk"); in ad7124_probe()
1090 if (IS_ERR(st->mclk)) in ad7124_probe()
1091 return dev_err_probe(dev, PTR_ERR(st->mclk), "Failed to get mclk\n"); in ad7124_probe()
1105 ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev); in ad7124_probe()
1109 ret = devm_iio_device_register(&spi->dev, indio_dev); in ad7124_probe()
1117 { .compatible = "adi,ad7124-4",
1119 { .compatible = "adi,ad7124-8",
1126 { "ad7124-4", (kernel_ulong_t)&ad7124_chip_info_tbl[ID_AD7124_4] },
1127 { "ad7124-8", (kernel_ulong_t)&ad7124_chip_info_tbl[ID_AD7124_8] },