Lines Matching +full:adc +full:- +full:use +full:- +full:res
1 // SPDX-License-Identifier: GPL-2.0+
3 * AD7124 SPI ADC driver
23 #include <linux/iio/adc/ad_sigma_delta.h>
203 .name = "ad7124-4",
208 .name = "ad7124-8",
224 diff_new = abs(val - array[i]); in ad7124_find_closest_match()
243 ret = ad_sd_read_reg(&st->sd, addr, bytes, &readval); in ad7124_spi_write_mask()
250 return ad_sd_write_reg(&st->sd, addr, bytes, readval); in ad7124_spi_write_mask()
258 st->adc_control &= ~AD7124_ADC_CTRL_MODE_MSK; in ad7124_set_mode()
259 st->adc_control |= AD7124_ADC_CTRL_MODE(mode); in ad7124_set_mode()
261 return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_set_mode()
268 fclk = clk_get_rate(st->mclk); in ad7124_set_channel_odr()
282 if (odr_sel_bits != st->channels[channel].cfg.odr_sel_bits) in ad7124_set_channel_odr()
283 st->channels[channel].cfg.live = false; in ad7124_set_channel_odr()
286 st->channels[channel].cfg.odr = DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32); in ad7124_set_channel_odr()
287 st->channels[channel].cfg.odr_sel_bits = odr_sel_bits; in ad7124_set_channel_odr()
295 fadc = st->channels[channel].cfg.odr; in ad7124_get_3db_filter_freq()
297 switch (st->channels[channel].cfg.filter_type) { in ad7124_get_3db_filter_freq()
303 return -EINVAL; in ad7124_get_3db_filter_freq()
326 if (new_odr != st->channels[channel].cfg.odr) in ad7124_set_3db_filter_freq()
327 st->channels[channel].cfg.live = false; in ad7124_set_3db_filter_freq()
329 st->channels[channel].cfg.filter_type = new_filter; in ad7124_set_3db_filter_freq()
330 st->channels[channel].cfg.odr = new_odr; in ad7124_set_3db_filter_freq()
341 for (i = 0; i < st->num_channels; i++) { in ad7124_find_similar_live_cfg()
342 cfg_aux = &st->channels[i].cfg; in ad7124_find_similar_live_cfg()
344 if (cfg_aux->live && in ad7124_find_similar_live_cfg()
345 !memcmp(&cfg->config_props, &cfg_aux->config_props, cmp_size)) in ad7124_find_similar_live_cfg()
356 free_cfg_slot = find_first_zero_bit(&st->cfg_slots_status, AD7124_MAX_CONFIGS); in ad7124_find_free_config_slot()
358 return -1; in ad7124_find_free_config_slot()
365 unsigned int refsel = cfg->refsel; in ad7124_init_config_vref()
371 if (IS_ERR(st->vref[refsel])) { in ad7124_init_config_vref()
372 dev_err(&st->sd.spi->dev, in ad7124_init_config_vref()
373 "Error, trying to use external voltage reference without a %s regulator.\n", in ad7124_init_config_vref()
375 return PTR_ERR(st->vref[refsel]); in ad7124_init_config_vref()
377 cfg->vref_mv = regulator_get_voltage(st->vref[refsel]); in ad7124_init_config_vref()
379 cfg->vref_mv /= 1000; in ad7124_init_config_vref()
382 cfg->vref_mv = 2500; in ad7124_init_config_vref()
383 st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK; in ad7124_init_config_vref()
384 st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); in ad7124_init_config_vref()
387 dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel); in ad7124_init_config_vref()
388 return -EINVAL; in ad7124_init_config_vref()
399 cfg->cfg_slot = cfg_slot; in ad7124_write_config()
401 tmp = (cfg->buf_positive << 1) + cfg->buf_negative; in ad7124_write_config()
402 val = AD7124_CONFIG_BIPOLAR(cfg->bipolar) | AD7124_CONFIG_REF_SEL(cfg->refsel) | in ad7124_write_config()
403 AD7124_CONFIG_IN_BUFF(tmp) | AD7124_CONFIG_PGA(cfg->pga_bits); in ad7124_write_config()
405 ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(cfg->cfg_slot), 2, val); in ad7124_write_config()
409 tmp = AD7124_FILTER_TYPE_SEL(cfg->filter_type) | in ad7124_write_config()
410 AD7124_FILTER_FS(cfg->odr_sel_bits); in ad7124_write_config()
411 return ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), in ad7124_write_config()
427 ret = kfifo_get(&st->live_cfgs_fifo, &lru_cfg); in ad7124_pop_config()
431 lru_cfg->live = false; in ad7124_pop_config()
434 assign_bit(lru_cfg->cfg_slot, &st->cfg_slots_status, 0); in ad7124_pop_config()
437 for (i = 0; i < st->num_channels; i++) { in ad7124_pop_config()
438 cfg = &st->channels[i].cfg; in ad7124_pop_config()
440 if (cfg->cfg_slot == lru_cfg->cfg_slot) in ad7124_pop_config()
441 cfg->live = false; in ad7124_pop_config()
455 kfifo_put(&st->live_cfgs_fifo, cfg); in ad7124_push_config()
460 return -EINVAL; in ad7124_push_config()
463 free_cfg_slot = lru_cfg->cfg_slot; in ad7124_push_config()
464 kfifo_put(&st->live_cfgs_fifo, cfg); in ad7124_push_config()
468 assign_bit(free_cfg_slot, &st->cfg_slots_status, 1); in ad7124_push_config()
475 ch->cfg.live = true; in ad7124_enable_channel()
476 return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(ch->nr), 2, ch->ain | in ad7124_enable_channel()
477 AD7124_CHANNEL_SETUP(ch->cfg.cfg_slot) | AD7124_CHANNEL_EN(1)); in ad7124_enable_channel()
482 struct ad7124_channel_config *cfg = &st->channels[address].cfg; in ad7124_prepare_read()
489 if (!cfg->live) { in ad7124_prepare_read()
495 cfg->cfg_slot = live_cfg->cfg_slot; in ad7124_prepare_read()
499 return ad7124_enable_channel(st, &st->channels[address]); in ad7124_prepare_read()
514 mutex_lock(&st->cfgs_lock); in ad7124_set_channel()
516 mutex_unlock(&st->cfgs_lock); in ad7124_set_channel()
524 unsigned int adc_control = st->adc_control; in ad7124_append_status()
530 ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, adc_control); in ad7124_append_status()
534 st->adc_control = adc_control; in ad7124_append_status()
545 for (i = 0; i < st->num_channels; i++) { in ad7124_disable_all()
591 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
593 idx = st->channels[chan->address].cfg.pga_bits; in ad7124_read_raw()
594 *val = st->channels[chan->address].cfg.vref_mv; in ad7124_read_raw()
595 if (st->channels[chan->address].cfg.bipolar) in ad7124_read_raw()
596 *val2 = chan->scan_type.realbits - 1 + idx; in ad7124_read_raw()
598 *val2 = chan->scan_type.realbits + idx; in ad7124_read_raw()
600 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
603 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
604 if (st->channels[chan->address].cfg.bipolar) in ad7124_read_raw()
605 *val = -(1 << (chan->scan_type.realbits - 1)); in ad7124_read_raw()
609 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
612 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
613 *val = st->channels[chan->address].cfg.odr; in ad7124_read_raw()
614 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
618 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
619 *val = ad7124_get_3db_filter_freq(st, chan->scan_index); in ad7124_read_raw()
620 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
624 return -EINVAL; in ad7124_read_raw()
633 unsigned int res, gain, full_scale, vref; in ad7124_write_raw() local
636 mutex_lock(&st->cfgs_lock); in ad7124_write_raw()
641 ret = -EINVAL; in ad7124_write_raw()
645 ad7124_set_channel_odr(st, chan->address, val); in ad7124_write_raw()
649 ret = -EINVAL; in ad7124_write_raw()
653 if (st->channels[chan->address].cfg.bipolar) in ad7124_write_raw()
654 full_scale = 1 << (chan->scan_type.realbits - 1); in ad7124_write_raw()
656 full_scale = 1 << chan->scan_type.realbits; in ad7124_write_raw()
658 vref = st->channels[chan->address].cfg.vref_mv * 1000000LL; in ad7124_write_raw()
659 res = DIV_ROUND_CLOSEST(vref, full_scale); in ad7124_write_raw()
660 gain = DIV_ROUND_CLOSEST(res, val2); in ad7124_write_raw()
661 res = ad7124_find_closest_match(ad7124_gain, ARRAY_SIZE(ad7124_gain), gain); in ad7124_write_raw()
663 if (st->channels[chan->address].cfg.pga_bits != res) in ad7124_write_raw()
664 st->channels[chan->address].cfg.live = false; in ad7124_write_raw()
666 st->channels[chan->address].cfg.pga_bits = res; in ad7124_write_raw()
670 ret = -EINVAL; in ad7124_write_raw()
674 ad7124_set_3db_filter_freq(st, chan->address, val); in ad7124_write_raw()
677 ret = -EINVAL; in ad7124_write_raw()
680 mutex_unlock(&st->cfgs_lock); in ad7124_write_raw()
693 return -EINVAL; in ad7124_reg_access()
696 ret = ad_sd_read_reg(&st->sd, reg, ad7124_reg_size[reg], in ad7124_reg_access()
699 ret = ad_sd_write_reg(&st->sd, reg, ad7124_reg_size[reg], in ad7124_reg_access()
725 mutex_lock(&st->cfgs_lock); in ad7124_update_scan_mode()
726 for (i = 0; i < st->num_channels; i++) { in ad7124_update_scan_mode()
729 ret = __ad7124_set_channel(&st->sd, i); in ad7124_update_scan_mode()
734 mutex_unlock(&st->cfgs_lock); in ad7124_update_scan_mode()
740 mutex_unlock(&st->cfgs_lock); in ad7124_update_scan_mode()
759 ret = ad_sd_reset(&st->sd, 64); in ad7124_soft_reset()
766 ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval); in ad7124_soft_reset()
775 } while (--timeout); in ad7124_soft_reset()
777 dev_err(&st->sd.spi->dev, "Soft reset failed\n"); in ad7124_soft_reset()
779 return -EIO; in ad7124_soft_reset()
787 ret = ad_sd_read_reg(&st->sd, AD7124_ID, 1, &readval); in ad7124_check_chip_id()
794 if (chip_id != st->chip_info->chip_id) { in ad7124_check_chip_id()
795 dev_err(&st->sd.spi->dev, in ad7124_check_chip_id()
797 st->chip_info->chip_id, chip_id); in ad7124_check_chip_id()
798 return -ENODEV; in ad7124_check_chip_id()
802 dev_err(&st->sd.spi->dev, in ad7124_check_chip_id()
804 return -ENODEV; in ad7124_check_chip_id()
820 st->num_channels = device_get_child_node_count(dev); in ad7124_parse_channel_config()
821 if (!st->num_channels) in ad7124_parse_channel_config()
822 return dev_err_probe(dev, -ENODEV, "no channel children\n"); in ad7124_parse_channel_config()
824 chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, in ad7124_parse_channel_config()
827 return -ENOMEM; in ad7124_parse_channel_config()
829 channels = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*channels), in ad7124_parse_channel_config()
832 return -ENOMEM; in ad7124_parse_channel_config()
834 indio_dev->channels = chan; in ad7124_parse_channel_config()
835 indio_dev->num_channels = st->num_channels; in ad7124_parse_channel_config()
836 st->channels = channels; in ad7124_parse_channel_config()
843 if (channel >= indio_dev->num_channels) in ad7124_parse_channel_config()
844 return dev_err_probe(dev, -EINVAL, in ad7124_parse_channel_config()
847 ret = fwnode_property_read_u32_array(child, "diff-channels", in ad7124_parse_channel_config()
852 st->channels[channel].nr = channel; in ad7124_parse_channel_config()
853 st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) | in ad7124_parse_channel_config()
856 cfg = &st->channels[channel].cfg; in ad7124_parse_channel_config()
857 cfg->bipolar = fwnode_property_read_bool(child, "bipolar"); in ad7124_parse_channel_config()
859 ret = fwnode_property_read_u32(child, "adi,reference-select", &tmp); in ad7124_parse_channel_config()
861 cfg->refsel = AD7124_INT_REF; in ad7124_parse_channel_config()
863 cfg->refsel = tmp; in ad7124_parse_channel_config()
865 cfg->buf_positive = in ad7124_parse_channel_config()
866 fwnode_property_read_bool(child, "adi,buffered-positive"); in ad7124_parse_channel_config()
867 cfg->buf_negative = in ad7124_parse_channel_config()
868 fwnode_property_read_bool(child, "adi,buffered-negative"); in ad7124_parse_channel_config()
885 fclk = clk_get_rate(st->mclk); in ad7124_setup()
887 return -EINVAL; in ad7124_setup()
894 ret = clk_set_rate(st->mclk, fclk); in ad7124_setup()
900 st->adc_control &= ~AD7124_ADC_CTRL_PWR_MSK; in ad7124_setup()
901 st->adc_control |= AD7124_ADC_CTRL_PWR(power_mode); in ad7124_setup()
903 st->adc_control &= ~AD7124_ADC_CTRL_MODE_MSK; in ad7124_setup()
904 st->adc_control |= AD7124_ADC_CTRL_MODE(AD_SD_MODE_IDLE); in ad7124_setup()
906 mutex_init(&st->cfgs_lock); in ad7124_setup()
907 INIT_KFIFO(st->live_cfgs_fifo); in ad7124_setup()
908 for (i = 0; i < st->num_channels; i++) { in ad7124_setup()
910 ret = ad7124_init_config_vref(st, &st->channels[i].cfg); in ad7124_setup()
922 ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_setup()
943 return -ENODEV; in ad7124_probe()
945 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in ad7124_probe()
947 return -ENOMEM; in ad7124_probe()
951 st->chip_info = info; in ad7124_probe()
953 indio_dev->name = st->chip_info->name; in ad7124_probe()
954 indio_dev->modes = INDIO_DIRECT_MODE; in ad7124_probe()
955 indio_dev->info = &ad7124_info; in ad7124_probe()
957 ret = ad_sd_init(&st->sd, indio_dev, spi, &ad7124_sigma_delta_info); in ad7124_probe()
961 ret = ad7124_parse_channel_config(indio_dev, &spi->dev); in ad7124_probe()
965 for (i = 0; i < ARRAY_SIZE(st->vref); i++) { in ad7124_probe()
969 st->vref[i] = devm_regulator_get_optional(&spi->dev, in ad7124_probe()
971 if (PTR_ERR(st->vref[i]) == -ENODEV) in ad7124_probe()
973 else if (IS_ERR(st->vref[i])) in ad7124_probe()
974 return PTR_ERR(st->vref[i]); in ad7124_probe()
976 ret = regulator_enable(st->vref[i]); in ad7124_probe()
980 ret = devm_add_action_or_reset(&spi->dev, ad7124_reg_disable, in ad7124_probe()
981 st->vref[i]); in ad7124_probe()
986 st->mclk = devm_clk_get_enabled(&spi->dev, "mclk"); in ad7124_probe()
987 if (IS_ERR(st->mclk)) in ad7124_probe()
988 return PTR_ERR(st->mclk); in ad7124_probe()
1002 ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev); in ad7124_probe()
1006 return devm_iio_device_register(&spi->dev, indio_dev); in ad7124_probe()
1011 { .compatible = "adi,ad7124-4",
1013 { .compatible = "adi,ad7124-8",
1020 { "ad7124-4", (kernel_ulong_t)&ad7124_chip_info_tbl[ID_AD7124_4] },
1021 { "ad7124-8", (kernel_ulong_t)&ad7124_chip_info_tbl[ID_AD7124_8] },